[{"id":1761471,"web_url":"http://patchwork.ozlabs.org/comment/1761471/","msgid":"<1504243839.4974.70.camel@kernel.crashing.org>","date":"2017-09-01T05:30:39","subject":"Re: [PATCH v3 3/8] powerpc/xive: rename xive_poke_esb() in\n\txive_esb_read()","submitter":{"id":38,"url":"http://patchwork.ozlabs.org/api/people/38/","name":"Benjamin Herrenschmidt","email":"benh@kernel.crashing.org"},"content":"On Wed, 2017-08-30 at 21:46 +0200, Cédric Le Goater wrote:\n> xive_poke_esb() is performing a load/read so it is better named as\n> xive_esb_read() as we will need to introduce a xive_esb_write()\n> routine. Also use the XIVE_ESB_LOAD_EOI offset when EOI'ing LSI\n> interrupts.\n> \n> Signed-off-by: Cédric Le Goater \n> Reviewed-by: David Gibson \nAcked-by: Benjamin Herrenschmidt \n> ---\n> \n> Changes since v1:\n> \n> - fixed naming.\n> \n> arch/powerpc/sysdev/xive/common.c | 20 ++++++++++----------\n> 1 file changed, 10 insertions(+), 10 deletions(-)\n> \n> diff --git a/arch/powerpc/sysdev/xive/common.c b/arch/powerpc/sysdev/xive/common.c\n> index 8774af7a4105..8a58662ed793 100644\n> --- a/arch/powerpc/sysdev/xive/common.c\n> +++ b/arch/powerpc/sysdev/xive/common.c\n> @@ -190,7 +190,7 @@ static u32 xive_scan_interrupts(struct xive_cpu *xc, bool just_peek)\n> * This is used to perform the magic loads from an ESB\n> * described in xive.h\n> */\n> -static u8 xive_poke_esb(struct xive_irq_data *xd, u32 offset)\n> +static u8 xive_esb_read(struct xive_irq_data *xd, u32 offset)\n> {\n> \tu64 val;\n> \n> @@ -227,7 +227,7 @@ void xmon_xive_do_dump(int cpu)\n> \txive_dump_eq(\"IRQ\", &xc->queue[xive_irq_priority]);\n> #ifdef CONFIG_SMP\n> \t{\n> -\t\tu64 val = xive_poke_esb(&xc->ipi_data, XIVE_ESB_GET);\n> +\t\tu64 val = xive_esb_read(&xc->ipi_data, XIVE_ESB_GET);\n> \t\txmon_printf(\" IPI state: %x:%c%c\\n\", xc->hw_ipi,\n> \t\t\tval & XIVE_ESB_VAL_P ? 'P' : 'p',\n> \t\t\tval & XIVE_ESB_VAL_P ? 'Q' : 'q');\n> @@ -326,9 +326,9 @@ void xive_do_source_eoi(u32 hw_irq, struct xive_irq_data *xd)\n> \t\t * properly.\n> \t\t */\n> \t\tif (xd->flags & XIVE_IRQ_FLAG_LSI)\n> -\t\t\tin_be64(xd->eoi_mmio);\n> +\t\t\txive_esb_read(xd, XIVE_ESB_LOAD_EOI);\n> \t\telse {\n> -\t\t\teoi_val = xive_poke_esb(xd, XIVE_ESB_SET_PQ_00);\n> +\t\t\teoi_val = xive_esb_read(xd, XIVE_ESB_SET_PQ_00);\n> \t\t\tDBG_VERBOSE(\"eoi_val=%x\\n\", offset, eoi_val);\n> \n> \t\t\t/* Re-trigger if needed */\n> @@ -383,12 +383,12 @@ static void xive_do_source_set_mask(struct xive_irq_data *xd,\n> \t * ESB accordingly on unmask.\n> \t */\n> \tif (mask) {\n> -\t\tval = xive_poke_esb(xd, XIVE_ESB_SET_PQ_01);\n> +\t\tval = xive_esb_read(xd, XIVE_ESB_SET_PQ_01);\n> \t\txd->saved_p = !!(val & XIVE_ESB_VAL_P);\n> \t} else if (xd->saved_p)\n> -\t\txive_poke_esb(xd, XIVE_ESB_SET_PQ_10);\n> +\t\txive_esb_read(xd, XIVE_ESB_SET_PQ_10);\n> \telse\n> -\t\txive_poke_esb(xd, XIVE_ESB_SET_PQ_00);\n> +\t\txive_esb_read(xd, XIVE_ESB_SET_PQ_00);\n> }\n> \n> /*\n> @@ -768,7 +768,7 @@ static int xive_irq_retrigger(struct irq_data *d)\n> \t * To perform a retrigger, we first set the PQ bits to\n> \t * 11, then perform an EOI.\n> \t */\n> -\txive_poke_esb(xd, XIVE_ESB_SET_PQ_11);\n> +\txive_esb_read(xd, XIVE_ESB_SET_PQ_11);\n> \n> \t/*\n> \t * Note: We pass \"0\" to the hw_irq argument in order to\n> @@ -803,7 +803,7 @@ static int xive_irq_set_vcpu_affinity(struct irq_data *d, void *state)\n> \t\tirqd_set_forwarded_to_vcpu(d);\n> \n> \t\t/* Set it to PQ=10 state to prevent further sends */\n> -\t\tpq = xive_poke_esb(xd, XIVE_ESB_SET_PQ_10);\n> +\t\tpq = xive_esb_read(xd, XIVE_ESB_SET_PQ_10);\n> \n> \t\t/* No target ? nothing to do */\n> \t\tif (xd->target == XIVE_INVALID_TARGET) {\n> @@ -832,7 +832,7 @@ static int xive_irq_set_vcpu_affinity(struct irq_data *d, void *state)\n> \t\t * for sure the queue slot is no longer in use.\n> \t\t */\n> \t\tif (pq & 2) {\n> -\t\t\tpq = xive_poke_esb(xd, XIVE_ESB_SET_PQ_11);\n> +\t\t\tpq = xive_esb_read(xd, XIVE_ESB_SET_PQ_11);\n> \t\t\txd->saved_p = true;\n> \n> \t\t\t/*","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xk7F605yzz9s78\n\tfor ;\n\tFri, 1 Sep 2017 15:33:14 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xk7F56QTpzDrKx\n\tfor ;\n\tFri, 1 Sep 2017 15:33:13 +1000 (AEST)","from gate.crashing.org (gate.crashing.org [63.228.1.57])\n\t(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xk7Bh4zTlzDqkF\n\tfor ;\n\tFri, 1 Sep 2017 15:31:08 +1000 (AEST)","from localhost (localhost.localdomain [127.0.0.1])\n\tby gate.crashing.org (8.14.1/8.13.8) with ESMTP id v815Udh3013209;\n\tFri, 1 Sep 2017 00:30:41 -0500"],"Message-ID":"<1504243839.4974.70.camel@kernel.crashing.org>","Subject":"Re: [PATCH v3 3/8] powerpc/xive: rename xive_poke_esb() in\n\txive_esb_read()","From":"Benjamin Herrenschmidt ","To":"=?iso-8859-1?q?C=E9dric?= Le Goater ,\n\tlinuxppc-dev@lists.ozlabs.org","Date":"Fri, 01 Sep 2017 15:30:39 +1000","In-Reply-To":"<20170830194617.26621-4-clg@kaod.org>","References":"<20170830194617.26621-1-clg@kaod.org>\n\t<20170830194617.26621-4-clg@kaod.org>","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailer":"Evolution 3.24.5 (3.24.5-1.fc26) ","Mime-Version":"1.0","Content-Transfer-Encoding":"8bit","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Paul Mackerras ,\n\tDavid Gibson ","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}}]