[{"id":1759807,"web_url":"http://patchwork.ozlabs.org/comment/1759807/","msgid":"<1504057498.10964.13.camel@mhfsdcap03>","list_archive_url":null,"date":"2017-08-30T01:44:58","subject":"Re: [PATCH] PCI: mediatek: take use of PCI_NUM_INTX","submitter":{"id":68956,"url":"http://patchwork.ozlabs.org/api/people/68956/","name":"Honghui Zhang","email":"honghui.zhang@mediatek.com"},"content":"On Wed, 2017-08-30 at 09:19 +0800, honghui.zhang@mediatek.com wrote:\n> From: Honghui Zhang \n> \n> Switch from using a custom NUM_INTX macro to the generic PCI_NUM_INTX\n> definition for the number of INTx interrupts.\n> \n> Signed-off-by: Honghui Zhang \n> ---\n> drivers/pci/host/pcie-mediatek.c | 5 ++---\n> 1 file changed, 2 insertions(+), 3 deletions(-)\n> \n\nHi, Bjorn, Ryder,\n\tthis patch is based on Paul's v7 version of patch[1](\"Move enum\npci_interrupt_pin to linux/pci.h\").\n[1]http://www.spinics.net/lists/linux-pci/msg63891.html\n\nThanks.\n\n> diff --git a/drivers/pci/host/pcie-mediatek.c b/drivers/pci/host/pcie-mediatek.c\n> index c567996..5c0ce9b 100644\n> --- a/drivers/pci/host/pcie-mediatek.c\n> +++ b/drivers/pci/host/pcie-mediatek.c\n> @@ -77,7 +77,6 @@\n> #define PCIE_INT_MASK\t\t0x420\n> #define INTX_MASK\t\tGENMASK(19, 16)\n> #define INTX_SHIFT\t\t16\n> -#define INTX_NUM\t\t4\n> #define PCIE_INT_STATUS\t\t0x424\n> #define MSI_STATUS\t\tBIT(23)\n> #define PCIE_IMSI_STATUS\t0x42c\n> @@ -576,7 +575,7 @@ static int mtk_pcie_init_irq_domain(struct mtk_pcie_port *port,\n> \t\treturn -ENODEV;\n> \t}\n> \n> -\tport->irq_domain = irq_domain_add_linear(pcie_intc_node, INTX_NUM,\n> +\tport->irq_domain = irq_domain_add_linear(pcie_intc_node, PCI_NUM_INTX,\n> \t\t\t\t\t\t &intx_domain_ops, port);\n> \tif (!port->irq_domain) {\n> \t\tdev_err(dev, \"failed to get INTx IRQ domain\\n\");\n> @@ -594,7 +593,7 @@ static irqreturn_t mtk_pcie_intr_handler(int irq, void *data)\n> \tu32 bit = INTX_SHIFT;\n> \n> \twhile ((status = readl(port->base + PCIE_INT_STATUS)) & INTX_MASK) {\n> -\t\tfor_each_set_bit_from(bit, &status, INTX_NUM + INTX_SHIFT) {\n> +\t\tfor_each_set_bit_from(bit, &status, PCI_NUM_INTX + INTX_SHIFT) {\n> \t\t\t/* Clear the INTx */\n> \t\t\twritel(1 << bit, port->base + PCIE_INT_STATUS);\n> \t\t\tvirq = irq_find_mapping(port->irq_domain,","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xhpGt6B0hz9sPt\n\tfor ;\n\tWed, 30 Aug 2017 11:45:10 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751600AbdH3BpI (ORCPT );\n\tTue, 29 Aug 2017 21:45:08 -0400","from mailgw02.mediatek.com ([218.249.47.111]:54951 \"EHLO\n\tmailgw02.mediatek.com\" rhost-flags-OK-FAIL-OK-FAIL) by\n\tvger.kernel.org with ESMTP id S1751318AbdH3BpH (ORCPT\n\t); Tue, 29 Aug 2017 21:45:07 -0400","from mtkcas36.mediatek.inc [(172.27.4.250)] by\n\tmailgw02.mediatek.com (envelope-from )\n\t(mailgw01.mediatek.com ESMTP with TLS)\n\twith ESMTP id 165454072; Wed, 30 Aug 2017 09:45:00 +0800","from MTKCAS32.mediatek.inc (172.27.4.184) by\n\tMTKMBS31DR.mediatek.inc\n\t(172.27.6.102) with Microsoft SMTP Server (TLS) id 15.0.1210.3;\n\tWed, 30 Aug 2017 09:44:59 +0800","from [10.17.3.153] (10.17.3.153) by MTKCAS32.mediatek.inc\n\t(172.27.4.170) with Microsoft SMTP Server id 15.0.1210.3 via Frontend\n\tTransport; Wed, 30 Aug 2017 09:44:57 +0800"],"Message-ID":"<1504057498.10964.13.camel@mhfsdcap03>","Subject":"Re: [PATCH] PCI: mediatek: take use of PCI_NUM_INTX","From":"Honghui Zhang ","To":"","CC":", ,\n\t, ,\n\t, ,\n\t, ,\n\t, ,\n\t, ,\n\t, ,\n\t","Date":"Wed, 30 Aug 2017 09:44:58 +0800","In-Reply-To":"<1504055954-31545-1-git-send-email-honghui.zhang@mediatek.com>","References":"<1504055954-31545-1-git-send-email-honghui.zhang@mediatek.com>","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailer":"Evolution 3.2.3-0ubuntu6 ","Content-Transfer-Encoding":"7bit","MIME-Version":"1.0","X-MTK":"N","Sender":"linux-pci-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-pci@vger.kernel.org"}},{"id":1760150,"web_url":"http://patchwork.ozlabs.org/comment/1760150/","msgid":"<20170830132439.GA15438@bhelgaas-glaptop.roam.corp.google.com>","list_archive_url":null,"date":"2017-08-30T13:24:39","subject":"Re: [PATCH] PCI: mediatek: take use of PCI_NUM_INTX","submitter":{"id":67298,"url":"http://patchwork.ozlabs.org/api/people/67298/","name":"Bjorn Helgaas","email":"helgaas@kernel.org"},"content":"On Wed, Aug 30, 2017 at 09:19:14AM +0800, honghui.zhang@mediatek.com wrote:\n> From: Honghui Zhang \n> \n> Switch from using a custom NUM_INTX macro to the generic PCI_NUM_INTX\n> definition for the number of INTx interrupts.\n> \n> Signed-off-by: Honghui Zhang \n\nI rebased pci/host-mediatek on top of pci/irq-intx (which adds\nPCI_NUM_INTX) and applied this for v4.14, thanks!\n\n> ---\n> drivers/pci/host/pcie-mediatek.c | 5 ++---\n> 1 file changed, 2 insertions(+), 3 deletions(-)\n> \n> diff --git a/drivers/pci/host/pcie-mediatek.c b/drivers/pci/host/pcie-mediatek.c\n> index c567996..5c0ce9b 100644\n> --- a/drivers/pci/host/pcie-mediatek.c\n> +++ b/drivers/pci/host/pcie-mediatek.c\n> @@ -77,7 +77,6 @@\n> #define PCIE_INT_MASK\t\t0x420\n> #define INTX_MASK\t\tGENMASK(19, 16)\n> #define INTX_SHIFT\t\t16\n> -#define INTX_NUM\t\t4\n> #define PCIE_INT_STATUS\t\t0x424\n> #define MSI_STATUS\t\tBIT(23)\n> #define PCIE_IMSI_STATUS\t0x42c\n> @@ -576,7 +575,7 @@ static int mtk_pcie_init_irq_domain(struct mtk_pcie_port *port,\n> \t\treturn -ENODEV;\n> \t}\n> \n> -\tport->irq_domain = irq_domain_add_linear(pcie_intc_node, INTX_NUM,\n> +\tport->irq_domain = irq_domain_add_linear(pcie_intc_node, PCI_NUM_INTX,\n> \t\t\t\t\t\t &intx_domain_ops, port);\n> \tif (!port->irq_domain) {\n> \t\tdev_err(dev, \"failed to get INTx IRQ domain\\n\");\n> @@ -594,7 +593,7 @@ static irqreturn_t mtk_pcie_intr_handler(int irq, void *data)\n> \tu32 bit = INTX_SHIFT;\n> \n> \twhile ((status = readl(port->base + PCIE_INT_STATUS)) & INTX_MASK) {\n> -\t\tfor_each_set_bit_from(bit, &status, INTX_NUM + INTX_SHIFT) {\n> +\t\tfor_each_set_bit_from(bit, &status, PCI_NUM_INTX + INTX_SHIFT) {\n> \t\t\t/* Clear the INTx */\n> \t\t\twritel(1 << bit, port->base + PCIE_INT_STATUS);\n> \t\t\tvirq = irq_find_mapping(port->irq_domain,\n> -- \n> 2.6.4\n> \n> \n> _______________________________________________\n> linux-arm-kernel mailing list\n> linux-arm-kernel@lists.infradead.org\n> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=)","mail.kernel.org;\n\tdmarc=none (p=none dis=none) header.from=kernel.org","mail.kernel.org;\n\tspf=none smtp.mailfrom=helgaas@kernel.org"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xj5p5476vz9t2W\n\tfor ;\n\tWed, 30 Aug 2017 23:24:45 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751345AbdH3NYn (ORCPT );\n\tWed, 30 Aug 2017 09:24:43 -0400","from mail.kernel.org ([198.145.29.99]:53262 \"EHLO mail.kernel.org\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751326AbdH3NYm (ORCPT );\n\tWed, 30 Aug 2017 09:24:42 -0400","from localhost (173-25-183-69.client.mchsi.com [173.25.183.69])\n\t(using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits))\n\t(No client certificate requested)\n\tby mail.kernel.org (Postfix) with ESMTPSA id 921DD20C10;\n\tWed, 30 Aug 2017 13:24:41 +0000 (UTC)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mail.kernel.org 921DD20C10","Date":"Wed, 30 Aug 2017 08:24:39 -0500","From":"Bjorn Helgaas ","To":"honghui.zhang@mediatek.com","Cc":"bhelgaas@google.com, matthias.bgg@gmail.com,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-mediatek@lists.infradead.org, linux-pci@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, devicetree@vger.kernel.org,\n\tyingjoe.chen@mediatek.com, eddie.huang@mediatek.com,\n\tryder.lee@mediatek.com, youlin.pei@mediatek.com,\n\thongkun.cao@mediatek.com, sean.wang@mediatek.com,\n\txinping.qian@mediatek.com, yt.shen@mediatek.com, yong.wu@mediatek.com","Subject":"Re: [PATCH] PCI: mediatek: take use of PCI_NUM_INTX","Message-ID":"<20170830132439.GA15438@bhelgaas-glaptop.roam.corp.google.com>","References":"<1504055954-31545-1-git-send-email-honghui.zhang@mediatek.com>","MIME-Version":"1.0","Content-Type":"text/plain; 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