[{"id":1759659,"web_url":"http://patchwork.ozlabs.org/comment/1759659/","msgid":"<1FB9F020-AB20-4651-84FC-7D2B011BB2D4@theobroma-systems.com>","list_archive_url":null,"date":"2017-08-29T20:23:52","subject":"Re: [U-Boot] [PATCH v2 05/16] dtoc: Add support for 32 or 64-bit\n\taddresses","submitter":{"id":53488,"url":"http://patchwork.ozlabs.org/api/people/53488/","name":"Philipp Tomsich","email":"philipp.tomsich@theobroma-systems.com"},"content":"> On 29 Aug 2017, at 22:15, Simon Glass wrote:\n> \n> When using 32-bit addresses dtoc works correctly. For 64-bit addresses it\n> does not since it ignores the #address-cells and #size-cells properties.\n> \n> Update the tool to use fdt64_t as the element type for reg properties when\n> either the address or size is larger than one cell. Use the correct value\n> so that C code can obtain the information from the device tree easily.\n> \n> Alos create a new type, fdt_val_t, which is defined to either fdt32_t or\n> fdt64_t depending on the word size of the machine. This type corresponds\n> to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types\n> since they are defined to phys_addr_t and phys_size_t which use\n> 'unsigned long' in the 32-bit case, rather than 'unsigned int'.\n> \n> Add tests for the four combinations of address and size values (32/32,\n> 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368\n> which now need to use the new fdt_val_t type.\n> \n> Signed-off-by: Simon Glass \n> \n> Suggested-by: Heiko Stuebner \n> Reported-by: Kever Yang \n\nReviewed-by: Philipp Tomsich \n\nSee below.\n\n> ---\n> \n> Changes in v2:\n> - Support 'reg' properties with a single cell (e.g. #size-cells = 0)\n> - Introduce an fdt_val_t type which is either 32- or 64-bits long\n> - Update rk3368 and rk3399 uses\n> - Drop review tags since there are significant changes in this patch\n> \n> drivers/clk/rockchip/clk_rk3368.c | 2 +-\n> drivers/clk/rockchip/clk_rk3399.c | 4 +-\n> drivers/core/regmap.c | 2 +-\n> include/fdtdec.h | 2 +\n> include/regmap.h | 2 +-\n> include/syscon.h | 6 +-\n> tools/dtoc/dtb_platdata.py | 61 +++++++++++\n> tools/dtoc/dtoc_test_addr32.dts | 27 +++++\n> tools/dtoc/dtoc_test_addr32_64.dts | 33 ++++++\n> tools/dtoc/dtoc_test_addr64.dts | 33 ++++++\n> tools/dtoc/dtoc_test_addr64_32.dts | 33 ++++++\n> tools/dtoc/fdt_util.py | 2 +\n> tools/dtoc/test_dtoc.py | 212 +++++++++++++++++++++++++++++++++++++\n> 13 files changed, 413 insertions(+), 6 deletions(-)\n> create mode 100644 tools/dtoc/dtoc_test_addr32.dts\n> create mode 100644 tools/dtoc/dtoc_test_addr32_64.dts\n> create mode 100644 tools/dtoc/dtoc_test_addr64.dts\n> create mode 100644 tools/dtoc/dtoc_test_addr64_32.dts\n> \n> diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c\n> index 2be1f572d7..0160d50c03 100644\n> --- a/drivers/clk/rockchip/clk_rk3368.c\n> +++ b/drivers/clk/rockchip/clk_rk3368.c\n> @@ -471,7 +471,7 @@ static int rk3368_clk_probe(struct udevice *dev)\n> #if CONFIG_IS_ENABLED(OF_PLATDATA)\n> \tstruct rk3368_clk_plat *plat = dev_get_platdata(dev);\n> \n> -\tpriv->cru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);\n> +\tpriv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);\n> #endif\n> #if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)\n> \trkclk_init(priv->cru);\n> diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c\n> index 3edafea140..0de3db620d 100644\n> --- a/drivers/clk/rockchip/clk_rk3399.c\n> +++ b/drivers/clk/rockchip/clk_rk3399.c\n> @@ -963,7 +963,7 @@ static int rk3399_clk_probe(struct udevice *dev)\n> #if CONFIG_IS_ENABLED(OF_PLATDATA)\n> \tstruct rk3399_clk_plat *plat = dev_get_platdata(dev);\n> \n> -\tpriv->cru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);\n> +\tpriv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[0]);\n\nThe second argument needs to be reg[1].\n\n> #endif\n> \trkclk_init(priv->cru);\n> #endif\n> @@ -1145,7 +1145,7 @@ static int rk3399_pmuclk_probe(struct udevice *dev)\n> #if CONFIG_IS_ENABLED(OF_PLATDATA)\n> \tstruct rk3399_pmuclk_plat *plat = dev_get_platdata(dev);\n> \n> -\tpriv->pmucru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);\n> +\tpriv->pmucru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);\n> #endif\n> \n> #ifndef CONFIG_SPL_BUILD\n> diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c\n> index d4e16a27ef..0f1d30820c 100644\n> --- a/drivers/core/regmap.c\n> +++ b/drivers/core/regmap.c\n> @@ -40,7 +40,7 @@ static struct regmap *regmap_alloc_count(int count)\n> }\n> \n> #if CONFIG_IS_ENABLED(OF_PLATDATA)\n> -int regmap_init_mem_platdata(struct udevice *dev, u32 *reg, int count,\n> +int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,\n> \t\t\t struct regmap **mapp)\n> {\n> \tstruct regmap_range *range;\n> diff --git a/include/fdtdec.h b/include/fdtdec.h\n> index 4a0947c626..1ba02be8e1 100644\n> --- a/include/fdtdec.h\n> +++ b/include/fdtdec.h\n> @@ -27,10 +27,12 @@ typedef phys_size_t fdt_size_t;\n> #define FDT_ADDR_T_NONE (-1ULL)\n> #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)\n> #define fdt_size_to_cpu(reg) be64_to_cpu(reg)\n> +typedef fdt64_t fdt_val_t;\n> #else\n> #define FDT_ADDR_T_NONE (-1U)\n> #define fdt_addr_to_cpu(reg) be32_to_cpu(reg)\n> #define fdt_size_to_cpu(reg) be32_to_cpu(reg)\n> +typedef fdt32_t fdt_val_t;\n> #endif\n> \n> /* Information obtained about memory from the FDT */\n> diff --git a/include/regmap.h b/include/regmap.h\n> index 1eed94e47a..493a5d8eff 100644\n> --- a/include/regmap.h\n> +++ b/include/regmap.h\n> @@ -69,7 +69,7 @@ int regmap_init_mem(struct udevice *dev, struct regmap **mapp);\n> * @count:\tNumber of pairs (e.g. 1 if the regmap has a single entry)\n> * @mapp:\tReturns allocated map\n> */\n> -int regmap_init_mem_platdata(struct udevice *dev, u32 *reg, int count,\n> +int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,\n> \t\t\t struct regmap **mapp);\n> \n> /**\n> diff --git a/include/syscon.h b/include/syscon.h\n> index 34842aa470..5d52b1cc3c 100644\n> --- a/include/syscon.h\n> +++ b/include/syscon.h\n> @@ -8,6 +8,8 @@\n> #ifndef __SYSCON_H\n> #define __SYSCON_H\n> \n> +#include \n> +\n> /**\n> * struct syscon_uc_info - Information stored by the syscon UCLASS_UCLASS\n> *\n> @@ -28,9 +30,11 @@ struct syscon_ops {\n> * We don't support 64-bit machines. If they are so resource-contrained that\n> * they need to use OF_PLATDATA, something is horribly wrong with the\n> * education of our hardware engineers.\n> + *\n> + * Update: 64-bit is now supported and we have an education crisis.\n> */\n> struct syscon_base_platdata {\n> -\tu32 reg[2];\n> +\tfdt_val_t reg[2];\n> };\n> #endif\n> \n> diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py\n> index 3243bccfe8..0c719310b1 100644\n> --- a/tools/dtoc/dtb_platdata.py\n> +++ b/tools/dtoc/dtb_platdata.py\n> @@ -242,6 +242,66 @@ class DtbPlatdata(object):\n> self._valid_nodes = []\n> return self.scan_node(self._fdt.GetRoot())\n> \n> + @staticmethod\n> + def get_num_cells(node):\n> + \"\"\"Get the number of cells in addresses and sizes for this node\n> +\n> + Args:\n> + node: Node to check\n> +\n> + Returns:\n> + Tuple:\n> + Number of address cells for this node\n> + Number of size cells for this node\n> + \"\"\"\n> + parent = node.parent\n> + na, ns = 2, 2\n> + if parent:\n> + na_prop = parent.props.get('#address-cells')\n> + ns_prop = parent.props.get('#size-cells')\n> + if na_prop:\n> + na = fdt_util.fdt32_to_cpu(na_prop.value)\n> + if ns_prop:\n> + ns = fdt_util.fdt32_to_cpu(ns_prop.value)\n> + return na, ns\n> +\n> + def scan_reg_sizes(self):\n> + \"\"\"Scan for 64-bit 'reg' properties and update the values\n> +\n> + This finds 'reg' properties with 64-bit data and converts the value to\n> + an array of 64-values. This allows it to be output in a way that the\n> + C code can read.\n> + \"\"\"\n> + for node in self._valid_nodes:\n> + reg = node.props.get('reg')\n> + if not reg:\n> + continue\n> + na, ns = self.get_num_cells(node)\n> + total = na + ns\n> +\n> + if reg.type != fdt.TYPE_INT:\n> + raise ValueError(\"Node '%s' reg property is not an int\")\n> + if len(reg.value) % total:\n> + raise ValueError(\"Node '%s' reg property has %d cells \"\n> + 'which is not a multiple of na + ns = %d + %d)' %\n> + (node.name, len(reg.value), na, ns))\n> + reg.na = na\n> + reg.ns = ns\n> + if na != 1 or ns != 1:\n> + reg.type = fdt.TYPE_INT64\n> + i = 0\n> + new_value = []\n> + val = reg.value\n> + if not isinstance(val, list):\n> + val = [val]\n> + while i < len(val):\n> + addr = fdt_util.fdt_cells_to_cpu(val[i:], reg.na)\n> + i += na\n> + size = fdt_util.fdt_cells_to_cpu(val[i:], reg.ns)\n> + i += ns\n> + new_value += [addr, size]\n> + reg.value = new_value\n> +\n> def scan_structs(self):\n> \"\"\"Scan the device tree building up the C structures we will use.\n> \n> @@ -450,6 +510,7 @@ def run_steps(args, dtb_file, include_disabled, output):\n> plat = DtbPlatdata(dtb_file, include_disabled)\n> plat.scan_dtb()\n> plat.scan_tree()\n> + plat.scan_reg_sizes()\n> plat.setup_output(output)\n> structs = plat.scan_structs()\n> plat.scan_phandles()\n> diff --git a/tools/dtoc/dtoc_test_addr32.dts b/tools/dtoc/dtoc_test_addr32.dts\n> new file mode 100644\n> index 0000000000..bcfdcae10b\n> --- /dev/null\n> +++ b/tools/dtoc/dtoc_test_addr32.dts\n> @@ -0,0 +1,27 @@\n> +/*\n> + * Test device tree file for dtoc\n> + *\n> + * Copyright 2017 Google, Inc\n> + *\n> + * SPDX-License-Identifier:\tGPL-2.0+\n> + */\n> +\n> + /dts-v1/;\n> +\n> +/ {\n> +\t#address-cells = <1>;\n> +\t#size-cells = <1>;\n> +\n> +\ttest1 {\n> +\t\tu-boot,dm-pre-reloc;\n> +\t\tcompatible = \"test1\";\n> +\t\treg = <0x1234 0x5678>;\n> +\t};\n> +\n> +\ttest2 {\n> +\t\tu-boot,dm-pre-reloc;\n> +\t\tcompatible = \"test2\";\n> +\t\treg = <0x12345678 0x98765432 2 3>;\n> +\t};\n> +\n> +};\n> diff --git a/tools/dtoc/dtoc_test_addr32_64.dts b/tools/dtoc/dtoc_test_addr32_64.dts\n> new file mode 100644\n> index 0000000000..1c96243310\n> --- /dev/null\n> +++ b/tools/dtoc/dtoc_test_addr32_64.dts\n> @@ -0,0 +1,33 @@\n> +/*\n> + * Test device tree file for dtoc\n> + *\n> + * Copyright 2017 Google, Inc\n> + *\n> + * SPDX-License-Identifier:\tGPL-2.0+\n> + */\n> +\n> + /dts-v1/;\n> +\n> +/ {\n> +\t#address-cells = <1>;\n> +\t#size-cells = <2>;\n> +\n> +\ttest1 {\n> +\t\tu-boot,dm-pre-reloc;\n> +\t\tcompatible = \"test1\";\n> +\t\treg = <0x1234 0x5678 0x0>;\n> +\t};\n> +\n> +\ttest2 {\n> +\t\tu-boot,dm-pre-reloc;\n> +\t\tcompatible = \"test2\";\n> +\t\treg = <0x12345678 0x98765432 0x10987654>;\n> +\t};\n> +\n> +\ttest3 {\n> +\t\tu-boot,dm-pre-reloc;\n> +\t\tcompatible = \"test3\";\n> +\t\treg = <0x12345678 0x98765432 0x10987654 2 0 3>;\n> +\t};\n> +\n> +};\n> diff --git a/tools/dtoc/dtoc_test_addr64.dts b/tools/dtoc/dtoc_test_addr64.dts\n> new file mode 100644\n> index 0000000000..4c0ad0ec36\n> --- /dev/null\n> +++ b/tools/dtoc/dtoc_test_addr64.dts\n> @@ -0,0 +1,33 @@\n> +/*\n> + * Test device tree file for dtoc\n> + *\n> + * Copyright 2017 Google, Inc\n> + *\n> + * SPDX-License-Identifier:\tGPL-2.0+\n> + */\n> +\n> + /dts-v1/;\n> +\n> +/ {\n> +\t#address-cells = <2>;\n> +\t#size-cells = <2>;\n> +\n> +\ttest1 {\n> +\t\tu-boot,dm-pre-reloc;\n> +\t\tcompatible = \"test1\";\n> +\t\treg = /bits/ 64 <0x1234 0x5678>;\n> +\t};\n> +\n> +\ttest2 {\n> +\t\tu-boot,dm-pre-reloc;\n> +\t\tcompatible = \"test2\";\n> +\t\treg = /bits/ 64 <0x1234567890123456 0x9876543210987654>;\n> +\t};\n> +\n> +\ttest3 {\n> +\t\tu-boot,dm-pre-reloc;\n> +\t\tcompatible = \"test3\";\n> +\t\treg = /bits/ 64 <0x1234567890123456 0x9876543210987654 2 3>;\n> +\t};\n> +\n> +};\n> diff --git a/tools/dtoc/dtoc_test_addr64_32.dts b/tools/dtoc/dtoc_test_addr64_32.dts\n> new file mode 100644\n> index 0000000000..c36f6b726e\n> --- /dev/null\n> +++ b/tools/dtoc/dtoc_test_addr64_32.dts\n> @@ -0,0 +1,33 @@\n> +/*\n> + * Test device tree file for dtoc\n> + *\n> + * Copyright 2017 Google, Inc\n> + *\n> + * SPDX-License-Identifier:\tGPL-2.0+\n> + */\n> +\n> + /dts-v1/;\n> +\n> +/ {\n> +\t#address-cells = <2>;\n> +\t#size-cells = <1>;\n> +\n> +\ttest1 {\n> +\t\tu-boot,dm-pre-reloc;\n> +\t\tcompatible = \"test1\";\n> +\t\treg = <0x1234 0x0 0x5678>;\n> +\t};\n> +\n> +\ttest2 {\n> +\t\tu-boot,dm-pre-reloc;\n> +\t\tcompatible = \"test2\";\n> +\t\treg = <0x12345678 0x90123456 0x98765432>;\n> +\t};\n> +\n> +\ttest3 {\n> +\t\tu-boot,dm-pre-reloc;\n> +\t\tcompatible = \"test3\";\n> +\t\treg = <0x12345678 0x90123456 0x98765432 0 2 3>;\n> +\t};\n> +\n> +};\n> diff --git a/tools/dtoc/fdt_util.py b/tools/dtoc/fdt_util.py\n> index bec6ee947a..338d47a5e1 100644\n> --- a/tools/dtoc/fdt_util.py\n> +++ b/tools/dtoc/fdt_util.py\n> @@ -38,6 +38,8 @@ def fdt_cells_to_cpu(val, cells):\n> Return:\n> A native-endian long value\n> \"\"\"\n> + if not cells:\n> + return 0\n> out = long(fdt32_to_cpu(val[0]))\n> if cells == 2:\n> out = out << 32 | fdt32_to_cpu(val[1])\n> diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py\n> index 5040f23325..09cfddaaaa 100644\n> --- a/tools/dtoc/test_dtoc.py\n> +++ b/tools/dtoc/test_dtoc.py\n> @@ -270,4 +270,216 @@ U_BOOT_DEVICE(spl_test) = {\n> \\t.platdata_size\\t= sizeof(dtv_spl_test),\n> };\n> \n> +''', data)\n> +\n> + def test_addresses64(self):\n> + \"\"\"Test output from a node with a 'reg' property with na=2, ns=2\"\"\"\n> + dtb_file = get_dtb_file('dtoc_test_addr64.dts')\n> + output = tools.GetOutputFilename('output')\n> + dtb_platdata.run_steps(['struct'], dtb_file, False, output)\n> + with open(output) as infile:\n> + data = infile.read()\n> + self.assertEqual('''#include \n> +#include \n> +struct dtd_test1 {\n> +\\tfdt64_t\\t\\treg[2];\n> +};\n> +struct dtd_test2 {\n> +\\tfdt64_t\\t\\treg[2];\n> +};\n> +struct dtd_test3 {\n> +\\tfdt64_t\\t\\treg[4];\n> +};\n> +''', data)\n> +\n> + dtb_platdata.run_steps(['platdata'], dtb_file, False, output)\n> + with open(output) as infile:\n> + data = infile.read()\n> + self.assertEqual('''#include \n> +#include \n> +#include \n> +\n> +static struct dtd_test1 dtv_test1 = {\n> +\\t.reg\\t\\t\\t= {0x1234, 0x5678},\n> +};\n> +U_BOOT_DEVICE(test1) = {\n> +\\t.name\\t\\t= \"test1\",\n> +\\t.platdata\\t= &dtv_test1,\n> +\\t.platdata_size\\t= sizeof(dtv_test1),\n> +};\n> +\n> +static struct dtd_test2 dtv_test2 = {\n> +\\t.reg\\t\\t\\t= {0x1234567890123456, 0x9876543210987654},\n> +};\n> +U_BOOT_DEVICE(test2) = {\n> +\\t.name\\t\\t= \"test2\",\n> +\\t.platdata\\t= &dtv_test2,\n> +\\t.platdata_size\\t= sizeof(dtv_test2),\n> +};\n> +\n> +static struct dtd_test3 dtv_test3 = {\n> +\\t.reg\\t\\t\\t= {0x1234567890123456, 0x9876543210987654, 0x2, 0x3},\n> +};\n> +U_BOOT_DEVICE(test3) = {\n> +\\t.name\\t\\t= \"test3\",\n> +\\t.platdata\\t= &dtv_test3,\n> +\\t.platdata_size\\t= sizeof(dtv_test3),\n> +};\n> +\n> +''', data)\n> +\n> + def test_addresses32(self):\n> + \"\"\"Test output from a node with a 'reg' property with na=1, ns=1\"\"\"\n> + dtb_file = get_dtb_file('dtoc_test_addr32.dts')\n> + output = tools.GetOutputFilename('output')\n> + dtb_platdata.run_steps(['struct'], dtb_file, False, output)\n> + with open(output) as infile:\n> + data = infile.read()\n> + self.assertEqual('''#include \n> +#include \n> +struct dtd_test1 {\n> +\\tfdt32_t\\t\\treg[2];\n> +};\n> +struct dtd_test2 {\n> +\\tfdt32_t\\t\\treg[4];\n> +};\n> +''', data)\n> +\n> + dtb_platdata.run_steps(['platdata'], dtb_file, False, output)\n> + with open(output) as infile:\n> + data = infile.read()\n> + self.assertEqual('''#include \n> +#include \n> +#include \n> +\n> +static struct dtd_test1 dtv_test1 = {\n> +\\t.reg\\t\\t\\t= {0x1234, 0x5678},\n> +};\n> +U_BOOT_DEVICE(test1) = {\n> +\\t.name\\t\\t= \"test1\",\n> +\\t.platdata\\t= &dtv_test1,\n> +\\t.platdata_size\\t= sizeof(dtv_test1),\n> +};\n> +\n> +static struct dtd_test2 dtv_test2 = {\n> +\\t.reg\\t\\t\\t= {0x12345678, 0x98765432, 0x2, 0x3},\n> +};\n> +U_BOOT_DEVICE(test2) = {\n> +\\t.name\\t\\t= \"test2\",\n> +\\t.platdata\\t= &dtv_test2,\n> +\\t.platdata_size\\t= sizeof(dtv_test2),\n> +};\n> +\n> +''', data)\n> +\n> + def test_addresses64_32(self):\n> + \"\"\"Test output from a node with a 'reg' property with na=2, ns=1\"\"\"\n> + dtb_file = get_dtb_file('dtoc_test_addr64_32.dts')\n> + output = tools.GetOutputFilename('output')\n> + dtb_platdata.run_steps(['struct'], dtb_file, False, output)\n> + with open(output) as infile:\n> + data = infile.read()\n> + self.assertEqual('''#include \n> +#include \n> +struct dtd_test1 {\n> +\\tfdt64_t\\t\\treg[2];\n> +};\n> +struct dtd_test2 {\n> +\\tfdt64_t\\t\\treg[2];\n> +};\n> +struct dtd_test3 {\n> +\\tfdt64_t\\t\\treg[4];\n> +};\n> +''', data)\n> +\n> + dtb_platdata.run_steps(['platdata'], dtb_file, False, output)\n> + with open(output) as infile:\n> + data = infile.read()\n> + self.assertEqual('''#include \n> +#include \n> +#include \n> +\n> +static struct dtd_test1 dtv_test1 = {\n> +\\t.reg\\t\\t\\t= {0x123400000000, 0x5678},\n> +};\n> +U_BOOT_DEVICE(test1) = {\n> +\\t.name\\t\\t= \"test1\",\n> +\\t.platdata\\t= &dtv_test1,\n> +\\t.platdata_size\\t= sizeof(dtv_test1),\n> +};\n> +\n> +static struct dtd_test2 dtv_test2 = {\n> +\\t.reg\\t\\t\\t= {0x1234567890123456, 0x98765432},\n> +};\n> +U_BOOT_DEVICE(test2) = {\n> +\\t.name\\t\\t= \"test2\",\n> +\\t.platdata\\t= &dtv_test2,\n> +\\t.platdata_size\\t= sizeof(dtv_test2),\n> +};\n> +\n> +static struct dtd_test3 dtv_test3 = {\n> +\\t.reg\\t\\t\\t= {0x1234567890123456, 0x98765432, 0x2, 0x3},\n> +};\n> +U_BOOT_DEVICE(test3) = {\n> +\\t.name\\t\\t= \"test3\",\n> +\\t.platdata\\t= &dtv_test3,\n> +\\t.platdata_size\\t= sizeof(dtv_test3),\n> +};\n> +\n> +''', data)\n> +\n> + def test_addresses32_64(self):\n> + \"\"\"Test output from a node with a 'reg' property with na=1, ns=2\"\"\"\n> + dtb_file = get_dtb_file('dtoc_test_addr32_64.dts')\n> + output = tools.GetOutputFilename('output')\n> + dtb_platdata.run_steps(['struct'], dtb_file, False, output)\n> + with open(output) as infile:\n> + data = infile.read()\n> + self.assertEqual('''#include \n> +#include \n> +struct dtd_test1 {\n> +\\tfdt64_t\\t\\treg[2];\n> +};\n> +struct dtd_test2 {\n> +\\tfdt64_t\\t\\treg[2];\n> +};\n> +struct dtd_test3 {\n> +\\tfdt64_t\\t\\treg[4];\n> +};\n> +''', data)\n> +\n> + dtb_platdata.run_steps(['platdata'], dtb_file, False, output)\n> + with open(output) as infile:\n> + data = infile.read()\n> + self.assertEqual('''#include \n> +#include \n> +#include \n> +\n> +static struct dtd_test1 dtv_test1 = {\n> +\\t.reg\\t\\t\\t= {0x1234, 0x567800000000},\n> +};\n> +U_BOOT_DEVICE(test1) = {\n> +\\t.name\\t\\t= \"test1\",\n> +\\t.platdata\\t= &dtv_test1,\n> +\\t.platdata_size\\t= sizeof(dtv_test1),\n> +};\n> +\n> +static struct dtd_test2 dtv_test2 = {\n> +\\t.reg\\t\\t\\t= {0x12345678, 0x9876543210987654},\n> +};\n> +U_BOOT_DEVICE(test2) = {\n> +\\t.name\\t\\t= \"test2\",\n> +\\t.platdata\\t= &dtv_test2,\n> +\\t.platdata_size\\t= sizeof(dtv_test2),\n> +};\n> +\n> +static struct dtd_test3 dtv_test3 = {\n> +\\t.reg\\t\\t\\t= {0x12345678, 0x9876543210987654, 0x2, 0x3},\n> +};\n> +U_BOOT_DEVICE(test3) = {\n> +\\t.name\\t\\t= \"test3\",\n> +\\t.platdata\\t= &dtv_test3,\n> +\\t.platdata_size\\t= sizeof(dtv_test3),\n> +};\n> +\n> ''', data)\n> -- \n> 2.14.1.342.g6490525c54-goog\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xhgLy070Lz9sPt\n\tfor ;\n\tWed, 30 Aug 2017 06:33:12 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 6FC34C22453; Tue, 29 Aug 2017 20:27:35 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 74A01C2247C;\n\tTue, 29 Aug 2017 20:27:30 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 1B05EC21E84; Tue, 29 Aug 2017 20:23:59 +0000 (UTC)","from mail.theobroma-systems.com (vegas.theobroma-systems.com\n\t[144.76.126.164])\n\tby lists.denx.de (Postfix) with ESMTPS id E541AC2211B\n\tfor ; Tue, 29 Aug 2017 20:23:55 +0000 (UTC)","from 89-104-28-141.customer.bnet.at ([89.104.28.141]:60562\n\thelo=[192.168.2.129]) by mail.theobroma-systems.com with esmtpsa\n\t(TLS1.0:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80)\n\t(envelope-from )\n\tid 1dmn3B-0003uj-L0; Tue, 29 Aug 2017 22:23:53 +0200"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"*","X-Spam-Status":"No, score=1.0 required=5.0 tests=HK_NAME_DR autolearn=no\n\tautolearn_force=no version=3.4.0","Mime-Version":"1.0 (Mac OS X Mail 8.2 \\(2104\\))","From":"\"Dr. Philipp Tomsich\" ","In-Reply-To":"<20170829201601.64312-6-sjg@chromium.org>","Date":"Tue, 29 Aug 2017 22:23:52 +0200","Message-Id":"<1FB9F020-AB20-4651-84FC-7D2B011BB2D4@theobroma-systems.com>","References":"<20170829201601.64312-1-sjg@chromium.org>\n\t<20170829201601.64312-6-sjg@chromium.org>","To":"Simon Glass ","X-Mailer":"Apple Mail (2.2104)","Cc":"U-Boot Mailing List , Tom Rini ","Subject":"Re: [U-Boot] [PATCH v2 05/16] dtoc: Add support for 32 or 64-bit\n\taddresses","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1769113,"web_url":"http://patchwork.ozlabs.org/comment/1769113/","msgid":"","list_archive_url":null,"date":"2017-09-15T11:29:27","subject":"Re: [U-Boot] [PATCH v2 05/16] dtoc: Add support for 32 or 64-bit\n\taddresses","submitter":{"id":6170,"url":"http://patchwork.ozlabs.org/api/people/6170/","name":"Simon Glass","email":"sjg@chromium.org"},"content":"On 29 August 2017 at 14:23, Dr. Philipp Tomsich\n wrote:\n>\n>> On 29 Aug 2017, at 22:15, Simon Glass wrote:\n>>\n>> When using 32-bit addresses dtoc works correctly. For 64-bit addresses it\n>> does not since it ignores the #address-cells and #size-cells properties.\n>>\n>> Update the tool to use fdt64_t as the element type for reg properties when\n>> either the address or size is larger than one cell. Use the correct value\n>> so that C code can obtain the information from the device tree easily.\n>>\n>> Alos create a new type, fdt_val_t, which is defined to either fdt32_t or\n>> fdt64_t depending on the word size of the machine. This type corresponds\n>> to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types\n>> since they are defined to phys_addr_t and phys_size_t which use\n>> 'unsigned long' in the 32-bit case, rather than 'unsigned int'.\n>>\n>> Add tests for the four combinations of address and size values (32/32,\n>> 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368\n>> which now need to use the new fdt_val_t type.\n>>\n>> Signed-off-by: Simon Glass \n>>\n>> Suggested-by: Heiko Stuebner \n>> Reported-by: Kever Yang \n>\n> Reviewed-by: Philipp Tomsich \n>\n> See below.\n>\n>> ---\n>>\n>> Changes in v2:\n>> - Support 'reg' properties with a single cell (e.g. #size-cells = 0)\n>> - Introduce an fdt_val_t type which is either 32- or 64-bits long\n>> - Update rk3368 and rk3399 uses\n>> - Drop review tags since there are significant changes in this patch\n>>\n>> drivers/clk/rockchip/clk_rk3368.c | 2 +-\n>> drivers/clk/rockchip/clk_rk3399.c | 4 +-\n>> drivers/core/regmap.c | 2 +-\n>> include/fdtdec.h | 2 +\n>> include/regmap.h | 2 +-\n>> include/syscon.h | 6 +-\n>> tools/dtoc/dtb_platdata.py | 61 +++++++++++\n>> tools/dtoc/dtoc_test_addr32.dts | 27 +++++\n>> tools/dtoc/dtoc_test_addr32_64.dts | 33 ++++++\n>> tools/dtoc/dtoc_test_addr64.dts | 33 ++++++\n>> tools/dtoc/dtoc_test_addr64_32.dts | 33 ++++++\n>> tools/dtoc/fdt_util.py | 2 +\n>> tools/dtoc/test_dtoc.py | 212 +++++++++++++++++++++++++++++++++++++\n>> 13 files changed, 413 insertions(+), 6 deletions(-)\n>> create mode 100644 tools/dtoc/dtoc_test_addr32.dts\n>> create mode 100644 tools/dtoc/dtoc_test_addr32_64.dts\n>> create mode 100644 tools/dtoc/dtoc_test_addr64.dts\n>> create mode 100644 tools/dtoc/dtoc_test_addr64_32.dts\n>>\n>> diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c\n>> index 2be1f572d7..0160d50c03 100644\n>> --- a/drivers/clk/rockchip/clk_rk3368.c\n>> +++ b/drivers/clk/rockchip/clk_rk3368.c\n>> @@ -471,7 +471,7 @@ static int rk3368_clk_probe(struct udevice *dev)\n>> #if CONFIG_IS_ENABLED(OF_PLATDATA)\n>> struct rk3368_clk_plat *plat = dev_get_platdata(dev);\n>>\n>> - priv->cru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);\n>> + priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);\n>> #endif\n>> #if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)\n>> rkclk_init(priv->cru);\n>> diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c\n>> index 3edafea140..0de3db620d 100644\n>> --- a/drivers/clk/rockchip/clk_rk3399.c\n>> +++ b/drivers/clk/rockchip/clk_rk3399.c\n>> @@ -963,7 +963,7 @@ static int rk3399_clk_probe(struct udevice *dev)\n>> #if CONFIG_IS_ENABLED(OF_PLATDATA)\n>> struct rk3399_clk_plat *plat = dev_get_platdata(dev);\n>>\n>> - priv->cru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);\n>> + priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[0]);\n>\n> The second argument needs to be reg[1].\n>\n\nOK, I will fix when applying, thanks.\n\n- Simon","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1769406,"web_url":"http://patchwork.ozlabs.org/comment/1769406/","msgid":"","list_archive_url":null,"date":"2017-09-15T19:25:44","subject":"Re: [U-Boot] [PATCH v2 05/16] dtoc: Add support for 32 or 64-bit\n\taddresses","submitter":{"id":12501,"url":"http://patchwork.ozlabs.org/api/people/12501/","name":"Simon Glass","email":"sjg@google.com"},"content":"On 29 August 2017 at 14:23, Dr. Philipp Tomsich\n wrote:\n>\n>> On 29 Aug 2017, at 22:15, Simon Glass wrote:\n>>\n>> When using 32-bit addresses dtoc works correctly. For 64-bit addresses it\n>> does not since it ignores the #address-cells and #size-cells properties.\n>>\n>> Update the tool to use fdt64_t as the element type for reg properties when\n>> either the address or size is larger than one cell. Use the correct value\n>> so that C code can obtain the information from the device tree easily.\n>>\n>> Alos create a new type, fdt_val_t, which is defined to either fdt32_t or\n>> fdt64_t depending on the word size of the machine. This type corresponds\n>> to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types\n>> since they are defined to phys_addr_t and phys_size_t which use\n>> 'unsigned long' in the 32-bit case, rather than 'unsigned int'.\n>>\n>> Add tests for the four combinations of address and size values (32/32,\n>> 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368\n>> which now need to use the new fdt_val_t type.\n>>\n>> Signed-off-by: Simon Glass \n>>\n>> Suggested-by: Heiko Stuebner \n>> Reported-by: Kever Yang \n>\n> Reviewed-by: Philipp Tomsich \n>\n> See below.\n>\n>> ---\n>>\n>> Changes in v2:\n>> - Support 'reg' properties with a single cell (e.g. #size-cells = 0)\n>> - Introduce an fdt_val_t type which is either 32- or 64-bits long\n>> - Update rk3368 and rk3399 uses\n>> - Drop review tags since there are significant changes in this patch\n>>\n>> drivers/clk/rockchip/clk_rk3368.c | 2 +-\n>> drivers/clk/rockchip/clk_rk3399.c | 4 +-\n>> drivers/core/regmap.c | 2 +-\n>> include/fdtdec.h | 2 +\n>> include/regmap.h | 2 +-\n>> include/syscon.h | 6 +-\n>> tools/dtoc/dtb_platdata.py | 61 +++++++++++\n>> tools/dtoc/dtoc_test_addr32.dts | 27 +++++\n>> tools/dtoc/dtoc_test_addr32_64.dts | 33 ++++++\n>> tools/dtoc/dtoc_test_addr64.dts | 33 ++++++\n>> tools/dtoc/dtoc_test_addr64_32.dts | 33 ++++++\n>> tools/dtoc/fdt_util.py | 2 +\n>> tools/dtoc/test_dtoc.py | 212 +++++++++++++++++++++++++++++++++++++\n>> 13 files changed, 413 insertions(+), 6 deletions(-)\n>> create mode 100644 tools/dtoc/dtoc_test_addr32.dts\n>> create mode 100644 tools/dtoc/dtoc_test_addr32_64.dts\n>> create mode 100644 tools/dtoc/dtoc_test_addr64.dts\n>> create mode 100644 tools/dtoc/dtoc_test_addr64_32.dts\n>>\nApplied to u-boot-fdt thanks!","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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