[{"id":1761908,"web_url":"http://patchwork.ozlabs.org/comment/1761908/","msgid":"<26D9FDECA4FBDD4AADA65D8E2FC68A4A10EA9685@ORSMSX104.amr.corp.intel.com>","list_archive_url":null,"date":"2017-09-01T18:36:18","subject":"Re: [Intel-wired-lan] [next PATCH S79-V2 10/13] i40e: implement\n\tsplit\tPCI error reset handler","submitter":{"id":66945,"url":"http://patchwork.ozlabs.org/api/people/66945/","name":"Bowers, AndrewX","email":"andrewx.bowers@intel.com"},"content":"> -----Original Message-----\n> From: Intel-wired-lan [mailto:intel-wired-lan-bounces@osuosl.org] On\n> Behalf Of Alice Michael\n> Sent: Tuesday, August 29, 2017 2:33 AM\n> To: Michael, Alice ; intel-wired-\n> lan@lists.osuosl.org\n> Subject: [Intel-wired-lan] [next PATCH S79-V2 10/13] i40e: implement split\n> PCI error reset handler\n> \n> From: Alan Brady \n> \n> This patch implements the PCI error handler reset_prepare and reset_done.\n> This allows us to handle function level reset. Without this patch we are\n> unable to perform and recover from an FLR correctly and this will cause VFs\n> to be unable to recover from an FLR on the PF.\n> \n> Signed-off-by: Alan Brady \n> ---\n> drivers/net/ethernet/intel/i40e/i40e_main.c | 24\n> ++++++++++++++++++++++++\n> 1 file changed, 24 insertions(+)\n\nTested-by: Andrew Bowers ","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.133; helo=hemlock.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=)","Received":["from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xkScq1J1Bz9sPk\n\tfor ;\n\tSat, 2 Sep 2017 04:36:26 +1000 (AEST)","from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id F1CF78A2CA;\n\tFri, 1 Sep 2017 18:36:24 +0000 (UTC)","from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id GeENU2g4vw9M; Fri, 1 Sep 2017 18:36:24 +0000 (UTC)","from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id DB45A8A1BB;\n\tFri, 1 Sep 2017 18:36:23 +0000 (UTC)","from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ash.osuosl.org (Postfix) with ESMTP id 701A01C0ACA\n\tfor ;\n\tFri, 1 Sep 2017 18:36:22 +0000 (UTC)","from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 69CA988197\n\tfor ;\n\tFri, 1 Sep 2017 18:36:22 +0000 (UTC)","from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id zuMpaVzUYryL for ;\n\tFri, 1 Sep 2017 18:36:21 +0000 (UTC)","from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby fraxinus.osuosl.org (Postfix) with ESMTPS id B3E11880C9\n\tfor ;\n\tFri, 1 Sep 2017 18:36:21 +0000 (UTC)","from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t01 Sep 2017 11:36:21 -0700","from orsmsx103.amr.corp.intel.com ([10.22.225.130])\n\tby fmsmga001.fm.intel.com with ESMTP; 01 Sep 2017 11:36:20 -0700","from orsmsx155.amr.corp.intel.com (10.22.240.21) by\n\tORSMSX103.amr.corp.intel.com (10.22.225.130) with Microsoft SMTP\n\tServer (TLS) id 14.3.319.2; Fri, 1 Sep 2017 11:36:18 -0700","from orsmsx104.amr.corp.intel.com ([169.254.4.142]) by\n\tORSMSX155.amr.corp.intel.com ([169.254.7.171]) with mapi id\n\t14.03.0319.002; Fri, 1 Sep 2017 11:36:17 -0700"],"X-Virus-Scanned":["amavisd-new at osuosl.org","amavisd-new at osuosl.org"],"X-Greylist":"domain auto-whitelisted by SQLgrey-1.7.6","X-ExtLoop1":"1","X-IronPort-AV":"E=Sophos; i=\"5.41,459,1498546800\"; d=\"scan'208\";\n\ta=\"1190665677\"","From":"\"Bowers, AndrewX\" ","To":"\"intel-wired-lan@lists.osuosl.org\" ","Thread-Topic":"[Intel-wired-lan] [next PATCH S79-V2 10/13] i40e: implement\n\tsplit\tPCI error reset handler","Thread-Index":"AQHTIO2IE9ps2gJLM0aGELlq2rXY+KKgYHbg","Date":"Fri, 1 Sep 2017 18:36:18 +0000","Message-ID":"<26D9FDECA4FBDD4AADA65D8E2FC68A4A10EA9685@ORSMSX104.amr.corp.intel.com>","References":"<20170829093242.41026-1-alice.michael@intel.com>\n\t<20170829093242.41026-10-alice.michael@intel.com>","In-Reply-To":"<20170829093242.41026-10-alice.michael@intel.com>","Accept-Language":"en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","x-titus-metadata-40":"eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMzk5ZGU3MGItZjI4Zi00ZDRlLTkyYjMtM2ExMTIzMmRkZWYxIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6Ikd0Q3g2UTl1TTNcL0g0YVFhNllNZ3FtODdSMFQ5TkhYckh3ZEJxSE1ZMllBPSJ9","x-ctpclassification":"CTP_IC","dlp-product":"dlpe-windows","dlp-version":"11.0.0.116","dlp-reaction":"no-action","x-originating-ip":"[10.22.254.139]","MIME-Version":"1.0","Subject":"Re: [Intel-wired-lan] [next PATCH S79-V2 10/13] i40e: implement\n\tsplit\tPCI error reset handler","X-BeenThere":"intel-wired-lan@osuosl.org","X-Mailman-Version":"2.1.18-1","Precedence":"list","List-Id":"Intel Wired Ethernet Linux Kernel Driver Development\n\t","List-Unsubscribe":", \n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":", \n\t","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Errors-To":"intel-wired-lan-bounces@osuosl.org","Sender":"\"Intel-wired-lan\" "}}]