[{"id":1759570,"web_url":"http://patchwork.ozlabs.org/comment/1759570/","msgid":"<CAD6G_RSsGDNu2_5_P33iAxCM7qPZ5fKzC0LtbKapc6q61NGgkA@mail.gmail.com>","list_archive_url":null,"date":"2017-08-29T17:38:24","subject":"Re: [U-Boot] [PATCH v2] spi: fsl_qspi: Add controller busy check\n\tbefore new spi operation","submitter":{"id":20045,"url":"http://patchwork.ozlabs.org/api/people/20045/","name":"Jagan Teki","email":"jagannadh.teki@gmail.com"},"content":"On Tue, Aug 29, 2017 at 6:55 PM, Suresh Gupta <suresh.gupta@nxp.com> wrote:\n> It is recommended to check either controller is free to take\n> new spi action. The IP_ACC and AHB_ACC bits indicates that\n> the controller is busy in IP or AHB mode respectively.\n> And the BUSY bit indicates that controller is currently\n> busy handling a transaction to an external flash device\n>\n> Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>\n> ---\n> Changes in v2:\n>\n> - Add wait_for_bit instead of while\n> - move the busy check code to fsl_qspi_claim_bus form qspi_xfer\n>\n>  drivers/spi/fsl_qspi.c | 28 +++++++++++++++++++++++++++-\n>  drivers/spi/fsl_qspi.h |  4 ++++\n>  2 files changed, 31 insertions(+), 1 deletion(-)\n>\n> diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c\n> index 1dfa89a..ed23aac 100644\n> --- a/drivers/spi/fsl_qspi.c\n> +++ b/drivers/spi/fsl_qspi.c\n> @@ -14,6 +14,7 @@\n>  #include <dm.h>\n>  #include <errno.h>\n>  #include <watchdog.h>\n> +#include <wait_bit.h>\n>  #include \"fsl_qspi.h\"\n>\n>  DECLARE_GLOBAL_DATA_PTR;\n> @@ -991,7 +992,7 @@ static int fsl_qspi_probe(struct udevice *bus)\n>         struct fsl_qspi_platdata *plat = dev_get_platdata(bus);\n>         struct fsl_qspi_priv *priv = dev_get_priv(bus);\n>         struct dm_spi_bus *dm_spi_bus;\n> -       int i;\n> +       int i, ret;\n>\n>         dm_spi_bus = bus->uclass_priv;\n>\n> @@ -1011,6 +1012,18 @@ static int fsl_qspi_probe(struct udevice *bus)\n>         priv->flash_num = plat->flash_num;\n>         priv->num_chipselect = plat->num_chipselect;\n>\n\nI think in previous version, this code not added in probe is it? is\nthis because probe doing mcr and other reg operations?\n\n> +       /* make sure controller is not busy anywhere */\n> +       ret = wait_for_bit(__func__, &priv->regs->sr,\n> +                          QSPI_SR_BUSY_MASK |\n> +                          QSPI_SR_AHB_ACC_MASK |\n> +                          QSPI_SR_IP_ACC_MASK,\n> +                          false, 1000, false);\n> +\n> +       if (ret) {\n> +               printf(\"ERROR : The controller is busy\\n\");\n> +               return -EBUSY;\n> +       }\n\nBetter to drop printf or use debug and wait_for_bit usually return\n-ETIMEDOUT or -EINTR on failure so just return ret.\n\nthanks!","headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=/OgIc+7yDV6rd8ljst5gA3POQaUngU2EXH+NBP0OZOQ=;\n\tb=gMxWi2DZGkeYzpKWbf3RoYog66xawNGxPSirdPEeaKzj4bcIoSODm51K4F+D3WHejB\n\t5/hWVphnx5GMp2NgDuMIQN6bZn5dMyZXV8IZZZGeO16rSVLkv2FFsJh7Lh3bSk3EupH+\n\te36311LIvUwuJD8agPJAa79NmZK4pTWB89xgwG7jR8lZF5sz3zvl/M/ErgmToi/hG2Wo\n\tTEg8pytFKnyY5uDMK0FgkIn41XaaDwuswjXlWXSksNIC7GS/CNIs3KP08NeW9hiahnRe\n\t8Jlav2iLDsEkvZCX+3TQxjApZXQ8SYhNYSYOWQeMFpa1DX/7H3WE5f2wfJZfcnAeupLw\n\tYBbg==","X-Gm-Message-State":"AHYfb5idzvIAem8Yp17kZ3zShwyoWjlHNk0UHr2mnFtQAIaTpvmpeTQv\n\tbe+IcRa1U+mCn5A5kJdlL74qpqwIZEDk","X-Received":"by 10.25.56.22 with SMTP id f22mr323878lfa.92.1504028304716; Tue,\n\t29 Aug 2017 10:38:24 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1504013105-11480-1-git-send-email-suresh.gupta@nxp.com>","References":"<1504013105-11480-1-git-send-email-suresh.gupta@nxp.com>","From":"Jagan Teki <jagannadh.teki@gmail.com>","Date":"Tue, 29 Aug 2017 23:08:24 +0530","Message-ID":"<CAD6G_RSsGDNu2_5_P33iAxCM7qPZ5fKzC0LtbKapc6q61NGgkA@mail.gmail.com>","To":"Suresh Gupta <suresh.gupta@nxp.com>","Cc":"\"u-boot@lists.denx.de\" <u-boot@lists.denx.de>","Subject":"Re: [U-Boot] [PATCH v2] spi: fsl_qspi: Add controller busy check\n\tbefore new spi operation","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion <u-boot.lists.denx.de>","List-Unsubscribe":"<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>","List-Archive":"<http://lists.denx.de/pipermail/u-boot/>","List-Post":"<mailto:u-boot@lists.denx.de>","List-Help":"<mailto:u-boot-request@lists.denx.de?subject=help>","List-Subscribe":"<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" <u-boot-bounces@lists.denx.de>"}},{"id":1759918,"web_url":"http://patchwork.ozlabs.org/comment/1759918/","msgid":"<DB5PR04MB1350913B8F6A1BDDFE6D3253809C0@DB5PR04MB1350.eurprd04.prod.outlook.com>","list_archive_url":null,"date":"2017-08-30T06:53:47","subject":"Re: [U-Boot] [PATCH v2] spi: fsl_qspi: Add controller busy check\n\tbefore new spi operation","submitter":{"id":70239,"url":"http://patchwork.ozlabs.org/api/people/70239/","name":"Suresh Gupta","email":"suresh.gupta@nxp.com"},"content":"> -----Original Message-----\r\n> From: Jagan Teki [mailto:jagannadh.teki@gmail.com]\r\n> Sent: Tuesday, August 29, 2017 11:08 PM\r\n> To: Suresh Gupta <suresh.gupta@nxp.com>\r\n> Cc: u-boot@lists.denx.de; York Sun <york.sun@nxp.com>\r\n> Subject: Re: [PATCH v2] spi: fsl_qspi: Add controller busy check before new spi\r\n> operation\r\n> \r\n> On Tue, Aug 29, 2017 at 6:55 PM, Suresh Gupta <suresh.gupta@nxp.com>\r\n> wrote:\r\n> > It is recommended to check either controller is free to take new spi\r\n> > action. The IP_ACC and AHB_ACC bits indicates that the controller is\r\n> > busy in IP or AHB mode respectively.\r\n> > And the BUSY bit indicates that controller is currently busy handling\r\n> > a transaction to an external flash device\r\n> >\r\n> > Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>\r\n> > ---\r\n> > Changes in v2:\r\n> >\r\n> > - Add wait_for_bit instead of while\r\n> > - move the busy check code to fsl_qspi_claim_bus form qspi_xfer\r\n> >\r\n> >  drivers/spi/fsl_qspi.c | 28 +++++++++++++++++++++++++++-\r\n> > drivers/spi/fsl_qspi.h |  4 ++++\r\n> >  2 files changed, 31 insertions(+), 1 deletion(-)\r\n> >\r\n> > diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index\r\n> > 1dfa89a..ed23aac 100644\r\n> > --- a/drivers/spi/fsl_qspi.c\r\n> > +++ b/drivers/spi/fsl_qspi.c\r\n> > @@ -14,6 +14,7 @@\r\n> >  #include <dm.h>\r\n> >  #include <errno.h>\r\n> >  #include <watchdog.h>\r\n> > +#include <wait_bit.h>\r\n> >  #include \"fsl_qspi.h\"\r\n> >\r\n> >  DECLARE_GLOBAL_DATA_PTR;\r\n> > @@ -991,7 +992,7 @@ static int fsl_qspi_probe(struct udevice *bus)\r\n> >         struct fsl_qspi_platdata *plat = dev_get_platdata(bus);\r\n> >         struct fsl_qspi_priv *priv = dev_get_priv(bus);\r\n> >         struct dm_spi_bus *dm_spi_bus;\r\n> > -       int i;\r\n> > +       int i, ret;\r\n> >\r\n> >         dm_spi_bus = bus->uclass_priv;\r\n> >\r\n> > @@ -1011,6 +1012,18 @@ static int fsl_qspi_probe(struct udevice *bus)\r\n> >         priv->flash_num = plat->flash_num;\r\n> >         priv->num_chipselect = plat->num_chipselect;\r\n> >\r\n> \r\n> I think in previous version, this code not added in probe is it? is this because\r\n> probe doing mcr and other reg operations?\r\n\r\nThe probe function changes the LUTs, change AHB configuration and change the endianness.  \r\nSo, changing above setting when the controller is busy in some AHB access will affect the running access.\r\n> \r\n> > +       /* make sure controller is not busy anywhere */\r\n> > +       ret = wait_for_bit(__func__, &priv->regs->sr,\r\n> > +                          QSPI_SR_BUSY_MASK |\r\n> > +                          QSPI_SR_AHB_ACC_MASK |\r\n> > +                          QSPI_SR_IP_ACC_MASK,\r\n> > +                          false, 1000, false);\r\n> > +\r\n> > +       if (ret) {\r\n> > +               printf(\"ERROR : The controller is busy\\n\");\r\n> > +               return -EBUSY;\r\n> > +       }\r\n> \r\n> Better to drop printf or use debug and\r\nThe error above is trivial and after this error, the sf commands do not work.\r\nAnd if we hide the message under debug, normal user will not understand the issue.  \r\nAs per me this should be printf, what you say? \r\n\r\n> wait_for_bit usually return -ETIMEDOUT\r\n> or -EINTR on failure so just return ret.\r\nOk, I will make changes in next patch\r\n\r\n> \r\n> thanks!\r\n> --\r\n> Jagan Teki\r\n> Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream\r\n> Maintainer Hyderabad, India.","headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" <u-boot-bounces@lists.denx.de>"}},{"id":1759929,"web_url":"http://patchwork.ozlabs.org/comment/1759929/","msgid":"<CAD6G_RQAyR8Hc3nn2B1USAg31_2zkmaAJ1Ov=7ttt1LiyO-P8A@mail.gmail.com>","list_archive_url":null,"date":"2017-08-30T07:32:39","subject":"Re: [U-Boot] [PATCH v2] spi: fsl_qspi: Add controller busy check\n\tbefore new spi operation","submitter":{"id":20045,"url":"http://patchwork.ozlabs.org/api/people/20045/","name":"Jagan Teki","email":"jagannadh.teki@gmail.com"},"content":"On Wed, Aug 30, 2017 at 12:23 PM, Suresh Gupta <suresh.gupta@nxp.com> wrote:\n>\n>\n>> -----Original Message-----\n>> From: Jagan Teki [mailto:jagannadh.teki@gmail.com]\n>> Sent: Tuesday, August 29, 2017 11:08 PM\n>> To: Suresh Gupta <suresh.gupta@nxp.com>\n>> Cc: u-boot@lists.denx.de; York Sun <york.sun@nxp.com>\n>> Subject: Re: [PATCH v2] spi: fsl_qspi: Add controller busy check before new spi\n>> operation\n>>\n>> On Tue, Aug 29, 2017 at 6:55 PM, Suresh Gupta <suresh.gupta@nxp.com>\n>> wrote:\n>> > It is recommended to check either controller is free to take new spi\n>> > action. The IP_ACC and AHB_ACC bits indicates that the controller is\n>> > busy in IP or AHB mode respectively.\n>> > And the BUSY bit indicates that controller is currently busy handling\n>> > a transaction to an external flash device\n>> >\n>> > Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>\n>> > ---\n>> > Changes in v2:\n>> >\n>> > - Add wait_for_bit instead of while\n>> > - move the busy check code to fsl_qspi_claim_bus form qspi_xfer\n>> >\n>> >  drivers/spi/fsl_qspi.c | 28 +++++++++++++++++++++++++++-\n>> > drivers/spi/fsl_qspi.h |  4 ++++\n>> >  2 files changed, 31 insertions(+), 1 deletion(-)\n>> >\n>> > diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index\n>> > 1dfa89a..ed23aac 100644\n>> > --- a/drivers/spi/fsl_qspi.c\n>> > +++ b/drivers/spi/fsl_qspi.c\n>> > @@ -14,6 +14,7 @@\n>> >  #include <dm.h>\n>> >  #include <errno.h>\n>> >  #include <watchdog.h>\n>> > +#include <wait_bit.h>\n>> >  #include \"fsl_qspi.h\"\n>> >\n>> >  DECLARE_GLOBAL_DATA_PTR;\n>> > @@ -991,7 +992,7 @@ static int fsl_qspi_probe(struct udevice *bus)\n>> >         struct fsl_qspi_platdata *plat = dev_get_platdata(bus);\n>> >         struct fsl_qspi_priv *priv = dev_get_priv(bus);\n>> >         struct dm_spi_bus *dm_spi_bus;\n>> > -       int i;\n>> > +       int i, ret;\n>> >\n>> >         dm_spi_bus = bus->uclass_priv;\n>> >\n>> > @@ -1011,6 +1012,18 @@ static int fsl_qspi_probe(struct udevice *bus)\n>> >         priv->flash_num = plat->flash_num;\n>> >         priv->num_chipselect = plat->num_chipselect;\n>> >\n>>\n>> I think in previous version, this code not added in probe is it? is this because\n>> probe doing mcr and other reg operations?\n>\n> The probe function changes the LUTs, change AHB configuration and change the endianness.\n> So, changing above setting when the controller is busy in some AHB access will affect the running access.\n>>\n>> > +       /* make sure controller is not busy anywhere */\n>> > +       ret = wait_for_bit(__func__, &priv->regs->sr,\n>> > +                          QSPI_SR_BUSY_MASK |\n>> > +                          QSPI_SR_AHB_ACC_MASK |\n>> > +                          QSPI_SR_IP_ACC_MASK,\n>> > +                          false, 1000, false);\n>> > +\n>> > +       if (ret) {\n>> > +               printf(\"ERROR : The controller is busy\\n\");\n>> > +               return -EBUSY;\n>> > +       }\n>>\n>> Better to drop printf or use debug and\n> The error above is trivial and after this error, the sf commands do not work.\n> And if we hide the message under debug, normal user will not understand the issue.\n> As per me this should be printf, what you say?\n\nsf return error code, can't user understand based on that? idea is to\navoid printf's in platform driver.\n\nthanks!","headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"E0qTD28e\"; dkim-atps=neutral"],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xhy0P2nYDz9sP5\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 30 Aug 2017 17:33:08 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid C557FC227B9; Wed, 30 Aug 2017 07:32:45 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id BB249C22724;\n\tWed, 30 Aug 2017 07:32:42 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 0BF37C22397; Wed, 30 Aug 2017 07:32:41 +0000 (UTC)","from mail-lf0-f67.google.com (mail-lf0-f67.google.com\n\t[209.85.215.67])\n\tby lists.denx.de (Postfix) with ESMTPS id 3F105C226C9\n\tfor <u-boot@lists.denx.de>; Wed, 30 Aug 2017 07:32:41 +0000 (UTC)","by mail-lf0-f67.google.com with SMTP id y15so3417658lfd.0\n\tfor <u-boot@lists.denx.de>; Wed, 30 Aug 2017 00:32:41 -0700 (PDT)","by 10.25.222.200 with HTTP; Wed, 30 Aug 2017 00:32:39 -0700 (PDT)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-0.0 required=5.0 tests=FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=Jgj4EZ6W1ODz1G2uIWqWe3nE8Xcid9Gl5oxTZo67WL8=;\n\tb=E0qTD28efvQDfIF5BNO9LxL7yoWjfjgUheynZXcVncKdobMLbSHCmeJEMyqANuVgOW\n\tnti4Z7gfAOv2NQK7cdK2azE8RnG8Qp3P+P8jxunK/wOYJK6rOGvGE0B1hH5BxbOQ2NAe\n\tilP1V7nuuY0IIDY+thb7cKkQLJkewOxexZbs996ywdG1hWBa85vxRHif96Vu8q12PL0O\n\tDOj055HLlroFk0XJIV7mF4d/e2Im0qGxcXqSJ2WbKyrrAcY9pZwKkIJwFx7RF+ClkzNm\n\t3YQ9xQaojHtEieplDP0ZBOixeebOAjRmqfQ0BeIskW6tav0mN3T1TvoyaicdJX+WRXKc\n\tmVfg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=Jgj4EZ6W1ODz1G2uIWqWe3nE8Xcid9Gl5oxTZo67WL8=;\n\tb=k6yPJQYHwN5qK8tWnzfYnJIUOsaYsrK2yhFe5kjIulEbNf81DCo1WIG7eutw49E4s7\n\tbQLOtSK0qf0wGQyfL4qEkjIeca7jo6DjzZ/G0OvjGfkjbJdJdrB2Gau8CCzQ5CpCvcww\n\tNCWj0Tf+z27LqHSmuZxsWnmZlVuLUVWa6EdhkJ/WAx/vDSfK8fqC4VSERPE5ywye7jwN\n\tp+vSoGzV5QYo5YE6+qQEugczE7CHzyNyEOh48Xeh5GaBCxhp1TDa67kVNHAjsEnCS56j\n\tmAZrjnOaVkKMjO6WFAXtcETsSBvv21FYBzOXs3K38i5a4lQ+5HQx+rDgIYlc8ELFFyE2\n\tgD0g==","X-Gm-Message-State":"AHPjjUjvwYHhw01K69T9EJcFP6lKy3mkodcYLEwYtliq9oSm/khQorpv\n\tsO92WXgGENJZocwtofC1w0QsbJKyIg==","X-Received":"by 10.25.56.22 with SMTP id f22mr251649lfa.92.1504078360532; Wed,\n\t30 Aug 2017 00:32:40 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<DB5PR04MB1350913B8F6A1BDDFE6D3253809C0@DB5PR04MB1350.eurprd04.prod.outlook.com>","References":"<1504013105-11480-1-git-send-email-suresh.gupta@nxp.com>\n\t<CAD6G_RSsGDNu2_5_P33iAxCM7qPZ5fKzC0LtbKapc6q61NGgkA@mail.gmail.com>\n\t<DB5PR04MB1350913B8F6A1BDDFE6D3253809C0@DB5PR04MB1350.eurprd04.prod.outlook.com>","From":"Jagan Teki <jagannadh.teki@gmail.com>","Date":"Wed, 30 Aug 2017 13:02:39 +0530","Message-ID":"<CAD6G_RQAyR8Hc3nn2B1USAg31_2zkmaAJ1Ov=7ttt1LiyO-P8A@mail.gmail.com>","To":"Suresh Gupta <suresh.gupta@nxp.com>","Cc":"\"u-boot@lists.denx.de\" <u-boot@lists.denx.de>","Subject":"Re: [U-Boot] [PATCH v2] spi: fsl_qspi: Add controller busy check\n\tbefore new spi operation","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion <u-boot.lists.denx.de>","List-Unsubscribe":"<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>","List-Archive":"<http://lists.denx.de/pipermail/u-boot/>","List-Post":"<mailto:u-boot@lists.denx.de>","List-Help":"<mailto:u-boot-request@lists.denx.de?subject=help>","List-Subscribe":"<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" <u-boot-bounces@lists.denx.de>"}}]