[{"id":1759413,"web_url":"http://patchwork.ozlabs.org/comment/1759413/","msgid":"<0ad72a04-83d2-8db8-2375-0380642cbd66@linaro.org>","list_archive_url":null,"date":"2017-08-29T14:51:48","subject":"Re: [Qemu-devel] [RFC v3 PATCH 3/5] mttcg: Add tcg target default\n\tmemory ordering","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"content":"On 08/28/2017 11:33 PM, Pranith Kumar wrote:\n> Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>\n> ---\n>  tcg/aarch64/tcg-target.h | 2 ++\n>  tcg/arm/tcg-target.h     | 2 ++\n>  tcg/ia64/tcg-target.h    | 2 ++\n>  tcg/mips/tcg-target.h    | 2 ++\n>  tcg/ppc/tcg-target.h     | 2 ++\n>  tcg/s390/tcg-target.h    | 2 ++\n>  tcg/sparc/tcg-target.h   | 2 ++\n>  7 files changed, 14 insertions(+)\n\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\n\n\nr~","headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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\n\tbh=thpuyTi89PF/MxBd8Kqwj95uNLxUhqR4tu6B8ByJmxU=;\n\tb=dBRbL7TR6FgrW2FZbdmwL30Hf3oHd+y7UIt0YMaFBSkPvlXF8hd23ZvNsI30ayDomb\n\t6OQg0gAP6o0aKx42f6X60yzcv/tGSIef4HabEp9ApxGs2CKy7TStQCtSiNBulFKYHTQd\n\tV9Kq7HLiyvvs3meoai5/Fc0+y9XeGmwDs/2BQ=","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:subject:to:cc:references:from:message-id:date\n\t:user-agent:mime-version:in-reply-to:content-language\n\t:content-transfer-encoding;\n\tbh=thpuyTi89PF/MxBd8Kqwj95uNLxUhqR4tu6B8ByJmxU=;\n\tb=MAswpXOBL8Fjc+wYBkgI+YA4CaQ9SSdDjpT325vDo4MFHP9qREJUnrkfeovFEsyXr1\n\t2bs9EFGnZq6EsAe9W/uZkcUnPY5mxtDdXwWVIvd9sHpIRH0AWLzeS9SwotqxtHYiLeD6\n\tOmnZhEEU+OkheHUCNWkOAysaX1Xgw6oRseszlad12kXXIOmL6+TMq3uCSJRQpSYDl5/J\n\tJu/1vRLioNodONmoeGpYGnN4sFi6G8BZFRRiBw/enFfZd7IENRVPV4ioamvPQ8PDJb/+\n\t6/GBJ0PCX2xuCxYHzRitkWa+lYjXtyskc/CAISABbdLvrmHiydOjP8x4O2oK0CJOmhlH\n\tHCrg==","X-Gm-Message-State":"AHYfb5i6HBHLZkmtW9F0xtROvDWjkoTx6HzGushIUdi2RpK1GvuLLVU2\n\tQipsOiBmBiKoKU6k","X-Received":"by 10.99.67.130 with SMTP id q124mr555170pga.73.1504018311734;\n\tTue, 29 Aug 2017 07:51:51 -0700 (PDT)","To":"Pranith Kumar <bobby.prani@gmail.com>, alex.bennee@linaro.org,\n\tClaudio Fontana <claudio.fontana@huawei.com>,\n\tAndrzej Zaborowski <balrogg@gmail.com>, Aurelien Jarno\n\t<aurelien@aurel32.net>, Alexander Graf <agraf@suse.de>,\n\t\"open list:AArch64 target\" <qemu-arm@nongnu.org>,\n\t\"open list:All patches CC here\" <qemu-devel@nongnu.org>","References":"<20170829063313.10237-1-bobby.prani@gmail.com>\n\t<20170829063313.10237-3-bobby.prani@gmail.com>","From":"Richard Henderson <richard.henderson@linaro.org>","Message-ID":"<0ad72a04-83d2-8db8-2375-0380642cbd66@linaro.org>","Date":"Tue, 29 Aug 2017 07:51:48 -0700","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<20170829063313.10237-3-bobby.prani@gmail.com>","Content-Type":"text/plain; charset=utf-8","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400e:c05::22e","Subject":"Re: [Qemu-devel] [RFC v3 PATCH 3/5] mttcg: Add tcg target default\n\tmemory ordering","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Cc":"pbonzini@redhat.com","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"}},{"id":1759426,"web_url":"http://patchwork.ozlabs.org/comment/1759426/","msgid":"<3148d084-9bff-2d8e-f1a7-fba94a1e7f87@linaro.org>","list_archive_url":null,"date":"2017-08-29T15:01:50","subject":"Re: [Qemu-devel] [RFC v3 PATCH 5/5] tcg/softmmu: Increase size of\n\tTLB caches","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"content":"On 08/28/2017 11:33 PM, Pranith Kumar wrote:\n> + * TODO: rewrite this comment\n>   */\n> -#define CPU_TLB_BITS                                             \\\n> -    MIN(8,                                                       \\\n> -        TCG_TARGET_TLB_DISPLACEMENT_BITS - CPU_TLB_ENTRY_BITS -  \\\n> -        (NB_MMU_MODES <= 1 ? 0 :                                 \\\n> -         NB_MMU_MODES <= 2 ? 1 :                                 \\\n> -         NB_MMU_MODES <= 4 ? 2 :                                 \\\n> -         NB_MMU_MODES <= 8 ? 3 : 4))\n> +#define CPU_TLB_BITS MIN(12, TCG_TARGET_TLB_MAX_INDEX_BITS)\n>  \n\nAh, no.  This will cause several builds to fail.\nYou still need to restrict the *total* size of\nthe TLB to TCG_TARGET_TLB_DISPLACEMENT_BITS.\n\n(That's not a 100% accurate statement, but is close.\nSee the QEMU_BUILD_BUG_ON in tcg/*/*.c for specifics.)\n\nThe upshot is that if a target has 2 MMU modes,\nwe can allow them to be bigger.  But if it has 8,\nwe have to make them smaller.\n\nI was expecting you to write\n\n  MIN(MIN(12, TCG_TARGET_TLB_MAX_INDEX_BITS)\n      TCG_TARGET_TLB_DISPLACEMENT_BITS - CPU_TLB_ENTRY_BITS -\n      ...)\n\nr~","headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"MH+azhuR\"; dkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhX2x39Prz9sRV\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 30 Aug 2017 01:03:53 +1000 (AEST)","from localhost ([::1]:45398 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dmi3T-0004St-Cd\n\tfor incoming@patchwork.ozlabs.org; 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Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<20170829063313.10237-5-bobby.prani@gmail.com>","Content-Type":"text/plain; charset=utf-8","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400e:c00::22b","Subject":"Re: [Qemu-devel] [RFC v3 PATCH 5/5] tcg/softmmu: Increase size of\n\tTLB caches","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"}},{"id":1759427,"web_url":"http://patchwork.ozlabs.org/comment/1759427/","msgid":"<125ae0ee-8104-5b52-6b4b-22622ba56191@linaro.org>","list_archive_url":null,"date":"2017-08-29T15:03:39","subject":"Re: [Qemu-devel] [RFC v3 PATCH 5/5] tcg/softmmu: Increase size of\n\tTLB caches","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"content":"On 08/28/2017 11:33 PM, Pranith Kumar wrote:\n> +#if HOST_LONG_BITS == 32 && TARGET_LONG_BITS == 32\n> +#define TCG_TARGET_TLB_MAX_INDEX_BITS 28\n> +#else\n> +#define TCG_TARGET_TLB_MAX_INDEX_BITS 27\n> +#endif\n> +\n\nFor the record, did it not work to actually write (32 - CPU_TLB_BITS)?  I'm not\nfond of repeating the conditions that go into computing CPU_TLB_BITS.\n\n\nr~","headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"ePMpQ46H\"; dkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhX3g5d1qz9sRV\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 30 Aug 2017 01:04:31 +1000 (AEST)","from localhost ([::1]:45399 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dmi45-0004mU-Ix\n\tfor incoming@patchwork.ozlabs.org; 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Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<20170829063313.10237-5-bobby.prani@gmail.com>","Content-Type":"text/plain; charset=utf-8","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400e:c05::236","Subject":"Re: [Qemu-devel] [RFC v3 PATCH 5/5] tcg/softmmu: Increase size of\n\tTLB caches","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"}},{"id":1759511,"web_url":"http://patchwork.ozlabs.org/comment/1759511/","msgid":"<CAJhHMCCgYRTc6yyPkYowV=ie4ZxdFzDEFupUv5EVjbgOzXi_QA@mail.gmail.com>","list_archive_url":null,"date":"2017-08-29T16:23:05","subject":"Re: [Qemu-devel] [RFC v3 PATCH 5/5] tcg/softmmu: Increase size of\n\tTLB caches","submitter":{"id":64653,"url":"http://patchwork.ozlabs.org/api/people/64653/","name":"Pranith Kumar","email":"bobby.prani@gmail.com"},"content":"On Tue, Aug 29, 2017 at 11:01 AM, Richard Henderson\n<richard.henderson@linaro.org> wrote:\n> On 08/28/2017 11:33 PM, Pranith Kumar wrote:\n>> + * TODO: rewrite this comment\n>>   */\n>> -#define CPU_TLB_BITS                                             \\\n>> -    MIN(8,                                                       \\\n>> -        TCG_TARGET_TLB_DISPLACEMENT_BITS - CPU_TLB_ENTRY_BITS -  \\\n>> -        (NB_MMU_MODES <= 1 ? 0 :                                 \\\n>> -         NB_MMU_MODES <= 2 ? 1 :                                 \\\n>> -         NB_MMU_MODES <= 4 ? 2 :                                 \\\n>> -         NB_MMU_MODES <= 8 ? 3 : 4))\n>> +#define CPU_TLB_BITS MIN(12, TCG_TARGET_TLB_MAX_INDEX_BITS)\n>>\n>\n> Ah, no.  This will cause several builds to fail.\n> You still need to restrict the *total* size of\n> the TLB to TCG_TARGET_TLB_DISPLACEMENT_BITS.\n>\n> (That's not a 100% accurate statement, but is close.\n> See the QEMU_BUILD_BUG_ON in tcg/*/*.c for specifics.)\n>\n> The upshot is that if a target has 2 MMU modes,\n> we can allow them to be bigger.  But if it has 8,\n> we have to make them smaller.\n>\n> I was expecting you to write\n>\n>   MIN(MIN(12, TCG_TARGET_TLB_MAX_INDEX_BITS)\n>       TCG_TARGET_TLB_DISPLACEMENT_BITS - CPU_TLB_ENTRY_BITS -\n>       ...)\n\nI see what you mean. I will fix the blunder and send an updated patch.\n\nThanks!","headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"nraI+4jn\"; dkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhYqs1CQfz9t3F\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 30 Aug 2017 02:24:24 +1000 (AEST)","from localhost ([::1]:45959 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dmjJO-0004G1-Fe\n\tfor incoming@patchwork.ozlabs.org; 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\n\tTue, 29 Aug 2017 09:23:36 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<3148d084-9bff-2d8e-f1a7-fba94a1e7f87@linaro.org>","References":"<20170829063313.10237-1-bobby.prani@gmail.com>\n\t<20170829063313.10237-5-bobby.prani@gmail.com>\n\t<3148d084-9bff-2d8e-f1a7-fba94a1e7f87@linaro.org>","From":"Pranith Kumar <bobby.prani@gmail.com>","Date":"Tue, 29 Aug 2017 12:23:05 -0400","Message-ID":"<CAJhHMCCgYRTc6yyPkYowV=ie4ZxdFzDEFupUv5EVjbgOzXi_QA@mail.gmail.com>","To":"Richard Henderson <richard.henderson@linaro.org>","Content-Type":"text/plain; charset=\"UTF-8\"","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:4001:c06::22e","Subject":"Re: [Qemu-devel] [RFC v3 PATCH 5/5] tcg/softmmu: Increase size of\n\tTLB caches","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Cc":"Peter Crosthwaite <crosthwaite.peter@gmail.com>, =?utf-8?q?Alex_Benn?=\n\t=?utf-8?b?w6ll?= <alex.bennee@linaro.org>,\n\tClaudio Fontana <claudio.fontana@huawei.com>, Alexander Graf\n\t<agraf@suse.de>, \t\"open list:Overall\" <qemu-devel@nongnu.org>,\n\t\"open list:AArch64 target\" <qemu-arm@nongnu.org>, \n\tStefan Weil <sw@weilnetz.de>, Paolo Bonzini <pbonzini@redhat.com>, \n\tAurelien Jarno <aurelien@aurel32.net>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"}},{"id":1763275,"web_url":"http://patchwork.ozlabs.org/comment/1763275/","msgid":"<87lgltmjzl.fsf@linaro.org>","list_archive_url":null,"date":"2017-09-05T12:02:22","subject":"Re: [Qemu-devel] [PATCH 1/5] target/arm: Remove stale comment","submitter":{"id":39532,"url":"http://patchwork.ozlabs.org/api/people/39532/","name":"Alex Bennée","email":"alex.bennee@linaro.org"},"content":"Pranith Kumar <bobby.prani@gmail.com> writes:\n\n> Update the comment which is not true since MTTCG.\n\nWhat happened to the cover letter? We seem to have a mix of patches but\nno summary of the overall outcome.\n\n>\n> Reviewed-by: Richard Henderson <rth@twiddle.net>\n> Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>\n> ---\n>  target/arm/translate-a64.c | 4 ----\n>  1 file changed, 4 deletions(-)\n>\n> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c\n> index 2200e25be0..f42b155d7d 100644\n> --- a/target/arm/translate-a64.c\n> +++ b/target/arm/translate-a64.c\n> @@ -2012,10 +2012,6 @@ static void disas_ldst_excl(DisasContext *s, uint32_t insn)\n>      }\n>      tcg_addr = read_cpu_reg_sp(s, rn, 1);\n>\n> -    /* Note that since TCG is single threaded load-acquire/store-release\n> -     * semantics require no extra if (is_lasr) { ... } handling.\n> -     */\n> -\n>      if (is_excl) {\n>          if (!is_store) {\n>              s->is_ldex = true;\n\n\n--\nAlex Bennée","headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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\n\tTue, 05 Sep 2017 05:02:24 -0700 (PDT)","References":"<20170829063313.10237-1-bobby.prani@gmail.com>","User-agent":"mu4e 0.9.19; emacs 25.2.50.3","From":"Alex =?utf-8?q?Benn=C3=A9e?= <alex.bennee@linaro.org>","To":"Pranith Kumar <bobby.prani@gmail.com>","In-reply-to":"<20170829063313.10237-1-bobby.prani@gmail.com>","Date":"Tue, 05 Sep 2017 13:02:22 +0100","Message-ID":"<87lgltmjzl.fsf@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Transfer-Encoding":"8bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2a00:1450:400c:c0c::232","Subject":"Re: [Qemu-devel] [PATCH 1/5] target/arm: Remove stale comment","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Cc":"Peter Maydell <peter.maydell@linaro.org>,\n\t\"open list:ARM\" <qemu-arm@nongnu.org>, qemu-devel@nongnu.org,\n\tpbonzini@redhat.com, rth@twiddle.net","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"}},{"id":1763294,"web_url":"http://patchwork.ozlabs.org/comment/1763294/","msgid":"<87k21dmiro.fsf@linaro.org>","list_archive_url":null,"date":"2017-09-05T12:28:43","subject":"Re: [Qemu-devel] [RFC v3 PATCH 2/5] cpus-common: Cache allocated\n\twork items","submitter":{"id":39532,"url":"http://patchwork.ozlabs.org/api/people/39532/","name":"Alex Bennée","email":"alex.bennee@linaro.org"},"content":"Pranith Kumar <bobby.prani@gmail.com> writes:\n\n> Using heaptrack, I found that quite a few of our temporary allocations\n> are coming from allocating work items. Instead of doing this\n> continously, we can cache the allocated items and reuse them instead\n> of freeing them.\n>\n> Stats from an ARM64 guest (boot+shutdown):\n>\n> heaptrack stats(before):\n>         allocations:            1471317\n>         leaked allocations:     73824\n>         temporary allocations:  651293\n>\n> heaptrack stats(after):\n>         allocations:            1143130\n>         leaked allocations:     73693\n>         temporary allocations:  487342\n>\n> The improvement in speedup is minor and within error margins, however I think the\n> patch is still worth. We can also explore atomics instead of taking a lock for\n> the work item pool.\n\nWhen we where doing the original MTTCG work I looked at using GArray for\nthe work queue, see:\n\n  http://lists.gnu.org/archive/html/qemu-devel/2016-08/msg00367.html\n\nspecifically:\n\n  Subject: [PATCH v5 13/13] cpu-exec: replace cpu->queued_work with GArray\n  Date: Tue,  2 Aug 2016 18:27:44 +0100\n  Message-Id: <1470158864-17651-14-git-send-email-alex.bennee@linaro.org>\n\nwhich I personally think might yield better results than messing around\nwith custom allocators and GSlice and the like. You still get the\ndynamic sizing of a malloc based array but for operations like insertion\nand iterating through the work queue should be cache friendly.\n\nOnce the array has (transparently) reached a reasonable size to service\nall allocations in the usual servicing period the same memory can be\nused over and over again ;-)\n\nMy fondness for arrays is informed by comments by Bjarne Stroustrup:\n\n  https://www.youtube.com/watch?v=YQs6IC-vgmo\n\nObviously this patch would need to be re-worked given how much the code\nhas changes since it was merged.\n\n>\n> Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>\n> ---\n>  cpus-common.c | 75 +++++++++++++++++++++++++++++++++++++++++++++++------------\n>  1 file changed, 60 insertions(+), 15 deletions(-)\n>\n> diff --git a/cpus-common.c b/cpus-common.c\n> index 59f751ecf9..ccf5f50e4e 100644\n> --- a/cpus-common.c\n> +++ b/cpus-common.c\n> @@ -24,6 +24,7 @@\n>  #include \"sysemu/cpus.h\"\n>\n>  static QemuMutex qemu_cpu_list_lock;\n> +static QemuMutex qemu_wi_pool_lock;\n>  static QemuCond exclusive_cond;\n>  static QemuCond exclusive_resume;\n>  static QemuCond qemu_work_cond;\n> @@ -33,6 +34,49 @@ static QemuCond qemu_work_cond;\n>   */\n>  static int pending_cpus;\n>\n> +typedef struct qemu_work_item {\n> +    struct qemu_work_item *next;\n> +    run_on_cpu_func func;\n> +    run_on_cpu_data data;\n> +    bool free, exclusive, done;\n> +} qemu_work_item;\n> +\n> +typedef struct qemu_wi_pool {\n> +    qemu_work_item *head;\n> +    int num_items;\n> +} qemu_wi_pool;\n> +\n> +qemu_wi_pool *wi_free_pool;\n> +\n> +static void qemu_init_workitem_pool(void)\n> +{\n> +    wi_free_pool = g_malloc0(sizeof(qemu_wi_pool));\n> +}\n> +\n> +static void qemu_wi_pool_insert(qemu_work_item *item)\n> +{\n> +    qemu_mutex_lock(&qemu_wi_pool_lock);\n> +    qemu_work_item *curr = atomic_read(&wi_free_pool->head);\n> +    item->next = curr;\n> +    wi_free_pool->head = item;\n> +    qemu_mutex_unlock(&qemu_wi_pool_lock);\n> +}\n> +\n> +static qemu_work_item *qemu_wi_pool_remove(void)\n> +{\n> +    qemu_mutex_lock(&qemu_wi_pool_lock);\n> +    qemu_work_item *curr = atomic_read(&wi_free_pool->head);\n> +    if (curr == NULL) {\n> +        goto out;\n> +    }\n> +    wi_free_pool->head = curr->next;\n> +    curr->next = NULL;\n> +\n> + out:\n> +    qemu_mutex_unlock(&qemu_wi_pool_lock);\n> +    return curr;\n> +}\n> +\n>  void qemu_init_cpu_list(void)\n>  {\n>      /* This is needed because qemu_init_cpu_list is also called by the\n> @@ -43,6 +87,9 @@ void qemu_init_cpu_list(void)\n>      qemu_cond_init(&exclusive_cond);\n>      qemu_cond_init(&exclusive_resume);\n>      qemu_cond_init(&qemu_work_cond);\n> +\n> +    qemu_init_workitem_pool();\n> +    qemu_mutex_init(&qemu_wi_pool_lock);\n>  }\n>\n>  void cpu_list_lock(void)\n> @@ -106,14 +153,7 @@ void cpu_list_remove(CPUState *cpu)\n>      qemu_mutex_unlock(&qemu_cpu_list_lock);\n>  }\n>\n> -struct qemu_work_item {\n> -    struct qemu_work_item *next;\n> -    run_on_cpu_func func;\n> -    run_on_cpu_data data;\n> -    bool free, exclusive, done;\n> -};\n> -\n> -static void queue_work_on_cpu(CPUState *cpu, struct qemu_work_item *wi)\n> +static void queue_work_on_cpu(CPUState *cpu, qemu_work_item *wi)\n>  {\n>      qemu_mutex_lock(&cpu->work_mutex);\n>      if (cpu->queued_work_first == NULL) {\n> @@ -132,7 +172,7 @@ static void queue_work_on_cpu(CPUState *cpu, struct qemu_work_item *wi)\n>  void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data,\n>                     QemuMutex *mutex)\n>  {\n> -    struct qemu_work_item wi;\n> +    qemu_work_item wi;\n>\n>      if (qemu_cpu_is_self(cpu)) {\n>          func(cpu, data);\n> @@ -156,9 +196,11 @@ void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data,\n>\n>  void async_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data)\n>  {\n> -    struct qemu_work_item *wi;\n> +    qemu_work_item *wi = qemu_wi_pool_remove();\n>\n> -    wi = g_malloc0(sizeof(struct qemu_work_item));\n> +    if (!wi) {\n> +        wi = g_malloc0(sizeof(qemu_work_item));\n> +    }\n>      wi->func = func;\n>      wi->data = data;\n>      wi->free = true;\n> @@ -299,9 +341,11 @@ void cpu_exec_end(CPUState *cpu)\n>  void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_func func,\n>                             run_on_cpu_data data)\n>  {\n> -    struct qemu_work_item *wi;\n> +    qemu_work_item *wi = qemu_wi_pool_remove();\n>\n> -    wi = g_malloc0(sizeof(struct qemu_work_item));\n> +    if (!wi) {\n> +        wi = g_malloc0(sizeof(qemu_work_item));\n> +    }\n>      wi->func = func;\n>      wi->data = data;\n>      wi->free = true;\n> @@ -312,7 +356,7 @@ void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_func func,\n>\n>  void process_queued_cpu_work(CPUState *cpu)\n>  {\n> -    struct qemu_work_item *wi;\n> +    qemu_work_item *wi;\n>\n>      if (cpu->queued_work_first == NULL) {\n>          return;\n> @@ -343,7 +387,8 @@ void process_queued_cpu_work(CPUState *cpu)\n>          }\n>          qemu_mutex_lock(&cpu->work_mutex);\n>          if (wi->free) {\n> -            g_free(wi);\n> +            memset(wi, 0, sizeof(qemu_work_item));\n> +            qemu_wi_pool_insert(wi);\n>          } else {\n>              atomic_mb_set(&wi->done, true);\n>          }\n\n\n--\nAlex Bennée","headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"APNu1eVa\"; dkim-atps=neutral"],"Received":["from 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<bobby.prani@gmail.com>","In-reply-to":"<20170829063313.10237-2-bobby.prani@gmail.com>","Date":"Tue, 05 Sep 2017 13:28:43 +0100","Message-ID":"<87k21dmiro.fsf@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Transfer-Encoding":"8bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2a00:1450:400c:c0c::22b","Subject":"Re: [Qemu-devel] [RFC v3 PATCH 2/5] cpus-common: Cache allocated\n\twork items","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Cc":"Paolo Bonzini <pbonzini@redhat.com>,\n\tSergey Fedorov <serge.fdrv@gmail.com>, \n\tqemu-devel@nongnu.org, Richard Henderson <rth@twiddle.net>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"}},{"id":1763741,"web_url":"http://patchwork.ozlabs.org/comment/1763741/","msgid":"<CAJhHMCBy-rh9o+HymcVVHh4RGcHbrVzQXK7rtvRf2aJ-afSSiw@mail.gmail.com>","list_archive_url":null,"date":"2017-09-06T00:35:14","subject":"Re: [Qemu-devel] [PATCH 1/5] target/arm: Remove stale comment","submitter":{"id":64653,"url":"http://patchwork.ozlabs.org/api/people/64653/","name":"Pranith Kumar","email":"bobby.prani@gmail.com"},"content":"Hi Alex,\n\nOn Tue, Sep 5, 2017 at 8:02 AM, Alex Bennée <alex.bennee@linaro.org> wrote:\n>\n> Pranith Kumar <bobby.prani@gmail.com> writes:\n>\n>> Update the comment which is not true since MTTCG.\n>\n> What happened to the cover letter? We seem to have a mix of patches but\n> no summary of the overall outcome.\n>\n\nThese are a bunch of unrelated patches, so there is no theme. I will\ninclude a cover letter saying so from now on.\n\nThanks,","headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"HsFenR7c\"; dkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xn4QC4pcjz9t2y\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed,  6 Sep 2017 10:36:19 +1000 (AEST)","from localhost ([::1]:33649 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dpOKH-00047M-Re\n\tfor incoming@patchwork.ozlabs.org; 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