[{"id":1759155,"web_url":"http://patchwork.ozlabs.org/comment/1759155/","msgid":"<20170829091825.aye2ulcurnhs24uw@earth>","list_archive_url":null,"date":"2017-08-29T09:18:26","subject":"Re: [PATCH 08/17] ARM: dts: Add missing hsi node for omap4","submitter":{"id":71508,"url":"http://patchwork.ozlabs.org/api/people/71508/","name":"Sebastian Reichel","email":"sebastian.reichel@collabora.co.uk"},"content":"Hi,\n\nOn Mon, Aug 28, 2017 at 02:19:09PM -0700, Tony Lindgren wrote:\n> On omap4 we're missing the hsi node with it's related \"ti,hwmods\"\n> property that the SoC interconnect code needs.\n> \n> Note that this will only show up as a bug with \"doesn't have\n> mpu register target base\" boot errors when the legacy platform\n> data is removed.\n> \n> Let's also update the binding accrodingly while at it.\n> \n> Cc: Sebastian Reichel \n> Signed-off-by: Tony Lindgren \n> ---\n> Documentation/devicetree/bindings/hsi/omap-ssi.txt | 6 +++++-\n> arch/arm/boot/dts/omap4.dtsi | 9 +++++++++\n> 2 files changed, 14 insertions(+), 1 deletion(-)\n> \n> diff --git a/Documentation/devicetree/bindings/hsi/omap-ssi.txt b/Documentation/devicetree/bindings/hsi/omap-ssi.txt\n> --- a/Documentation/devicetree/bindings/hsi/omap-ssi.txt\n> +++ b/Documentation/devicetree/bindings/hsi/omap-ssi.txt\n> @@ -4,7 +4,7 @@ OMAP Synchronous Serial Interface (SSI) controller implements a legacy\n> variant of MIPI's High Speed Synchronous Serial Interface (HSI).\n> \n> Required properties:\n> -- compatible:\t\tShould include \"ti,omap3-ssi\".\n> +- compatible:\t\tShould include \"ti,omap3-ssi\" or \"ti,omap4-hsi\"\n> - reg-names:\t\tContains the values \"sys\" and \"gdd\" (in this order).\n> - reg:\t\t\tContains a matching register specifier for each entry\n> \t\t\tin reg-names.\n> @@ -38,6 +38,10 @@ Required Port sub-node properties:\n> \t\t\tproperty. If it's missing the port will not be\n> \t\t\tenabled.\n> \n> +Optional properties:\n> +- ti,hwmods:\t\tShall contain TI interconnect module name if needed\n> +\t\t\tby the SoC\n> +\n> Example for Nokia N900:\n> \n> ssi-controller@48058000 {\n> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi\n> --- a/arch/arm/boot/dts/omap4.dtsi\n> +++ b/arch/arm/boot/dts/omap4.dtsi\n> @@ -632,6 +632,15 @@\n> \t\t\tdma-names = \"tx\", \"rx\";\n> \t\t};\n> \n> +\t\thsi: hsi@4a058000 {\n> +\t\t\tcompatible = \"ti,omap4-hsi\";\n> +\t\t\treg = <0x4a058000 0x4000>;\n> +\t\t\tinterrupts = ,\n> +\t\t\t\t ,\n> +\t\t\t\t ;\n> +\t\t\tti,hwmods = \"hsi\";\n> +\t\t};\n> +\n\nThis does not follow the binding, which expects one subnode per\nport and splits memory areas + interrupts accordingly. Fortunately\nHSI is properly documented in the public OMAP4 TRM (in opposit to\nSSI, which is missing completly in OMAP3 TRM). I think the node\nshould look like this:\n\nhsi: hsi@4a058000 {\n compatible = \"ti,omap4-hsi\";\n ti,hwmods = \"hsi\";\n\n reg = <0x4a058000 0x5000>,\n <0x4a058000 0x1000>;\n reg-names = \"sys\", \"gdd\";\n\n clocks = <&hsi_fck>;\n clock-names = \"hsi_fck\";\n\n interrupts = <71>;\n interrupt-names = \"gdd_mpu\";\n\n #address-cells = <1>;\n #size-cells = <1>;\n ranges;\n\n hsi_port1: hsi-port@4a05a000 {\n compatible = \"ti,omap4-hsi-port\";\n\n reg = <0x4a05a000 0x800>,\n <0x4a05a800 0x800>;\n reg-names = \"tx\", \"rx\";\n\n interrupt-parent = <&intc>;\n interrupts = <67>;\n };\n\n hsi_port2: hsi-port@4a05b000 {\n compatible = \"ti,omap4-hsi-port\";\n\n reg = <0x4a05b000 0x800>,\n <0x4a05b800 0x800>;\n reg-names = \"tx\", \"rx\";\n\n interrupt-parent = <&intc>;\n interrupts = <68>;\n };\n};\n\n-- Sebastian\n\n> \t\tmmu_dsp: mmu@4a066000 {\n> \t\t\tcompatible = \"ti,omap4-iommu\";\n> \t\t\treg = <0x4a066000 0x100>;\n> -- \n> 2.14.1","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xhNNT0Hn8z9t33\n\tfor ;\n\tTue, 29 Aug 2017 19:18:32 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751806AbdH2JSb (ORCPT\n\t);\n\tTue, 29 Aug 2017 05:18:31 -0400","from bhuna.collabora.co.uk ([46.235.227.227]:55928 \"EHLO\n\tbhuna.collabora.co.uk\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751579AbdH2JSa (ORCPT\n\t); Tue, 29 Aug 2017 05:18:30 -0400","from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender:\n\tsre) with ESMTPSA id 0EB1126B43B"],"Date":"Tue, 29 Aug 2017 11:18:26 +0200","From":"Sebastian Reichel ","To":"Tony Lindgren ","Cc":"linux-omap@vger.kernel.org, =?iso-8859-1?q?Beno=EEt?=\n\tCousson , devicetree@vger.kernel.org","Subject":"Re: [PATCH 08/17] ARM: dts: Add missing hsi node for omap4","Message-ID":"<20170829091825.aye2ulcurnhs24uw@earth>","References":"<20170828211918.11573-1-tony@atomide.com>\n\t<20170828211918.11573-9-tony@atomide.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha512;\n\tprotocol=\"application/pgp-signature\"; boundary=\"n4tm2jdowwc2si3m\"","Content-Disposition":"inline","In-Reply-To":"<20170828211918.11573-9-tony@atomide.com>","User-Agent":"NeoMutt/20170609 (1.8.3)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1759383,"web_url":"http://patchwork.ozlabs.org/comment/1759383/","msgid":"<20170829142029.GS6008@atomide.com>","list_archive_url":null,"date":"2017-08-29T14:20:30","subject":"Re: [PATCH 08/17] ARM: dts: Add missing hsi node for omap4","submitter":{"id":365,"url":"http://patchwork.ozlabs.org/api/people/365/","name":"Tony Lindgren","email":"tony@atomide.com"},"content":"* Sebastian Reichel [170829 02:18]:\n> Hi,\n> \n> On Mon, Aug 28, 2017 at 02:19:09PM -0700, Tony Lindgren wrote:\n> > On omap4 we're missing the hsi node with it's related \"ti,hwmods\"\n> > property that the SoC interconnect code needs.\n> > \n> > Note that this will only show up as a bug with \"doesn't have\n> > mpu register target base\" boot errors when the legacy platform\n> > data is removed.\n> > \n> > Let's also update the binding accrodingly while at it.\n> > \n> > Cc: Sebastian Reichel \n> > Signed-off-by: Tony Lindgren \n> > ---\n> > Documentation/devicetree/bindings/hsi/omap-ssi.txt | 6 +++++-\n> > arch/arm/boot/dts/omap4.dtsi | 9 +++++++++\n> > 2 files changed, 14 insertions(+), 1 deletion(-)\n> > \n> > diff --git a/Documentation/devicetree/bindings/hsi/omap-ssi.txt b/Documentation/devicetree/bindings/hsi/omap-ssi.txt\n> > --- a/Documentation/devicetree/bindings/hsi/omap-ssi.txt\n> > +++ b/Documentation/devicetree/bindings/hsi/omap-ssi.txt\n> > @@ -4,7 +4,7 @@ OMAP Synchronous Serial Interface (SSI) controller implements a legacy\n> > variant of MIPI's High Speed Synchronous Serial Interface (HSI).\n> > \n> > Required properties:\n> > -- compatible:\t\tShould include \"ti,omap3-ssi\".\n> > +- compatible:\t\tShould include \"ti,omap3-ssi\" or \"ti,omap4-hsi\"\n> > - reg-names:\t\tContains the values \"sys\" and \"gdd\" (in this order).\n> > - reg:\t\t\tContains a matching register specifier for each entry\n> > \t\t\tin reg-names.\n> > @@ -38,6 +38,10 @@ Required Port sub-node properties:\n> > \t\t\tproperty. If it's missing the port will not be\n> > \t\t\tenabled.\n> > \n> > +Optional properties:\n> > +- ti,hwmods:\t\tShall contain TI interconnect module name if needed\n> > +\t\t\tby the SoC\n> > +\n> > Example for Nokia N900:\n> > \n> > ssi-controller@48058000 {\n> > diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi\n> > --- a/arch/arm/boot/dts/omap4.dtsi\n> > +++ b/arch/arm/boot/dts/omap4.dtsi\n> > @@ -632,6 +632,15 @@\n> > \t\t\tdma-names = \"tx\", \"rx\";\n> > \t\t};\n> > \n> > +\t\thsi: hsi@4a058000 {\n> > +\t\t\tcompatible = \"ti,omap4-hsi\";\n> > +\t\t\treg = <0x4a058000 0x4000>;\n> > +\t\t\tinterrupts = ,\n> > +\t\t\t\t ,\n> > +\t\t\t\t ;\n> > +\t\t\tti,hwmods = \"hsi\";\n> > +\t\t};\n> > +\n> \n> This does not follow the binding, which expects one subnode per\n> port and splits memory areas + interrupts accordingly. Fortunately\n> HSI is properly documented in the public OMAP4 TRM (in opposit to\n> SSI, which is missing completly in OMAP3 TRM). I think the node\n> should look like this:\n\nOK sure let's add the subnodes too :)\n\n> hsi: hsi@4a058000 {\n> compatible = \"ti,omap4-hsi\";\n> ti,hwmods = \"hsi\";\n> \n> reg = <0x4a058000 0x5000>,\n> <0x4a058000 0x1000>;\n> reg-names = \"sys\", \"gdd\";\n\nThe module size is 0x4000 in the hardware. Then there's the L4\ninterconnect registers at 0x5c000 0x1000:\n\n\treg = <0x4a058000 0x4000>,\n\t <0x4a05c000 0x1000>;\n\treg-names = \"sys\", \"gdd\";\n\nHmm, what's the \"gdd\" name for? Probably it would be be to use \"ta\"\nthere for \"target agent\" as that's generic and available for every\nmodule.\n\n> clocks = <&hsi_fck>;\n> clock-names = \"hsi_fck\";\n> \n> interrupts = <71>;\n> interrupt-names = \"gdd_mpu\";\n\nAnd the interrupts need to be mapped for omap4. I'll post\nv2 with the subnodes.\n\nRegards,\n\nTony\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xhW4z4Hqgz9t3P\n\tfor ;\n\tWed, 30 Aug 2017 00:20:35 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753036AbdH2OUe convert rfc822-to-8bit (ORCPT\n\t);\n\tTue, 29 Aug 2017 10:20:34 -0400","from muru.com ([72.249.23.125]:38360 \"EHLO muru.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1753031AbdH2OUd (ORCPT );\n\tTue, 29 Aug 2017 10:20:33 -0400","from atomide.com (localhost [127.0.0.1])\n\tby muru.com (Postfix) with ESMTPS id AB39B813A;\n\tTue, 29 Aug 2017 14:20:53 +0000 (UTC)"],"Date":"Tue, 29 Aug 2017 07:20:30 -0700","From":"Tony Lindgren ","To":"Sebastian Reichel ","Cc":"linux-omap@vger.kernel.org, =?utf-8?q?Beno=C3=AEt?=\n\tCousson , devicetree@vger.kernel.org","Subject":"Re: [PATCH 08/17] ARM: dts: Add missing hsi node for omap4","Message-ID":"<20170829142029.GS6008@atomide.com>","References":"<20170828211918.11573-1-tony@atomide.com>\n\t<20170828211918.11573-9-tony@atomide.com>\n\t<20170829091825.aye2ulcurnhs24uw@earth>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","Content-Transfer-Encoding":"8BIT","In-Reply-To":"<20170829091825.aye2ulcurnhs24uw@earth>","User-Agent":"Mutt/1.8.3 (2017-05-23)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]