[{"id":1758861,"web_url":"http://patchwork.ozlabs.org/comment/1758861/","msgid":"<8c0ecbf6-26fb-1998-6bb5-0a74d9daa2ab@ti.com>","list_archive_url":null,"date":"2017-08-28T21:34:38","subject":"Re: [PATCH 17/17] ARM: dts: Add missing hwmod related properties for\n\tdra7","submitter":{"id":3217,"url":"http://patchwork.ozlabs.org/api/people/3217/","name":"Nishanth Menon","email":"nm@ti.com"},"content":"On 08/28/2017 04:19 PM, Tony Lindgren wrote:\n> On dra7 we're missing the smartreflex and hdq nodes with their\n> related \"ti,hwmods\" property that the SoC interconnect code needs.\n> \n> Note that this will only show up as a bug with \"doesn't have\n> mpu register target base\" boot errors when the legacy platform\n> data is removed.\n> \n> Note that the related driver also needs to be updated to probe\n> using device tree and get the platform data passed to it using\n> auxdata with arch/arm/mach-omap2/pdata-quirks.c.\n> \n> Let's also update the related binding documentation while at it.\n> \n> Cc: Nishanth Menon \n> Cc: Rafael J. Wysocki \n> Cc: Tero Kristo \n> Signed-off-by: Tony Lindgren \n> ---\n> .../devicetree/bindings/power/ti-smartreflex.txt | 2 ++\n> arch/arm/boot/dts/dra7.dtsi | 20 ++++++++++++++++++++\n> 2 files changed, 22 insertions(+)\n> \n> diff --git a/Documentation/devicetree/bindings/power/ti-smartreflex.txt b/Documentation/devicetree/bindings/power/ti-smartreflex.txt\n> --- a/Documentation/devicetree/bindings/power/ti-smartreflex.txt\n> +++ b/Documentation/devicetree/bindings/power/ti-smartreflex.txt\n> @@ -11,6 +11,8 @@ compatible: Shall be one of the following:\n> \t \"ti,omap4-smartreflex-core\"\n> \t \"ti,omap4-smartreflex-mpu\"\n> \t \"ti,omap4-smartreflex-iva\"\n> +\t \"ti,dra7-smartreflex-core\"\n> +\t \"ti,dra7-smartreflex-mpu\"\n> \n> reg: Shall contain the device instance IO range\n> \n> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi\n> --- a/arch/arm/boot/dts/dra7.dtsi\n> +++ b/arch/arm/boot/dts/dra7.dtsi\n> @@ -457,6 +457,7 @@\n> \t\t\t#dma-cells = <1>;\n> \t\t\tdma-channels = <32>;\n> \t\t\tdma-requests = <127>;\n> +\t\t\tti,hwmods = \"dma_system\";\n> \t\t};\n> \n> \t\tedma: edma@43300000 {\n> @@ -1069,6 +1070,13 @@\n> \t\t\tmax-frequency = <192000000>;\n> \t\t};\n> \n> +\t\thdqw1w: 1w@480b2000 {\n> +\t\t\tcompatible = \"ti,omap3-1w\";\n> +\t\t\treg = <0x480b2000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tti,hwmods = \"hdq1w\";\n> +\t\t};\n> +\n> \t\tmmc2: mmc@480b4000 {\n> \t\t\tcompatible = \"ti,omap4-hsmmc\";\n> \t\t\treg = <0x480b4000 0x400>;\n> @@ -1489,6 +1497,18 @@\n> \t\t\t};\n> \t\t};\n> \n> +\t\tsmartreflex_core: smartreflex4a0dd000 {\n> +\t\t\tcompatible = \"ti,dra7-smartreflex-core\";\n> +\t\t\tti,hwmods = \"smartreflex_core\";\n> +\t\t\treg = <0x4a0dd000 0x80>;\n> +\t\t};\n> +\n> +\t\tsmartreflex_mpu: smartreflex@4a0d9000 {\n> +\t\t\tcompatible = \"ti,dra7-smartreflex-mpu\";\n> +\t\t\tti,hwmods = \"smartreflex_mpu\";\n> +\t\t\treg = <0x4a0d9000 0x80>;\n> +\t\t};\n\n\nHave you checked TRM for these? \nhttp://www.ti.com/lit/ug/sprui30d/sprui30d.pdf\n\nThese are disabled on the SoC and marked as reserved.","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=ti.com header.i=@ti.com header.b=\"bBlw82Ru\"; \n\tdkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xh54y5Zydz9s72\n\tfor ;\n\tTue, 29 Aug 2017 07:49:06 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751300AbdH1Veq (ORCPT\n\t);\n\tMon, 28 Aug 2017 17:34:46 -0400","from lelnx194.ext.ti.com ([198.47.27.80]:36784 \"EHLO\n\tlelnx194.ext.ti.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751332AbdH1Veo (ORCPT\n\t); Mon, 28 Aug 2017 17:34:44 -0400","from dlelxv90.itg.ti.com ([172.17.2.17])\n\tby lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v7SLYdrA011994; \n\tMon, 28 Aug 2017 16:34:39 -0500","from DFLE106.ent.ti.com (dfle106.ent.ti.com [10.64.6.27])\n\tby dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7SLYdDe016051; \n\tMon, 28 Aug 2017 16:34:39 -0500","from DFLE103.ent.ti.com (10.64.6.24) by DFLE106.ent.ti.com\n\t(10.64.6.27) with Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34;\n\tMon, 28 Aug 2017 16:34:38 -0500","from dlep32.itg.ti.com (157.170.170.100) by DFLE103.ent.ti.com\n\t(10.64.6.24) with Microsoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend\n\tTransport; Mon, 28 Aug 2017 16:34:38 -0500","from [128.247.59.124] (ileax41-snat.itg.ti.com [10.172.224.153])\n\tby dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7SLYcRT027036;\n\tMon, 28 Aug 2017 16:34:38 -0500"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1503956079;\n\tbh=SmT2ZRQI2c2vnZchFTFwhiwiAxkId0FJeknDf1nOE7Q=;\n\th=Subject:To:CC:References:From:Date:In-Reply-To;\n\tb=bBlw82RuuoGcYckcyXaaqyO4u1gW8GemG6LXT90roZaBJbHyU+en1Egmp4cAAPSq4\n\tuWAwDTrjKOwBSJ7JI37yavEbiLohHJGduOk6eCKLE/qOSGQcV7KPH+rllFVCCMzsY0\n\tsGT0EA6QjJSlBsyWrTPRzBNcELCIbpM3aoPQuxNI=","Subject":"Re: [PATCH 17/17] ARM: dts: Add missing hwmod related properties for\n\tdra7","To":"Tony Lindgren , ","CC":"=?utf-8?q?Beno=C3=AEt_Cousson?= ,\n\t, \"Rafael J . Wysocki\"\n\t, Tero Kristo ","References":"<20170828211918.11573-1-tony@atomide.com>\n\t<20170828211918.11573-18-tony@atomide.com>","From":"Nishanth Menon ","Message-ID":"<8c0ecbf6-26fb-1998-6bb5-0a74d9daa2ab@ti.com>","Date":"Mon, 28 Aug 2017 16:34:38 -0500","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<20170828211918.11573-18-tony@atomide.com>","Content-Type":"text/plain; charset=\"utf-8\"; format=flowed","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","X-EXCLAIMER-MD-CONFIG":"e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1758862,"web_url":"http://patchwork.ozlabs.org/comment/1758862/","msgid":"<20170828213753.GP6008@atomide.com>","list_archive_url":null,"date":"2017-08-28T21:37:53","subject":"Re: [PATCH 17/17] ARM: dts: Add missing hwmod related properties for\n\tdra7","submitter":{"id":365,"url":"http://patchwork.ozlabs.org/api/people/365/","name":"Tony Lindgren","email":"tony@atomide.com"},"content":"* Nishanth Menon [170828 14:35]:\n> On 08/28/2017 04:19 PM, Tony Lindgren wrote:\n> > On dra7 we're missing the smartreflex and hdq nodes with their\n> > related \"ti,hwmods\" property that the SoC interconnect code needs.\n> > \n> > Note that this will only show up as a bug with \"doesn't have\n> > mpu register target base\" boot errors when the legacy platform\n> > data is removed.\n> > \n> > Note that the related driver also needs to be updated to probe\n> > using device tree and get the platform data passed to it using\n> > auxdata with arch/arm/mach-omap2/pdata-quirks.c.\n> > \n> > Let's also update the related binding documentation while at it.\n...\n> > @@ -1489,6 +1497,18 @@\n> > \t\t\t};\n> > \t\t};\n> > +\t\tsmartreflex_core: smartreflex4a0dd000 {\n> > +\t\t\tcompatible = \"ti,dra7-smartreflex-core\";\n> > +\t\t\tti,hwmods = \"smartreflex_core\";\n> > +\t\t\treg = <0x4a0dd000 0x80>;\n> > +\t\t};\n> > +\n> > +\t\tsmartreflex_mpu: smartreflex@4a0d9000 {\n> > +\t\t\tcompatible = \"ti,dra7-smartreflex-mpu\";\n> > +\t\t\tti,hwmods = \"smartreflex_mpu\";\n> > +\t\t\treg = <0x4a0d9000 0x80>;\n> > +\t\t};\n> \n> \n> Have you checked TRM for these?\n> http://www.ti.com/lit/ug/sprui30d/sprui30d.pdf\n> \n> These are disabled on the SoC and marked as reserved.\n\nThen why do we still have legacy hwmod data for them?\n\nRegards,\n\nTony\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xh54z6zR0z9s7v\n\tfor ;\n\tTue, 29 Aug 2017 07:49:07 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751523AbdH1Vh6 (ORCPT\n\t);\n\tMon, 28 Aug 2017 17:37:58 -0400","from muru.com ([72.249.23.125]:38304 \"EHLO muru.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751386AbdH1Vh4 (ORCPT );\n\tMon, 28 Aug 2017 17:37:56 -0400","from atomide.com (localhost [127.0.0.1])\n\tby muru.com (Postfix) with ESMTPS id 501DD826A;\n\tMon, 28 Aug 2017 21:38:16 +0000 (UTC)"],"Date":"Mon, 28 Aug 2017 14:37:53 -0700","From":"Tony Lindgren ","To":"Nishanth Menon ","Cc":"linux-omap@vger.kernel.org, =?utf-8?q?Beno=C3=AEt?=\n\tCousson , devicetree@vger.kernel.org,\n\t\"Rafael J . Wysocki\" , \n\tTero Kristo ","Subject":"Re: [PATCH 17/17] ARM: dts: Add missing hwmod related properties for\n\tdra7","Message-ID":"<20170828213753.GP6008@atomide.com>","References":"<20170828211918.11573-1-tony@atomide.com>\n\t<20170828211918.11573-18-tony@atomide.com>\n\t<8c0ecbf6-26fb-1998-6bb5-0a74d9daa2ab@ti.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<8c0ecbf6-26fb-1998-6bb5-0a74d9daa2ab@ti.com>","User-Agent":"Mutt/1.8.3 (2017-05-23)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1758866,"web_url":"http://patchwork.ozlabs.org/comment/1758866/","msgid":"","list_archive_url":null,"date":"2017-08-28T21:52:53","subject":"Re: [PATCH 17/17] ARM: dts: Add missing hwmod related properties for\n\tdra7","submitter":{"id":3217,"url":"http://patchwork.ozlabs.org/api/people/3217/","name":"Nishanth Menon","email":"nm@ti.com"},"content":"On 08/28/2017 04:37 PM, Tony Lindgren wrote:\n> * Nishanth Menon [170828 14:35]:\n>> On 08/28/2017 04:19 PM, Tony Lindgren wrote:\n>>> On dra7 we're missing the smartreflex and hdq nodes with their\n>>> related \"ti,hwmods\" property that the SoC interconnect code needs.\n>>>\n>>> Note that this will only show up as a bug with \"doesn't have\n>>> mpu register target base\" boot errors when the legacy platform\n>>> data is removed.\n>>>\n>>> Note that the related driver also needs to be updated to probe\n>>> using device tree and get the platform data passed to it using\n>>> auxdata with arch/arm/mach-omap2/pdata-quirks.c.\n>>>\n>>> Let's also update the related binding documentation while at it.\n> ...\n>>> @@ -1489,6 +1497,18 @@\n>>> \t\t\t};\n>>> \t\t};\n>>> +\t\tsmartreflex_core: smartreflex4a0dd000 {\n>>> +\t\t\tcompatible = \"ti,dra7-smartreflex-core\";\n>>> +\t\t\tti,hwmods = \"smartreflex_core\";\n>>> +\t\t\treg = <0x4a0dd000 0x80>;\n>>> +\t\t};\n>>> +\n>>> +\t\tsmartreflex_mpu: smartreflex@4a0d9000 {\n>>> +\t\t\tcompatible = \"ti,dra7-smartreflex-mpu\";\n>>> +\t\t\tti,hwmods = \"smartreflex_mpu\";\n>>> +\t\t\treg = <0x4a0d9000 0x80>;\n>>> +\t\t};\n>>\n>>\n>> Have you checked TRM for these?\n>> http://www.ti.com/lit/ug/sprui30d/sprui30d.pdf\n>>\n>> These are disabled on the SoC and marked as reserved.\n> \n> Then why do we still have legacy hwmod data for them?\n\nWe should probably drop them - probably legacy of autogeneration at \nsome point in history.","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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Mon, 28 Aug 2017 16:52:53 -0500","from [128.247.59.124] (ileax41-snat.itg.ti.com [10.172.224.153])\n\tby dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7SLqrPi016983;\n\tMon, 28 Aug 2017 16:52:53 -0500"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1503957173;\n\tbh=mJw4FRL032Wvdf6UXIo47lMCNA/vq4n5E5MKhIIorBY=;\n\th=Subject:To:CC:References:From:Date:In-Reply-To;\n\tb=eU5TwoKDVItkio44NPhFs5F3zdeC0iIKBeHSHcPS5B2qLZ9Xv3pe2gKqnifN7vR6g\n\tmFo8r2Rl+/T4FRp0LWiyLRCWq13He+hec6lbk5kuFMLVygq6vXn7H4FXBW5cJe/4rZ\n\t63FBX5SKgjRSqkpPfg15N3Z9IRAX+MqNTsOKWR88=","Subject":"Re: [PATCH 17/17] ARM: dts: Add missing hwmod related properties for\n\tdra7","To":"Tony Lindgren ","CC":", =?utf-8?q?Beno=C3=AEt_Cousson?=\n\t, ,\n\t\"Rafael J . Wysocki\" , \n\tTero Kristo ","References":"<20170828211918.11573-1-tony@atomide.com>\n\t<20170828211918.11573-18-tony@atomide.com>\n\t<8c0ecbf6-26fb-1998-6bb5-0a74d9daa2ab@ti.com>\n\t<20170828213753.GP6008@atomide.com>","From":"Nishanth Menon ","Message-ID":"","Date":"Mon, 28 Aug 2017 16:52:53 -0500","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<20170828213753.GP6008@atomide.com>","Content-Type":"text/plain; charset=\"utf-8\"; format=flowed","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","X-EXCLAIMER-MD-CONFIG":"e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1758899,"web_url":"http://patchwork.ozlabs.org/comment/1758899/","msgid":"<20170828222746.GQ6008@atomide.com>","list_archive_url":null,"date":"2017-08-28T22:27:46","subject":"Re: [PATCH 17/17] ARM: dts: Add missing hwmod related properties for\n\tdra7","submitter":{"id":365,"url":"http://patchwork.ozlabs.org/api/people/365/","name":"Tony Lindgren","email":"tony@atomide.com"},"content":"* Nishanth Menon [170828 14:53]:\n> On 08/28/2017 04:37 PM, Tony Lindgren wrote:\n> > * Nishanth Menon [170828 14:35]:\n> > > On 08/28/2017 04:19 PM, Tony Lindgren wrote:\n> > > > On dra7 we're missing the smartreflex and hdq nodes with their\n> > > > related \"ti,hwmods\" property that the SoC interconnect code needs.\n> > > > \n> > > > Note that this will only show up as a bug with \"doesn't have\n> > > > mpu register target base\" boot errors when the legacy platform\n> > > > data is removed.\n> > > > \n> > > > Note that the related driver also needs to be updated to probe\n> > > > using device tree and get the platform data passed to it using\n> > > > auxdata with arch/arm/mach-omap2/pdata-quirks.c.\n> > > > \n> > > > Let's also update the related binding documentation while at it.\n> > ...\n> > > > @@ -1489,6 +1497,18 @@\n> > > > \t\t\t};\n> > > > \t\t};\n> > > > +\t\tsmartreflex_core: smartreflex4a0dd000 {\n> > > > +\t\t\tcompatible = \"ti,dra7-smartreflex-core\";\n> > > > +\t\t\tti,hwmods = \"smartreflex_core\";\n> > > > +\t\t\treg = <0x4a0dd000 0x80>;\n> > > > +\t\t};\n> > > > +\n> > > > +\t\tsmartreflex_mpu: smartreflex@4a0d9000 {\n> > > > +\t\t\tcompatible = \"ti,dra7-smartreflex-mpu\";\n> > > > +\t\t\tti,hwmods = \"smartreflex_mpu\";\n> > > > +\t\t\treg = <0x4a0d9000 0x80>;\n> > > > +\t\t};\n> > > \n> > > \n> > > Have you checked TRM for these?\n> > > http://www.ti.com/lit/ug/sprui30d/sprui30d.pdf\n> > > \n> > > These are disabled on the SoC and marked as reserved.\n> > \n> > Then why do we still have legacy hwmod data for them?\n> \n> We should probably drop them - probably legacy of autogeneration at some\n> point in history.\n\nOK thanks, will drop them and update this patch accordingly.\n\nRegards,\n\nTony\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xh5xh2l7qz9s7g\n\tfor ;\n\tTue, 29 Aug 2017 08:27:52 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751194AbdH1W1u (ORCPT\n\t);\n\tMon, 28 Aug 2017 18:27:50 -0400","from muru.com ([72.249.23.125]:38318 \"EHLO muru.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751190AbdH1W1t (ORCPT );\n\tMon, 28 Aug 2017 18:27:49 -0400","from atomide.com (localhost [127.0.0.1])\n\tby muru.com (Postfix) with ESMTPS id 43990826A;\n\tMon, 28 Aug 2017 22:28:09 +0000 (UTC)"],"Date":"Mon, 28 Aug 2017 15:27:46 -0700","From":"Tony Lindgren ","To":"Nishanth Menon ","Cc":"linux-omap@vger.kernel.org, =?utf-8?q?Beno=C3=AEt?=\n\tCousson , devicetree@vger.kernel.org,\n\t\"Rafael J . Wysocki\" , \n\tTero Kristo ","Subject":"Re: [PATCH 17/17] ARM: dts: Add missing hwmod related properties for\n\tdra7","Message-ID":"<20170828222746.GQ6008@atomide.com>","References":"<20170828211918.11573-1-tony@atomide.com>\n\t<20170828211918.11573-18-tony@atomide.com>\n\t<8c0ecbf6-26fb-1998-6bb5-0a74d9daa2ab@ti.com>\n\t<20170828213753.GP6008@atomide.com>\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"","User-Agent":"Mutt/1.8.3 (2017-05-23)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]