[{"id":1759747,"web_url":"http://patchwork.ozlabs.org/comment/1759747/","msgid":"<20170829.153124.564367562949459434.davem@davemloft.net>","list_archive_url":null,"date":"2017-08-29T22:31:24","subject":"Re: [PATCH net-next v1] amd-xgbe: Interrupt summary bits are h/w\n\tversion dependent","submitter":{"id":15,"url":"http://patchwork.ozlabs.org/api/people/15/","name":"David Miller","email":"davem@davemloft.net"},"content":"From: Tom Lendacky <thomas.lendacky@amd.com>\nDate: Mon, 28 Aug 2017 15:29:34 -0500\n\n> There is a difference in the bit position of the normal interrupt summary\n> enable (NIE) and abnormal interrupt summary enable (AIE) between revisions\n> of the hardware.  For older revisions the NIE and AIE bits are positions\n> 16 and 15 respectively.  For newer revisions the NIE and AIE bits are\n> positions 15 and 14.  The effect in changing the bit position is that\n> newer hardware won't receive AIE interrupts in the current version of the\n> driver.  Specifically, the driver uses this interrupt to collect\n> statistics on when a receive buffer unavailable event occurs and to\n> restart the driver/device when a fatal bus error occurs.\n> \n> Update the driver to set the interrupt enable bit based on the reported\n> version of the hardware.\n> \n> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>\n\nApplied.","headers":{"Return-Path":"<netdev-owner@vger.kernel.org>","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xhjzN46JKz9sR9\n\tfor <patchwork-incoming@ozlabs.org>;\n\tWed, 30 Aug 2017 08:31:28 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751680AbdH2Wb0 (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tTue, 29 Aug 2017 18:31:26 -0400","from shards.monkeyblade.net ([184.105.139.130]:40562 \"EHLO\n\tshards.monkeyblade.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751280AbdH2WbZ (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Tue, 29 Aug 2017 18:31:25 -0400","from localhost (74-93-104-98-Washington.hfc.comcastbusiness.net\n\t[74.93.104.98]) (using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(Client did not present a certificate)\n\t(Authenticated sender: davem-davemloft)\n\tby shards.monkeyblade.net (Postfix) with ESMTPSA id 2EA8C13D93D43;\n\tTue, 29 Aug 2017 15:31:25 -0700 (PDT)"],"Date":"Tue, 29 Aug 2017 15:31:24 -0700 (PDT)","Message-Id":"<20170829.153124.564367562949459434.davem@davemloft.net>","To":"thomas.lendacky@amd.com","Cc":"netdev@vger.kernel.org","Subject":"Re: [PATCH net-next v1] amd-xgbe: Interrupt summary bits are h/w\n\tversion dependent","From":"David Miller <davem@davemloft.net>","In-Reply-To":"<20170828202934.17073.940.stgit@tlendack-t1.amdoffice.net>","References":"<20170828202934.17073.940.stgit@tlendack-t1.amdoffice.net>","X-Mailer":"Mew version 6.7 on Emacs 25.2 / Mule 6.0 (HANACHIRUSATO)","Mime-Version":"1.0","Content-Type":"Text/Plain; charset=us-ascii","Content-Transfer-Encoding":"7bit","X-Greylist":"Sender succeeded SMTP AUTH, not delayed by\n\tmilter-greylist-4.5.12 (shards.monkeyblade.net\n\t[149.20.54.216]); Tue, 29 Aug 2017 15:31:25 -0700 (PDT)","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<netdev.vger.kernel.org>","X-Mailing-List":"netdev@vger.kernel.org"}}]