[{"id":1759228,"web_url":"http://patchwork.ozlabs.org/comment/1759228/","msgid":"<20170829111436.GH13471@gate.crashing.org>","list_archive_url":null,"date":"2017-08-29T11:14:37","subject":"Re: [PATCH],\n\tFix PR 81959 (power9 IEEE 128-bit float convert from 32-bit memory)","submitter":{"id":134,"url":"http://patchwork.ozlabs.org/api/people/134/","name":"Segher Boessenkool","email":"segher@kernel.crashing.org"},"content":"Hi Mike,\n\nOn Mon, Aug 28, 2017 at 02:50:02PM -0400, Michael Meissner wrote:\n> When I added the optimization for loading 32-bit values directly into the\n> vector registers from memory to convert to IEEE 128-bit floating point, I\n> forgot to make sure the address did not have PRE_INCREMENT, etc. addressing.\n\n> \t* config/rs6000/rs6000.md (float_<mode>si2_hw): If register\n> \tallocation hasn't been done, make sure the memory address is\n> \tX-FORM (register+register).\n> \t(floatuns_<mode>si2_hw2): Likewise.\n\nWhy is it okay after RA but not before?\n\n> --- gcc/config/rs6000/rs6000.md\t(revision 251358)\n> +++ gcc/config/rs6000/rs6000.md\t(working copy)\n> @@ -14505,6 +14505,9 @@ (define_insn_and_split \"float_<mode>si2_\n>  {\n>    if (GET_CODE (operands[2]) == SCRATCH)\n>      operands[2] = gen_reg_rtx (DImode);\n> +\n> +  if (MEM_P (operands[1]) && !reload_completed)\n> +    operands[1] = rs6000_address_for_fpconvert (operands[1]);\n>  })\n\nIt will need a comment here, then (other callers of\nrs6000_address_for_fpconvert do not test for !reload_completed).\n\nOr maybe the predicate should be stricter in all these cases?\nnonimmediate_operand allows a lot ;-)\n\n> --- gcc/testsuite/gcc.target/powerpc/pr81959.c\t(revision 0)\n> +++ gcc/testsuite/gcc.target/powerpc/pr81959.c\t(revision 0)\n> @@ -0,0 +1,25 @@\n> +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */\n> +/* { dg-require-effective-target powerpc_p9vector_ok } */\n> +/* { dg-options \"-mpower9-vector -O2 -mfloat128\" } */\n\npowerpc*-*-*, or does that not work?\n\n\nSegher","headers":{"Return-Path":"<gcc-patches-return-461074-incoming=patchwork.ozlabs.org@gcc.gnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461074-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=<UNKNOWN>)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"XvvuMuii\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhQz82km4z9sNr\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 29 Aug 2017 21:15:13 +1000 (AEST)","(qmail 72165 invoked by alias); 29 Aug 2017 11:15:02 -0000","(qmail 72116 invoked by uid 89); 29 Aug 2017 11:15:00 -0000","from gate.crashing.org (HELO gate.crashing.org) (63.228.1.57) by\n\tsourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tTue, 29 Aug 2017 11:14:50 +0000","from gate.crashing.org (localhost.localdomain [127.0.0.1])\tby\n\tgate.crashing.org (8.14.1/8.13.8) with ESMTP id\n\tv7TBEe70004249; Tue, 29 Aug 2017 06:14:41 -0500","(from segher@localhost)\tby gate.crashing.org\n\t(8.14.1/8.14.1/Submit) id v7TBEcRc004245;\n\tTue, 29 Aug 2017 06:14:38 -0500"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:date\n\t:from:to:subject:message-id:references:mime-version:content-type\n\t:in-reply-to; q=dns; s=default; b=C68SoMM/BA4keKfJdM2tGt2Lip+JED\n\tkgckgGWu5N3yRjxwITu/81mfuCuwGKVncVDqkku4f7TF7oAk4Ch0tpYH8VcAIjgx\n\tFxMElyxuk7R4SXllgqjE31njvnAQCJeY8zmC1fkRqYENizSz/0GTdznc9Zr8WFLw\n\tlxglruJosjmu4=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:date\n\t:from:to:subject:message-id:references:mime-version:content-type\n\t:in-reply-to; s=default; bh=/0sFV3PmYntfCgD+iAibz6hKwLo=; b=Xvvu\n\tMuiibUflrP9fr7cnZ87Hfn3R8IrBaN8vXHDs4fKGQKJeBbYUP+3yN1Y6nr5aasok\n\t9yaaCJQRD5QoTOyslTXvJvbJpouXeDAINwRtB5Ymx+TkLBSMX3ZNix6E8f+ZpOc2\n\tc/nWu+OCMHGEw+pKNlqoFgx2+C8Tbr3MYwEKA8M=","Mailing-List":"contact gcc-patches-help@gcc.gnu.org; run by ezmlm","Precedence":"bulk","List-Id":"<gcc-patches.gcc.gnu.org>","List-Unsubscribe":"<mailto:gcc-patches-unsubscribe-incoming=patchwork.ozlabs.org@gcc.gnu.org>","List-Archive":"<http://gcc.gnu.org/ml/gcc-patches/>","List-Post":"<mailto:gcc-patches@gcc.gnu.org>","List-Help":"<mailto:gcc-patches-help@gcc.gnu.org>","Sender":"gcc-patches-owner@gcc.gnu.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-11.1 required=5.0 tests=AWL, BAYES_00,\n\tGIT_PATCH_2, GIT_PATCH_3,\n\tRP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=","X-HELO":"gate.crashing.org","Date":"Tue, 29 Aug 2017 06:14:37 -0500","From":"Segher Boessenkool <segher@kernel.crashing.org>","To":"Michael Meissner <meissner@linux.vnet.ibm.com>,\n\tGCC Patches <gcc-patches@gcc.gnu.org>,\n\tDavid Edelsohn <dje.gcc@gmail.com>,\n\tBill Schmidt <wschmidt@linux.vnet.ibm.com>","Subject":"Re: [PATCH],\n\tFix PR 81959 (power9 IEEE 128-bit float convert from 32-bit memory)","Message-ID":"<20170829111436.GH13471@gate.crashing.org>","References":"<20170828185001.GA9268@ibm-tiger.the-meissners.org>","Mime-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170828185001.GA9268@ibm-tiger.the-meissners.org>","User-Agent":"Mutt/1.4.2.3i","X-IsSubscribed":"yes"}},{"id":1759616,"web_url":"http://patchwork.ozlabs.org/comment/1759616/","msgid":"<20170829192248.GA1059@ibm-tiger.the-meissners.org>","list_archive_url":null,"date":"2017-08-29T19:22:49","subject":"Re: [PATCH],\n\tFix PR 81959 (power9 IEEE 128-bit float convert from 32-bit memory)","submitter":{"id":4611,"url":"http://patchwork.ozlabs.org/api/people/4611/","name":"Michael Meissner","email":"meissner@linux.vnet.ibm.com"},"content":"On Tue, Aug 29, 2017 at 06:14:37AM -0500, Segher Boessenkool wrote:\n> Hi Mike,\n> \n> On Mon, Aug 28, 2017 at 02:50:02PM -0400, Michael Meissner wrote:\n> > When I added the optimization for loading 32-bit values directly into the\n> > vector registers from memory to convert to IEEE 128-bit floating point, I\n> > forgot to make sure the address did not have PRE_INCREMENT, etc. addressing.\n> \n> > \t* config/rs6000/rs6000.md (float_<mode>si2_hw): If register\n> > \tallocation hasn't been done, make sure the memory address is\n> > \tX-FORM (register+register).\n> > \t(floatuns_<mode>si2_hw2): Likewise.\n> \n> Why is it okay after RA but not before?\n\nBecause the Z constraint forces the RA to fix the address.  Before RA, the\naddress is:\n\n\t(MEM:SI (PRE_INC:DI (REG:DI ...)))\n\nWhen the insn is split before RA, the split insn is no longer valid.  I could\neither have made the split test to be after RA (which would have moved the\nincrement outside of the address) or generated a new pseudo to fix up the\naddress.\n\n> > --- gcc/config/rs6000/rs6000.md\t(revision 251358)\n> > +++ gcc/config/rs6000/rs6000.md\t(working copy)\n> > @@ -14505,6 +14505,9 @@ (define_insn_and_split \"float_<mode>si2_\n> >  {\n> >    if (GET_CODE (operands[2]) == SCRATCH)\n> >      operands[2] = gen_reg_rtx (DImode);\n> > +\n> > +  if (MEM_P (operands[1]) && !reload_completed)\n> > +    operands[1] = rs6000_address_for_fpconvert (operands[1]);\n> >  })\n> \n> It will need a comment here, then (other callers of\n> rs6000_address_for_fpconvert do not test for !reload_completed).\n\nrs6000_address_for_fpconvert cannot be called after RA because it allocates a\npseudo in some cases.  In theory the other cases where it is used is either in\nthe define_expands or in define_splits before RA.  I can certainly add a\ncomment.  You don't necessary need a gcc_assert in rs6000_address_for_fpconvert\nsince creating the pseudo will cause a fatal.\n\n> Or maybe the predicate should be stricter in all these cases?\n> nonimmediate_operand allows a lot ;-)\n\nIt is one of those balancing acts, if you make it too strict early on, you\neither don't get the optimization because it doesn't match during expand or\ncombine, or you potentially get insn not found messages.\n\n> > --- gcc/testsuite/gcc.target/powerpc/pr81959.c\t(revision 0)\n> > +++ gcc/testsuite/gcc.target/powerpc/pr81959.c\t(revision 0)\n> > @@ -0,0 +1,25 @@\n> > +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */\n> > +/* { dg-require-effective-target powerpc_p9vector_ok } */\n> > +/* { dg-options \"-mpower9-vector -O2 -mfloat128\" } */\n> \n> powerpc*-*-*, or does that not work?\n\nAs we were discussing on private IRC yesterday, in order to enable the ISA 3.0\nIEEE 128-bit floating point instructions you need support for TImode, and\nTImode is not supported on 32-bit.  Since the code only fails when converting\nSImode to KFmode, you need the && lp64.","headers":{"Return-Path":"<gcc-patches-return-461114-incoming=patchwork.ozlabs.org@gcc.gnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461114-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=<UNKNOWN>)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"OvVbG9x3\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhdpG3vXTz9s8w\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 30 Aug 2017 05:23:17 +1000 (AEST)","(qmail 69594 invoked by alias); 29 Aug 2017 19:23:09 -0000","(qmail 69538 invoked by uid 89); 29 Aug 2017 19:23:08 -0000","from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com)\n\t(148.163.156.1) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tTue, 29 Aug 2017 19:22:58 +0000","from pps.filterd (m0098410.ppops.net [127.0.0.1])\tby\n\tmx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv7TJLJ8w068789\tfor <gcc-patches@gcc.gnu.org>;\n\tTue, 29 Aug 2017 15:22:56 -0400","from e18.ny.us.ibm.com (e18.ny.us.ibm.com [129.33.205.208])\tby\n\tmx0a-001b2d01.pphosted.com with ESMTP id\n\t2cn6wa1r1s-1\t(version=TLSv1.2 cipher=AES256-SHA bits=256\n\tverify=NOT)\tfor <gcc-patches@gcc.gnu.org>;\n\tTue, 29 Aug 2017 15:22:55 -0400","from localhost\tby e18.ny.us.ibm.com with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! 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