[{"id":1766510,"web_url":"http://patchwork.ozlabs.org/comment/1766510/","msgid":"","list_archive_url":null,"date":"2017-09-11T20:15:45","subject":"Re: [U-Boot] [U-Boot,1/3] rk3288: vyasa: Add TPL support","submitter":{"id":53488,"url":"http://patchwork.ozlabs.org/api/people/53488/","name":"Philipp Tomsich","email":"philipp.tomsich@theobroma-systems.com"},"content":"On Mon, 28 Aug 2017, Jagan Teki wrote:\n\n> From: Jagan Teki \n>\n> Since the size of SPL can't be exceeded 0x8000 bytes in RK3288,\n ^^^^^^^^^^^\n> it is not possible add new SPL features like Falcon mode or etc.\n>\n> So add TPL stage so-that adding new features to SPL is possible.\n> - TPL: DRAM init, clocks\n> - SPL: MMC, falcon, etc\n>\n> Booting from SD with TPL:\n> ------------------------\n> U-Boot TPL 2017.09-rc2-13369-gfa72baf-dirty (Aug 26 2017 - 15:48:54)\n> Trying to boot from BOOTROM\n> Returning to boot ROM...\n>\n> U-Boot SPL 2017.09-rc2-13369-gfa72baf-dirty (Aug 26 2017 - 15:48:54)\n> Trying to boot from MMC1\n>\n> U-Boot 2017.09-rc2-13369-gfa72baf-dirty (Aug 26 2017 - 15:48:54 +0530)\n>\n> Model: Amarula Vyasa-RK3288\n> DRAM: 2 GiB\n> MMC: dwmmc@ff0c0000: 1\n> Using default environment\n>\n> In: serial@ff690000\n> Out: serial@ff690000\n> Err: serial@ff690000\n> Model: Amarula Vyasa-RK3288\n> Net: Net Initialization Skipped\n> No ethernet found.\n> Hit any key to stop autoboot: 0\n> =>\n\nI think the console output does not provide any useful info as part of\nthe commit message.\n\n>\n> Signed-off-by: Jagan Teki \n\nReviewed-by: Philipp Tomsich \n\n> ---\n> Note:\n> Right now TPL added in vyasa board, ie reason some clock code\n> is duplicate in SPL and TPL. Once all rk3288 agree the will remove\n> duplicates.\n>\n> arch/arm/mach-rockchip/Makefile | 1 +\n> arch/arm/mach-rockchip/rk3288-board-spl.c | 3 +\n> arch/arm/mach-rockchip/rk3288-board-tpl.c | 124 ++++++++++++++++++++++++++++++\n> arch/arm/mach-rockchip/rk3288/Kconfig | 15 ++++\n> configs/vyasa-rk3288_defconfig | 2 +\n> doc/README.rockchip | 18 +++++\n> include/configs/rk3288_common.h | 8 +-\n> 7 files changed, 170 insertions(+), 1 deletion(-)\n> create mode 100644 arch/arm/mach-rockchip/rk3288-board-tpl.c\n>\n> diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile\n> index 79e9704..daafc8d 100644\n> --- a/arch/arm/mach-rockchip/Makefile\n> +++ b/arch/arm/mach-rockchip/Makefile\n> @@ -12,6 +12,7 @@ obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o\n> obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o\n>\n> obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o\n> +obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o\n> obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o\n>\n> obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o\n> diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c\n> index 6b7bf85..febc1ef 100644\n> --- a/arch/arm/mach-rockchip/rk3288-board-spl.c\n> +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c\n> @@ -243,12 +243,15 @@ void board_init_f(ulong dummy)\n> \t}\n> #endif\n>\n> +#if !defined(CONFIG_SUPPORT_TPL)\n\nShould this be CONFIG_TPL_BUILD?\n\n> \tdebug(\"\\nspl:init dram\\n\");\n> \tret = uclass_get_device(UCLASS_RAM, 0, &dev);\n> \tif (ret) {\n> \t\tdebug(\"DRAM init failed: %d\\n\", ret);\n> \t\treturn;\n> \t}\n> +#endif\n> +\n> #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)\n> \tback_to_bootrom();\n> #endif\n\nCould this be done using BOOT_DEVICE_BOOTROM?\n\n> diff --git a/arch/arm/mach-rockchip/rk3288-board-tpl.c b/arch/arm/mach-rockchip/rk3288-board-tpl.c\n> new file mode 100644\n> index 0000000..7a7fd05\n> --- /dev/null\n> +++ b/arch/arm/mach-rockchip/rk3288-board-tpl.c\n> @@ -0,0 +1,124 @@\n> +/*\n> + * (C) Copyright 2015 Google, Inc\n\nAre you sure?\n\n> + *\n> + * SPDX-License-Identifier: GPL-2.0+\n> + */\n> +\n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +\n> +DECLARE_GLOBAL_DATA_PTR;\n> +\n> +/* read L2 control register (L2CTLR) */\n> +static inline uint32_t read_l2ctlr(void)\n\nCould this be shared between rk3288-board-spl.c and rk3288-board-tpl.c?\nI am not particularily keen on duplicating code.\n\nAn even better idea: can this mave a armv7-wide function that can be \nshared across all cores that need to read/write the L2CTRL in p15?\nI've found the same inline assemly in a few other places...\n\n> +{\n> +\tuint32_t val = 0;\n> +\n> +\tasm volatile (\"mrc p15, 1, %0, c9, c0, 2\" : \"=r\" (val));\n> +\n> +\treturn val;\n> +}\n> +\n> +/* write L2 control register (L2CTLR) */\n> +static inline void write_l2ctlr(uint32_t val)\n\nSame as above.\n\n> +{\n> +\t/*\n> +\t * Note: L2CTLR can only be written when the L2 memory system\n> +\t * is idle, ie before the MMU is enabled.\n> +\t */\n> +\tasm volatile(\"mcr p15, 1, %0, c9, c0, 2\" : : \"r\" (val) : \"memory\");\n> +\tisb();\n> +}\n> +\n> +static void configure_l2ctlr(void)\n> +{\n> +\tuint32_t l2ctlr;\n> +\n> +\tl2ctlr = read_l2ctlr();\n> +\tl2ctlr &= 0xfffc0000; /* clear bit0~bit17 */\n> +\n> +\t/*\n> +\t* Data RAM write latency: 2 cycles\n> +\t* Data RAM read latency: 2 cycles\n> +\t* Data RAM setup latency: 1 cycle\n> +\t* Tag RAM write latency: 1 cycle\n> +\t* Tag RAM read latency: 1 cycle\n> +\t* Tag RAM setup latency: 1 cycle\n> +\t*/\n> +\tl2ctlr |= (1 << 3 | 1 << 0);\n> +\twrite_l2ctlr(l2ctlr);\n> +}\n> +\n> +\n> +void board_init_f(ulong dummy)\n> +{\n> +\tstruct udevice *dev;\n> +\tint ret;\n> +\n> +\t/* Example code showing how to enable the debug UART on RK3288 */\n> +#include \n\nPlease don't include header files in the middle of a function.\n\n> +\t/* Enable early UART on the RK3288 */\n> +#define GRF_BASE\t0xff770000\n\nPlease don't define preprocessor macros in the middle of a function.\n\n> +\tstruct rk3288_grf * const grf = (void *)GRF_BASE;\n> +\n> +\trk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |\n> +\t\t GPIO7C6_MASK << GPIO7C6_SHIFT,\n> +\t\t GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |\n> +\t\t GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);\n> +\t/*\n> +\t * Debug UART can be used from here if required:\n> +\t *\n> +\t * debug_uart_init();\n> +\t * printch('a');\n> +\t * printhex8(0x1234);\n> +\t * printascii(\"string\");\n> +\t */\n> +\tdebug_uart_init();\n> +\n> +\tret = spl_early_init();\n> +\tif (ret) {\n> +\t\tdebug(\"spl_early_init() failed: %d\\n\", ret);\n> +\t\thang();\n> +\t}\n> +\n> +\trockchip_timer_init();\n> +\tconfigure_l2ctlr();\n> +\n> +\tret = rockchip_get_clk(&dev);\n> +\tif (ret) {\n> +\t\tdebug(\"CLK init failed: %d\\n\", ret);\n> +\t\treturn;\n> +\t}\n> +\n> +\tret = uclass_get_device(UCLASS_RAM, 0, &dev);\n> +\tif (ret) {\n> +\t\tdebug(\"DRAM init failed: %d\\n\", ret);\n> +\t\treturn;\n> +\t}\n> +}\n> +\n> +void board_return_to_bootrom(void)\n> +{\n> +\tback_to_bootrom();\n> +}\n> +\n> +u32 spl_boot_device(void)\n> +{\n> +\treturn BOOT_DEVICE_BOOTROM;\n> +}\n> +\n> +void spl_board_init(void)\n> +{\n> +\tputs(\"\\nU-Boot TPL \" PLAIN_VERSION \" (\" U_BOOT_DATE \" - \" \\\n> +\t\t\t\tU_BOOT_TIME \")\\n\");\n> +}\n> diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig\n> index 4ad2940..833073d 100644\n> --- a/arch/arm/mach-rockchip/rk3288/Kconfig\n> +++ b/arch/arm/mach-rockchip/rk3288/Kconfig\n> @@ -87,6 +87,21 @@ config TARGET_POPMETAL_RK3288\n> config TARGET_VYASA_RK3288\n> \tbool \"Vyasa-RK3288\"\n> \tselect BOARD_LATE_INIT\n> +\tselect TPL\n> +\tselect SUPPORT_TPL\n> +\tselect TPL_DM\n> +\tselect TPL_REGMAP\n> +\tselect TPL_SYSCON\n> +\tselect TPL_CLK\n> +\tselect TPL_RAM\n> +\tselect TPL_OF_PLATDATA\n> +\tselect TPL_OF_CONTROL\n> +\tselect TPL_BOOTROM_SUPPORT\n> +\tselect ROCKCHIP_BROM_HELPER\n> +\tselect TPL_DRIVERS_MISC_SUPPORT\n> +\tselect TPL_LIBCOMMON_SUPPORT\n> +\tselect TPL_LIBGENERIC_SUPPORT\n> +\tselect TPL_SERIAL_SUPPORT\n> \thelp\n> \t Vyasa is a RK3288-based development board with 2 USB ports,\n> \t HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet, It\n> diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig\n> index 7db7b0b..239409f 100644\n> --- a/configs/vyasa-rk3288_defconfig\n> +++ b/configs/vyasa-rk3288_defconfig\n> @@ -1,4 +1,6 @@\n> CONFIG_ARM=y\n> +# CONFIG_SPL_USE_ARCH_MEMCPY is not set\n> +# CONFIG_SPL_USE_ARCH_MEMSET is not set\n> CONFIG_ARCH_ROCKCHIP=y\n> CONFIG_SYS_MALLOC_F_LEN=0x2000\n> CONFIG_ROCKCHIP_RK3288=y\n> diff --git a/doc/README.rockchip b/doc/README.rockchip\n> index 12fec38..4b7be0b 100644\n> --- a/doc/README.rockchip\n> +++ b/doc/README.rockchip\n> @@ -150,6 +150,24 @@ Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, th\n> debug uart must be disabled\n>\n>\n> +Booting from an SD card on RK3288 with TPL\n> +==========================================\n> +\n> +Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add\n> +new SPL features like Falcon mode or etc.\n> +\n> +So introduce TPL so-that adding new features to SPL is possible because now TPL should\n> +run minimal with code like DDR, clock etc and rest of new features in SPL.\n> +\n> +As of now TPL is added on Vyasa-RK3288 board.\n> +\n> +To write an image that boots from an SD card (assumed to be /dev/mmcblk0):\n> +\n> + ./tools/mkimage -n rk3288 -T rksd -d ./tpl/u-boot-tpl.bin out &&\n> + cat ./spl/u-boot-spl-dtb.bin >> out &&\n> + sudo dd if=out of=/dev/mmcblk0 seek=64 &&\n> + sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=256\n> +\n> Booting from an SD card on RK3188\n> =================================\n>\n> diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h\n> index ade6caf..e3e59c2 100644\n> --- a/include/configs/rk3288_common.h\n> +++ b/include/configs/rk3288_common.h\n> @@ -33,7 +33,13 @@\n> #define CONFIG_SYS_INIT_SP_ADDR\t\t0x00100000\n> #define CONFIG_SYS_LOAD_ADDR\t\t0x00800800\n> #define CONFIG_SPL_STACK\t\t0xff718000\n> -#define CONFIG_SPL_TEXT_BASE\t\t0xff704004\n> +#ifdef CONFIG_TPL_BUILD\n> +# define CONFIG_SPL_TEXT_BASE\t\t0xff704004\n\nCould you use TPL_TEXT_BASE (see common/spl/Kconfig)?\n\n> +#elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)\n> +# define CONFIG_SPL_TEXT_BASE\t\t0x0\n> +#else\n> +# define CONFIG_SPL_TEXT_BASE\t\t0xff704004\n> +#endif\n>\n> /* MMC/SD IP block */\n> #define CONFIG_BOUNCE_BUFFER\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xrfPP72RPz9s5L\n\tfor ;\n\tTue, 12 Sep 2017 06:18:01 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid C3371C21FA5; Mon, 11 Sep 2017 20:16:27 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id D9C25C21FB9;\n\tMon, 11 Sep 2017 20:16:23 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid A73DBC21FAF; Mon, 11 Sep 2017 20:15:49 +0000 (UTC)","from mail.theobroma-systems.com (vegas.theobroma-systems.com\n\t[144.76.126.164])\n\tby lists.denx.de (Postfix) with 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2017-01-01)","MIME-Version":"1.0","Cc":"u-boot@lists.denx.de","Subject":"Re: [U-Boot] [U-Boot,1/3] rk3288: vyasa: Add TPL support","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Transfer-Encoding":"base64","Content-Type":"text/plain; charset=\"utf-8\"; Format=\"flowed\"","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}}]