[{"id":1761362,"web_url":"http://patchwork.ozlabs.org/comment/1761362/","msgid":"","list_archive_url":null,"date":"2017-08-31T22:58:20","subject":"Re: [Qemu-devel] [Qemu devel v7 PATCH 2/5] msf2: Microsemi\n\tSmartfusion2 System Register block","submitter":{"id":64571,"url":"http://patchwork.ozlabs.org/api/people/64571/","name":"Alistair Francis","email":"alistair23@gmail.com"},"content":"On Mon, Aug 28, 2017 at 9:38 AM, Subbaraya Sundeep\n wrote:\n> Added Sytem register block of Smartfusion2.\n> This block has PLL registers which are accessed by guest.\n>\n> Signed-off-by: Subbaraya Sundeep \n> ---\n> hw/misc/Makefile.objs | 1 +\n> hw/misc/msf2-sysreg.c | 199 ++++++++++++++++++++++++++++++++++++++++++\n> include/hw/misc/msf2-sysreg.h | 78 +++++++++++++++++\n> 3 files changed, 278 insertions(+)\n> create mode 100644 hw/misc/msf2-sysreg.c\n> create mode 100644 include/hw/misc/msf2-sysreg.h\n>\n> diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs\n> index 29fb922..e8f0a02 100644\n> --- a/hw/misc/Makefile.objs\n> +++ b/hw/misc/Makefile.objs\n> @@ -59,3 +59,4 @@ obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o\n> obj-$(CONFIG_AUX) += auxbus.o\n> obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o\n> obj-y += mmio_interface.o\n> +obj-$(CONFIG_MSF2) += msf2-sysreg.o\n> diff --git a/hw/misc/msf2-sysreg.c b/hw/misc/msf2-sysreg.c\n> new file mode 100644\n> index 0000000..2aeb555\n> --- /dev/null\n> +++ b/hw/misc/msf2-sysreg.c\n> @@ -0,0 +1,199 @@\n> +/*\n> + * System Register block model of Microsemi SmartFusion2.\n> + *\n> + * Copyright (c) 2017 Subbaraya Sundeep \n> + *\n> + * This program is free software; you can redistribute it and/or\n> + * modify it under the terms of the GNU General Public License\n> + * as published by the Free Software Foundation; either version\n> + * 2 of the License, or (at your option) any later version.\n> + *\n> + * You should have received a copy of the GNU General Public License along\n> + * with this program; if not, see .\n> + */\n> +\n> +#include \"qemu/osdep.h\"\n> +#include \"qemu/log.h\"\n> +#include \"hw/misc/msf2-sysreg.h\"\n> +\n> +#ifndef MSF2_SYSREG_ERR_DEBUG\n> +#define MSF2_SYSREG_ERR_DEBUG 0\n> +#endif\n> +\n> +#define DB_PRINT_L(lvl, fmt, args...) do { \\\n> + if (MSF2_SYSREG_ERR_DEBUG >= lvl) { \\\n> + qemu_log(\"%s: \" fmt \"\\n\", __func__, ## args); \\\n> + } \\\n> +} while (0);\n> +\n> +#define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args)\n> +\n> +static inline int msf2_divbits(uint32_t div)\n> +{\n> + int ret = 0;\n> +\n> + switch (div) {\n> + case 1:\n> + ret = 0;\n> + break;\n> + case 2:\n> + ret = 1;\n> + break;\n> + case 4:\n> + ret = 2;\n> + break;\n> + case 8:\n> + ret = 4;\n> + break;\n> + case 16:\n> + ret = 5;\n> + break;\n> + case 32:\n> + ret = 6;\n> + break;\n> + default:\n> + break;\n> + }\n> +\n> + return ret;\n> +}\n> +\n> +static void msf2_sysreg_reset(DeviceState *d)\n> +{\n> + MSF2SysregState *s = MSF2_SYSREG(d);\n> +\n> + DB_PRINT(\"RESET\");\n> +\n> + s->regs[MSSDDR_PLL_STATUS_LOW_CR] = 0x021A2358;\n> + s->regs[MSSDDR_PLL_STATUS] = 0x3;\n> + s->regs[MSSDDR_FACC1_CR] = msf2_divbits(s->apb0div) << 5 |\n> + msf2_divbits(s->apb1div) << 2;\n> +}\n> +\n> +static uint64_t msf2_sysreg_read(void *opaque, hwaddr offset,\n> + unsigned size)\n> +{\n> + MSF2SysregState *s = opaque;\n> + uint32_t ret = 0;\n> +\n> + offset >>= 2;\n> + if (offset < ARRAY_SIZE(s->regs)) {\n> + ret = s->regs[offset];\n> + DB_PRINT(\"addr: 0x%08\" HWADDR_PRIx \" data: 0x%08\" PRIx32,\n> + offset << 2, ret);\n> + } else {\n> + qemu_log_mask(LOG_GUEST_ERROR,\n> + \"%s: Bad offset 0x%08\" HWADDR_PRIx \"\\n\", __func__,\n> + offset << 2);\n> + }\n> +\n> + return ret;\n> +}\n> +\n> +static void msf2_sysreg_write(void *opaque, hwaddr offset,\n> + uint64_t val, unsigned size)\n> +{\n> + MSF2SysregState *s = (MSF2SysregState *)opaque;\n\nDrop this cast\n\n> + uint32_t newval = val;\n> + uint32_t oldval;\n> +\n> + DB_PRINT(\"addr: 0x%08\" HWADDR_PRIx \" data: 0x%08\" PRIx64,\n> + offset, val);\n> +\n> + offset >>= 2;\n> +\n> + switch (offset) {\n> + case MSSDDR_PLL_STATUS:\n> + break;\n> +\n> + case ESRAM_CR:\n> + oldval = s->regs[ESRAM_CR];\n> + if (oldval ^ newval) {\n\nIsn't this just:\nif (newval != s->regs[ESRAM_CR])\n\nI think putting it all in the if makes it clearer.\n\n> + qemu_log_mask(LOG_GUEST_ERROR,\n> + TYPE_MSF2_SYSREG\": eSRAM remapping not supported\\n\");\n> + }\n> + break;\n> +\n> + case DDR_CR:\n> + oldval = s->regs[DDR_CR];\n> + if (oldval ^ newval) {\n> + qemu_log_mask(LOG_GUEST_ERROR,\n> + TYPE_MSF2_SYSREG\": DDR remapping not supported\\n\");\n> + }\n> + break;\n> +\n> + case ENVM_REMAP_BASE_CR:\n> + oldval = s->regs[ENVM_REMAP_BASE_CR];\n> + if (oldval ^ newval) {\n> + qemu_log_mask(LOG_GUEST_ERROR,\n> + TYPE_MSF2_SYSREG\": eNVM remapping not supported\\n\");\n> + }\n> + break;\n> +\n> + default:\n> + if (offset < ARRAY_SIZE(s->regs)) {\n> + s->regs[offset] = val;\n\nUse newval instead.\n\nWith those all fixed up you can include this in the next version:\n\nReviewed-by: Alistair Francis \n\nThanks,\nAlistair\n\n\n> + } else {\n> + qemu_log_mask(LOG_GUEST_ERROR,\n> + \"%s: Bad offset 0x%08\" HWADDR_PRIx \"\\n\", __func__,\n> + offset << 2);\n> + }\n> + break;\n> + }\n> +}\n> +\n> +static const MemoryRegionOps sysreg_ops = {\n> + .read = msf2_sysreg_read,\n> + .write = msf2_sysreg_write,\n> + .endianness = DEVICE_NATIVE_ENDIAN,\n> +};\n> +\n> +static void msf2_sysreg_init(Object *obj)\n> +{\n> + MSF2SysregState *s = MSF2_SYSREG(obj);\n> +\n> + memory_region_init_io(&s->iomem, obj, &sysreg_ops, s, TYPE_MSF2_SYSREG,\n> + MSF2_SYSREG_MMIO_SIZE);\n> + sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem);\n> +}\n> +\n> +static const VMStateDescription vmstate_msf2_sysreg = {\n> + .name = TYPE_MSF2_SYSREG,\n> + .version_id = 1,\n> + .minimum_version_id = 1,\n> + .fields = (VMStateField[]) {\n> + VMSTATE_UINT32_ARRAY(regs, MSF2SysregState, MSF2_SYSREG_MMIO_SIZE / 4),\n> + VMSTATE_END_OF_LIST()\n> + }\n> +};\n> +\n> +static Property msf2_sysreg_properties[] = {\n> + /* default divisors in Libero GUI */\n> + DEFINE_PROP_UINT32(\"apb0divisor\", MSF2SysregState, apb0div, 2),\n> + DEFINE_PROP_UINT32(\"apb1divisor\", MSF2SysregState, apb1div, 2),\n> + DEFINE_PROP_END_OF_LIST(),\n> +};\n> +\n> +static void msf2_sysreg_class_init(ObjectClass *klass, void *data)\n> +{\n> + DeviceClass *dc = DEVICE_CLASS(klass);\n> +\n> + dc->vmsd = &vmstate_msf2_sysreg;\n> + dc->reset = msf2_sysreg_reset;\n> + dc->props = msf2_sysreg_properties;\n> +}\n> +\n> +static const TypeInfo msf2_sysreg_info = {\n> + .name = TYPE_MSF2_SYSREG,\n> + .parent = TYPE_SYS_BUS_DEVICE,\n> + .class_init = msf2_sysreg_class_init,\n> + .instance_size = sizeof(MSF2SysregState),\n> + .instance_init = msf2_sysreg_init,\n> +};\n> +\n> +static void msf2_sysreg_register_types(void)\n> +{\n> + type_register_static(&msf2_sysreg_info);\n> +}\n> +\n> +type_init(msf2_sysreg_register_types)\n> diff --git a/include/hw/misc/msf2-sysreg.h b/include/hw/misc/msf2-sysreg.h\n> new file mode 100644\n> index 0000000..f39cc41\n> --- /dev/null\n> +++ b/include/hw/misc/msf2-sysreg.h\n> @@ -0,0 +1,78 @@\n> +/*\n> + * Microsemi SmartFusion2 SYSREG\n> + *\n> + * Copyright (c) 2017 Subbaraya Sundeep \n> + *\n> + * Permission is hereby granted, free of charge, to any person obtaining a copy\n> + * of this software and associated documentation files (the \"Software\"), to deal\n> + * in the Software without restriction, including without limitation the rights\n> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell\n> + * copies of the Software, and to permit persons to whom the Software is\n> + * furnished to do so, subject to the following conditions:\n> + *\n> + * The above copyright notice and this permission notice shall be included in\n> + * all copies or substantial portions of the Software.\n> + *\n> + * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\n> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL\n> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\n> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,\n> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN\n> + * THE SOFTWARE.\n> + */\n> +\n> +#ifndef HW_MSF2_SYSREG_H\n> +#define HW_MSF2_SYSREG_H\n> +\n> +#include \"hw/sysbus.h\"\n> +\n> +enum {\n> + ESRAM_CR = 0x00 / 4,\n> + ESRAM_MAX_LAT,\n> + DDR_CR,\n> + ENVM_CR,\n> + ENVM_REMAP_BASE_CR,\n> + ENVM_REMAP_FAB_CR,\n> + CC_CR,\n> + CC_REGION_CR,\n> + CC_LOCK_BASE_ADDR_CR,\n> + CC_FLUSH_INDX_CR,\n> + DDRB_BUF_TIMER_CR,\n> + DDRB_NB_ADDR_CR,\n> + DDRB_NB_SIZE_CR,\n> + DDRB_CR,\n> +\n> + SOFT_RESET_CR = 0x48 / 4,\n> + M3_CR,\n> +\n> + GPIO_SYSRESET_SEL_CR = 0x58 / 4,\n> +\n> + MDDR_CR = 0x60 / 4,\n> +\n> + MSSDDR_PLL_STATUS_LOW_CR = 0x90 / 4,\n> + MSSDDR_PLL_STATUS_HIGH_CR,\n> + MSSDDR_FACC1_CR,\n> + MSSDDR_FACC2_CR,\n> +\n> + MSSDDR_PLL_STATUS = 0x150 / 4,\n> +\n> +};\n> +\n> +#define MSF2_SYSREG_MMIO_SIZE 0x300\n> +\n> +#define TYPE_MSF2_SYSREG \"msf2-sysreg\"\n> +#define MSF2_SYSREG(obj) OBJECT_CHECK(MSF2SysregState, (obj), TYPE_MSF2_SYSREG)\n> +\n> +typedef struct MSF2SysregState {\n> + SysBusDevice parent_obj;\n> +\n> + MemoryRegion iomem;\n> +\n> + uint32_t apb0div;\n> + uint32_t apb1div;\n> +\n> + uint32_t regs[MSF2_SYSREG_MMIO_SIZE / 4];\n> +} MSF2SysregState;\n> +\n> +#endif /* HW_MSF2_SYSREG_H */\n> --\n> 2.5.0\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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charset=\"UTF-8\"","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2a00:1450:400c:c0c::244","Subject":"Re: [Qemu-devel] [Qemu devel v7 PATCH 2/5] msf2: Microsemi\n\tSmartfusion2 System Register block","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Maydell , =?utf-8?q?Philippe_Mathieu-D?=\n\t=?utf-8?b?YXVkw6k=?= , \tqemu-arm ,\n\t\"qemu-devel@nongnu.org Developers\" , \n\tPeter Crosthwaite ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1761478,"web_url":"http://patchwork.ozlabs.org/comment/1761478/","msgid":"","list_archive_url":null,"date":"2017-09-01T06:03:29","subject":"Re: [Qemu-devel] [Qemu devel v7 PATCH 2/5] msf2: Microsemi\n\tSmartfusion2 System Register block","submitter":{"id":64324,"url":"http://patchwork.ozlabs.org/api/people/64324/","name":"sundeep subbaraya","email":"sundeep.lkml@gmail.com"},"content":"Hi Alistair,\n\nOn Fri, Sep 1, 2017 at 4:28 AM, Alistair Francis \nwrote:\n\n> On Mon, Aug 28, 2017 at 9:38 AM, Subbaraya Sundeep\n> wrote:\n> > Added Sytem register block of Smartfusion2.\n> > This block has PLL registers which are accessed by guest.\n> >\n> > Signed-off-by: Subbaraya Sundeep \n> > ---\n> > hw/misc/Makefile.objs | 1 +\n> > hw/misc/msf2-sysreg.c | 199 ++++++++++++++++++++++++++++++\n> ++++++++++++\n> > include/hw/misc/msf2-sysreg.h | 78 +++++++++++++++++\n> > 3 files changed, 278 insertions(+)\n> > create mode 100644 hw/misc/msf2-sysreg.c\n> > create mode 100644 include/hw/misc/msf2-sysreg.h\n> >\n> > diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs\n> > index 29fb922..e8f0a02 100644\n> > --- a/hw/misc/Makefile.objs\n> > +++ b/hw/misc/Makefile.objs\n> > @@ -59,3 +59,4 @@ obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o\n> > obj-$(CONFIG_AUX) += auxbus.o\n> > obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o\n> > obj-y += mmio_interface.o\n> > +obj-$(CONFIG_MSF2) += msf2-sysreg.o\n> > diff --git a/hw/misc/msf2-sysreg.c b/hw/misc/msf2-sysreg.c\n> > new file mode 100644\n> > index 0000000..2aeb555\n> > --- /dev/null\n> > +++ b/hw/misc/msf2-sysreg.c\n> > @@ -0,0 +1,199 @@\n> > +/*\n> > + * System Register block model of Microsemi SmartFusion2.\n> > + *\n> > + * Copyright (c) 2017 Subbaraya Sundeep \n> > + *\n> > + * This program is free software; you can redistribute it and/or\n> > + * modify it under the terms of the GNU General Public License\n> > + * as published by the Free Software Foundation; either version\n> > + * 2 of the License, or (at your option) any later version.\n> > + *\n> > + * You should have received a copy of the GNU General Public License\n> along\n> > + * with this program; if not, see .\n> > + */\n> > +\n> > +#include \"qemu/osdep.h\"\n> > +#include \"qemu/log.h\"\n> > +#include \"hw/misc/msf2-sysreg.h\"\n> > +\n> > +#ifndef MSF2_SYSREG_ERR_DEBUG\n> > +#define MSF2_SYSREG_ERR_DEBUG 0\n> > +#endif\n> > +\n> > +#define DB_PRINT_L(lvl, fmt, args...) do { \\\n> > + if (MSF2_SYSREG_ERR_DEBUG >= lvl) { \\\n> > + qemu_log(\"%s: \" fmt \"\\n\", __func__, ## args); \\\n> > + } \\\n> > +} while (0);\n> > +\n> > +#define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args)\n> > +\n> > +static inline int msf2_divbits(uint32_t div)\n> > +{\n> > + int ret = 0;\n> > +\n> > + switch (div) {\n> > + case 1:\n> > + ret = 0;\n> > + break;\n> > + case 2:\n> > + ret = 1;\n> > + break;\n> > + case 4:\n> > + ret = 2;\n> > + break;\n> > + case 8:\n> > + ret = 4;\n> > + break;\n> > + case 16:\n> > + ret = 5;\n> > + break;\n> > + case 32:\n> > + ret = 6;\n> > + break;\n> > + default:\n> > + break;\n> > + }\n> > +\n> > + return ret;\n> > +}\n> > +\n> > +static void msf2_sysreg_reset(DeviceState *d)\n> > +{\n> > + MSF2SysregState *s = MSF2_SYSREG(d);\n> > +\n> > + DB_PRINT(\"RESET\");\n> > +\n> > + s->regs[MSSDDR_PLL_STATUS_LOW_CR] = 0x021A2358;\n> > + s->regs[MSSDDR_PLL_STATUS] = 0x3;\n> > + s->regs[MSSDDR_FACC1_CR] = msf2_divbits(s->apb0div) << 5 |\n> > + msf2_divbits(s->apb1div) << 2;\n> > +}\n> > +\n> > +static uint64_t msf2_sysreg_read(void *opaque, hwaddr offset,\n> > + unsigned size)\n> > +{\n> > + MSF2SysregState *s = opaque;\n> > + uint32_t ret = 0;\n> > +\n> > + offset >>= 2;\n> > + if (offset < ARRAY_SIZE(s->regs)) {\n> > + ret = s->regs[offset];\n> > + DB_PRINT(\"addr: 0x%08\" HWADDR_PRIx \" data: 0x%08\" PRIx32,\n> > + offset << 2, ret);\n> > + } else {\n> > + qemu_log_mask(LOG_GUEST_ERROR,\n> > + \"%s: Bad offset 0x%08\" HWADDR_PRIx \"\\n\", __func__,\n> > + offset << 2);\n> > + }\n> > +\n> > + return ret;\n> > +}\n> > +\n> > +static void msf2_sysreg_write(void *opaque, hwaddr offset,\n> > + uint64_t val, unsigned size)\n> > +{\n> > + MSF2SysregState *s = (MSF2SysregState *)opaque;\n>\n> Drop this cast\n>\n\nYeah ok.\n\n>\n> > + uint32_t newval = val;\n> > + uint32_t oldval;\n> > +\n> > + DB_PRINT(\"addr: 0x%08\" HWADDR_PRIx \" data: 0x%08\" PRIx64,\n> > + offset, val);\n> > +\n> > + offset >>= 2;\n> > +\n> > + switch (offset) {\n> > + case MSSDDR_PLL_STATUS:\n> > + break;\n> > +\n> > + case ESRAM_CR:\n> > + oldval = s->regs[ESRAM_CR];\n> > + if (oldval ^ newval) {\n>\n> Isn't this just:\n> if (newval != s->regs[ESRAM_CR])\n>\n> I think putting it all in the if makes it clearer.\n>\n\nOk will change.\n\n>\n> > + qemu_log_mask(LOG_GUEST_ERROR,\n> > + TYPE_MSF2_SYSREG\": eSRAM remapping not\n> supported\\n\");\n> > + }\n> > + break;\n> > +\n> > + case DDR_CR:\n> > + oldval = s->regs[DDR_CR];\n> > + if (oldval ^ newval) {\n> > + qemu_log_mask(LOG_GUEST_ERROR,\n> > + TYPE_MSF2_SYSREG\": DDR remapping not\n> supported\\n\");\n> > + }\n> > + break;\n> > +\n> > + case ENVM_REMAP_BASE_CR:\n> > + oldval = s->regs[ENVM_REMAP_BASE_CR];\n> > + if (oldval ^ newval) {\n> > + qemu_log_mask(LOG_GUEST_ERROR,\n> > + TYPE_MSF2_SYSREG\": eNVM remapping not\n> supported\\n\");\n> > + }\n> > + break;\n> > +\n> > + default:\n> > + if (offset < ARRAY_SIZE(s->regs)) {\n> > + s->regs[offset] = val;\n>\n> Use newval instead.\n>\n\nOk\n\n>\n> With those all fixed up you can include this in the next version:\n>\n> Reviewed-by: Alistair Francis \n>\n> Thanks,\n> Alistair\n>\n\nThank you,\nSundeep\n\n>\n>\n> > + } else {\n> > + qemu_log_mask(LOG_GUEST_ERROR,\n> > + \"%s: Bad offset 0x%08\" HWADDR_PRIx \"\\n\",\n> __func__,\n> > + offset << 2);\n> > + }\n> > + break;\n> > + }\n> > +}\n> > +\n> > +static const MemoryRegionOps sysreg_ops = {\n> > + .read = msf2_sysreg_read,\n> > + .write = msf2_sysreg_write,\n> > + .endianness = DEVICE_NATIVE_ENDIAN,\n> > +};\n> > +\n> > +static void msf2_sysreg_init(Object *obj)\n> > +{\n> > + MSF2SysregState *s = MSF2_SYSREG(obj);\n> > +\n> > + memory_region_init_io(&s->iomem, obj, &sysreg_ops, s,\n> TYPE_MSF2_SYSREG,\n> > + MSF2_SYSREG_MMIO_SIZE);\n> > + sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem);\n> > +}\n> > +\n> > +static const VMStateDescription vmstate_msf2_sysreg = {\n> > + .name = TYPE_MSF2_SYSREG,\n> > + .version_id = 1,\n> > + .minimum_version_id = 1,\n> > + .fields = (VMStateField[]) {\n> > + VMSTATE_UINT32_ARRAY(regs, MSF2SysregState,\n> MSF2_SYSREG_MMIO_SIZE / 4),\n> > + VMSTATE_END_OF_LIST()\n> > + }\n> > +};\n> > +\n> > +static Property msf2_sysreg_properties[] = {\n> > + /* default divisors in Libero GUI */\n> > + DEFINE_PROP_UINT32(\"apb0divisor\", MSF2SysregState, apb0div, 2),\n> > + DEFINE_PROP_UINT32(\"apb1divisor\", MSF2SysregState, apb1div, 2),\n> > + DEFINE_PROP_END_OF_LIST(),\n> > +};\n> > +\n> > +static void msf2_sysreg_class_init(ObjectClass *klass, void *data)\n> > +{\n> > + DeviceClass *dc = DEVICE_CLASS(klass);\n> > +\n> > + dc->vmsd = &vmstate_msf2_sysreg;\n> > + dc->reset = msf2_sysreg_reset;\n> > + dc->props = msf2_sysreg_properties;\n> > +}\n> > +\n> > +static const TypeInfo msf2_sysreg_info = {\n> > + .name = TYPE_MSF2_SYSREG,\n> > + .parent = TYPE_SYS_BUS_DEVICE,\n> > + .class_init = msf2_sysreg_class_init,\n> > + .instance_size = sizeof(MSF2SysregState),\n> > + .instance_init = msf2_sysreg_init,\n> > +};\n> > +\n> > +static void msf2_sysreg_register_types(void)\n> > +{\n> > + type_register_static(&msf2_sysreg_info);\n> > +}\n> > +\n> > +type_init(msf2_sysreg_register_types)\n> > diff --git a/include/hw/misc/msf2-sysreg.h\n> b/include/hw/misc/msf2-sysreg.h\n> > new file mode 100644\n> > index 0000000..f39cc41\n> > --- /dev/null\n> > +++ b/include/hw/misc/msf2-sysreg.h\n> > @@ -0,0 +1,78 @@\n> > +/*\n> > + * Microsemi SmartFusion2 SYSREG\n> > + *\n> > + * Copyright (c) 2017 Subbaraya Sundeep \n> > + *\n> > + * Permission is hereby granted, free of charge, to any person\n> obtaining a copy\n> > + * of this software and associated documentation files (the\n> \"Software\"), to deal\n> > + * in the Software without restriction, including without limitation\n> the rights\n> > + * to use, copy, modify, merge, publish, distribute, sublicense, and/or\n> sell\n> > + * copies of the Software, and to permit persons to whom the Software is\n> > + * furnished to do so, subject to the following conditions:\n> > + *\n> > + * The above copyright notice and this permission notice shall be\n> included in\n> > + * all copies or substantial portions of the Software.\n> > + *\n> > + * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND,\n> EXPRESS OR\n> > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF\n> MERCHANTABILITY,\n> > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT\n> SHALL\n> > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR\n> OTHER\n> > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,\n> ARISING FROM,\n> > + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER\n> DEALINGS IN\n> > + * THE SOFTWARE.\n> > + */\n> > +\n> > +#ifndef HW_MSF2_SYSREG_H\n> > +#define HW_MSF2_SYSREG_H\n> > +\n> > +#include \"hw/sysbus.h\"\n> > +\n> > +enum {\n> > + ESRAM_CR = 0x00 / 4,\n> > + ESRAM_MAX_LAT,\n> > + DDR_CR,\n> > + ENVM_CR,\n> > + ENVM_REMAP_BASE_CR,\n> > + ENVM_REMAP_FAB_CR,\n> > + CC_CR,\n> > + CC_REGION_CR,\n> > + CC_LOCK_BASE_ADDR_CR,\n> > + CC_FLUSH_INDX_CR,\n> > + DDRB_BUF_TIMER_CR,\n> > + DDRB_NB_ADDR_CR,\n> > + DDRB_NB_SIZE_CR,\n> > + DDRB_CR,\n> > +\n> > + SOFT_RESET_CR = 0x48 / 4,\n> > + M3_CR,\n> > +\n> > + GPIO_SYSRESET_SEL_CR = 0x58 / 4,\n> > +\n> > + MDDR_CR = 0x60 / 4,\n> > +\n> > + MSSDDR_PLL_STATUS_LOW_CR = 0x90 / 4,\n> > + MSSDDR_PLL_STATUS_HIGH_CR,\n> > + MSSDDR_FACC1_CR,\n> > + MSSDDR_FACC2_CR,\n> > +\n> > + MSSDDR_PLL_STATUS = 0x150 / 4,\n> > +\n> > +};\n> > +\n> > +#define MSF2_SYSREG_MMIO_SIZE 0x300\n> > +\n> > +#define TYPE_MSF2_SYSREG \"msf2-sysreg\"\n> > +#define MSF2_SYSREG(obj) OBJECT_CHECK(MSF2SysregState, (obj),\n> TYPE_MSF2_SYSREG)\n> > +\n> > +typedef struct MSF2SysregState {\n> > + SysBusDevice parent_obj;\n> > +\n> > + MemoryRegion iomem;\n> > +\n> > + uint32_t apb0div;\n> > + uint32_t apb1div;\n> > +\n> > + uint32_t regs[MSF2_SYSREG_MMIO_SIZE / 4];\n> > +} MSF2SysregState;\n> > +\n> > +#endif /* HW_MSF2_SYSREG_H */\n> > --\n> > 2.5.0\n> >\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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charset=\"UTF-8\"","X-Content-Filtered-By":"Mailman/MimeDel 2.1.21","Subject":"Re: [Qemu-devel] [Qemu devel v7 PATCH 2/5] msf2: Microsemi\n\tSmartfusion2 System Register block","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Maydell , =?utf-8?q?Philippe_Mathieu-D?=\n\t=?utf-8?b?YXVkw6k=?= , \tqemu-arm ,\n\t\"qemu-devel@nongnu.org Developers\" , \n\tPeter Crosthwaite ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}}]