[{"id":1758203,"web_url":"http://patchwork.ozlabs.org/comment/1758203/","msgid":"<1503809791.3814.43.camel@kernel.crashing.org>","date":"2017-08-27T04:56:31","subject":"Re: [PATCH] powerpc/44x: mask and shift to zero bug","submitter":{"id":38,"url":"http://patchwork.ozlabs.org/api/people/38/","name":"Benjamin Herrenschmidt","email":"benh@kernel.crashing.org"},"content":"On Fri, 2017-08-25 at 13:33 +0300, Dan Carpenter wrote:\n> My static checker complains that 0x00001800 >> 13 is zero. Looking at\n> the context, it seems like a copy and paste bug from the line below and\n> probably 0x3 << 13 or 0x00006000 was intended.\n> \n> Fixes: 2af59f7d5c3e (\"[POWERPC] 4xx: Add 405GPr and 405EP support in boot wrapper\")\n> Signed-off-by: Dan Carpenter \n> ---\n> Not tested!\n> \n> diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c\n> index 9d3bd4c45a24..f7da65169124 100644\n> --- a/arch/powerpc/boot/4xx.c\n> +++ b/arch/powerpc/boot/4xx.c\n> @@ -564,7 +564,7 @@ void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk)\n> \t\tfbdv = 16;\n> \tcbdv = ((pllmr & 0x00060000) >> 17) + 1; /* CPU:PLB */\n> \topdv = ((pllmr & 0x00018000) >> 15) + 1; /* PLB:OPB */\n> -\tppdv = ((pllmr & 0x00001800) >> 13) + 1; /* PLB:PCI */\n> +\tppdv = ((pllmr & 0x00006000) >> 13) + 1; /* PLB:PCI */\n> \tepdv = ((pllmr & 0x00001800) >> 11) + 2; /* PLB:EBC */\n> \tudiv = ((cpc0_cr0 & 0x3e) >> 1) + 1; \n\nThat rings a bell... Is this something we tried to fix before and had\nproblems ? The thing is when I opened the 405GP and EP manual PDF,\nevince had memorized that this register was the last page I looked at\n:-) And I don't remember how many years ago that is.\n\nAccording to the 405gp spec ppdv is IBM bits 17,18 so your patch is\ncorrect.\n\nAcked-by: Benjamin Herrenschmidt ","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xg2l12PsRz9t1G\n\tfor ;\n\tSun, 27 Aug 2017 14:59:57 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xg2l11d6fzDr97\n\tfor ;\n\tSun, 27 Aug 2017 14:59:57 +1000 (AEST)","from gate.crashing.org (gate.crashing.org [63.228.1.57])\n\t(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xg2jt5KnzzDqZx\n\tfor ;\n\tSun, 27 Aug 2017 14:58:58 +1000 (AEST)","from localhost (localhost.localdomain [127.0.0.1])\n\tby gate.crashing.org (8.14.1/8.13.8) with ESMTP id v7R4uVXI029405;\n\tSat, 26 Aug 2017 23:56:33 -0500"],"Message-ID":"<1503809791.3814.43.camel@kernel.crashing.org>","Subject":"Re: [PATCH] powerpc/44x: mask and shift to zero bug","From":"Benjamin Herrenschmidt ","To":"Dan Carpenter , Matthias Fuchs\n\t","Date":"Sun, 27 Aug 2017 14:56:31 +1000","In-Reply-To":"<20170825103340.op3uphrv3eyeutiz@mwanda>","References":"<20170825103340.op3uphrv3eyeutiz@mwanda>","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailer":"Evolution 3.24.5 (3.24.5-1.fc26) ","Mime-Version":"1.0","Content-Transfer-Encoding":"7bit","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"kernel-janitors@vger.kernel.org, Paul Mackerras ,\n\tlinuxppc-dev@lists.ozlabs.org","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}},{"id":1758419,"web_url":"http://patchwork.ozlabs.org/comment/1758419/","msgid":"<20170828075705.dxyoqyxgmd3ila3g@mwanda>","date":"2017-08-28T07:57:05","subject":"Re: [PATCH] powerpc/44x: mask and shift to zero bug","submitter":{"id":9327,"url":"http://patchwork.ozlabs.org/api/people/9327/","name":"Dan Carpenter","email":"dan.carpenter@oracle.com"},"content":"On Sun, Aug 27, 2017 at 02:56:31PM +1000, Benjamin Herrenschmidt wrote:\n> On Fri, 2017-08-25 at 13:33 +0300, Dan Carpenter wrote:\n> > My static checker complains that 0x00001800 >> 13 is zero. Looking at\n> > the context, it seems like a copy and paste bug from the line below and\n> > probably 0x3 << 13 or 0x00006000 was intended.\n> > \n> > Fixes: 2af59f7d5c3e (\"[POWERPC] 4xx: Add 405GPr and 405EP support in boot wrapper\")\n> > Signed-off-by: Dan Carpenter \n> > ---\n> > Not tested!\n> > \n> > diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c\n> > index 9d3bd4c45a24..f7da65169124 100644\n> > --- a/arch/powerpc/boot/4xx.c\n> > +++ b/arch/powerpc/boot/4xx.c\n> > @@ -564,7 +564,7 @@ void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk)\n> > \t\tfbdv = 16;\n> > \tcbdv = ((pllmr & 0x00060000) >> 17) + 1; /* CPU:PLB */\n> > \topdv = ((pllmr & 0x00018000) >> 15) + 1; /* PLB:OPB */\n> > -\tppdv = ((pllmr & 0x00001800) >> 13) + 1; /* PLB:PCI */\n> > +\tppdv = ((pllmr & 0x00006000) >> 13) + 1; /* PLB:PCI */\n> > \tepdv = ((pllmr & 0x00001800) >> 11) + 2; /* PLB:EBC */\n> > \tudiv = ((cpc0_cr0 & 0x3e) >> 1) + 1; \n> \n> That rings a bell... Is this something we tried to fix before and had\n> problems ? The thing is when I opened the 405GP and EP manual PDF,\n> evince had memorized that this register was the last page I looked at\n> :-) And I don't remember how many years ago that is.\n> \n> According to the 405gp spec ppdv is IBM bits 17,18 so your patch is\n> correct.\n> \n> Acked-by: Benjamin Herrenschmidt \n\nHm... I did a search through my mailbox and you're right we discussed\nthis before.\n\n[bug report] [POWERPC] 4xx: Add 405GPr and 405EP support in boot wrapper\n\nI sent this email during kernel summit and neither of us could send a\npatch at the time and we both problem forgot. I definitely forgot.\n\nregards,\ndan carpenter","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xgkfv4LN1z9sN5\n\tfor ;\n\tMon, 28 Aug 2017 17:58:47 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xgkfv3VygzDqYy\n\tfor ;\n\tMon, 28 Aug 2017 17:58:47 +1000 (AEST)","from userp1040.oracle.com (userp1040.oracle.com [156.151.31.81])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xgkdl5bmBzDq5b\n\tfor ;\n\tMon, 28 Aug 2017 17:57:47 +1000 (AEST)","from userv0021.oracle.com (userv0021.oracle.com [156.151.31.71])\n\tby userp1040.oracle.com (Sentrion-MTA-4.3.2/Sentrion-MTA-4.3.2) with\n\tESMTP id v7S7vUbb025710\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256\n\tverify=OK); Mon, 28 Aug 2017 07:57:31 GMT","from aserv0121.oracle.com (aserv0121.oracle.com [141.146.126.235])\n\tby userv0021.oracle.com (8.14.4/8.14.4) with ESMTP id\n\tv7S7vTuL032319\n\t(version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256\n\tverify=OK); Mon, 28 Aug 2017 07:57:30 GMT","from abhmp0004.oracle.com (abhmp0004.oracle.com [141.146.116.10])\n\tby aserv0121.oracle.com (8.14.4/8.13.8) with ESMTP id\n\tv7S7vTs5016369; Mon, 28 Aug 2017 07:57:29 GMT","from mwanda (/197.157.0.34) by default (Oracle Beehive Gateway\n\tv4.0) with ESMTP ; Mon, 28 Aug 2017 00:57:28 -0700"],"Date":"Mon, 28 Aug 2017 10:57:05 +0300","From":"Dan Carpenter ","To":"Benjamin Herrenschmidt ","Subject":"Re: [PATCH] powerpc/44x: mask and shift to zero bug","Message-ID":"<20170828075705.dxyoqyxgmd3ila3g@mwanda>","References":"<20170825103340.op3uphrv3eyeutiz@mwanda>\n\t<1503809791.3814.43.camel@kernel.crashing.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<1503809791.3814.43.camel@kernel.crashing.org>","User-Agent":"NeoMutt/20170113 (1.7.2)","X-Source-IP":"userv0021.oracle.com [156.151.31.71]","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Matthias Fuchs ,\n\tkernel-janitors@vger.kernel.org, Paul Mackerras ,\n\tlinuxppc-dev@lists.ozlabs.org","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}},{"id":1758444,"web_url":"http://patchwork.ozlabs.org/comment/1758444/","msgid":"<20170828083618.pbbelpkp6smk4bza@mwanda>","date":"2017-08-28T08:36:19","subject":"Re: [PATCH] powerpc/44x: mask and shift to zero bug","submitter":{"id":9327,"url":"http://patchwork.ozlabs.org/api/people/9327/","name":"Dan Carpenter","email":"dan.carpenter@oracle.com"},"content":"On Mon, Aug 28, 2017 at 10:57:05AM +0300, Dan Carpenter wrote:\n> I sent this email during kernel summit and neither of us could send a\n> patch at the time and we both problem forgot. I definitely forgot.\n> \n\ns/problem/probably/... I suck at email. :(\n\nregards,\ndan carpenter","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xglYQ6XQ5z9sNq\n\tfor ;\n\tMon, 28 Aug 2017 18:39:06 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xglYQ5V3lzDqMK\n\tfor ;\n\tMon, 28 Aug 2017 18:39:06 +1000 (AEST)","from userp1040.oracle.com (userp1040.oracle.com [156.151.31.81])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xglVr4PCnzDqGW\n\tfor ;\n\tMon, 28 Aug 2017 18:36:52 +1000 (AEST)","from aserv0022.oracle.com (aserv0022.oracle.com [141.146.126.234])\n\tby userp1040.oracle.com (Sentrion-MTA-4.3.2/Sentrion-MTA-4.3.2)\n\twith ESMTP id v7S8afUX001636\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256\n\tverify=OK); Mon, 28 Aug 2017 08:36:41 GMT","from aserv0122.oracle.com (aserv0122.oracle.com [141.146.126.236])\n\tby aserv0022.oracle.com (8.14.4/8.14.4) with ESMTP id\n\tv7S8adZN023549\n\t(version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256\n\tverify=OK); Mon, 28 Aug 2017 08:36:39 GMT","from abhmp0011.oracle.com (abhmp0011.oracle.com [141.146.116.17])\n\tby aserv0122.oracle.com (8.14.4/8.14.4) with ESMTP id\n\tv7S8aaBM018835; Mon, 28 Aug 2017 08:36:37 GMT","from mwanda (/197.157.0.34) by default (Oracle Beehive Gateway\n\tv4.0) with ESMTP ; Mon, 28 Aug 2017 01:36:35 -0700"],"Date":"Mon, 28 Aug 2017 11:36:19 +0300","From":"Dan Carpenter ","To":"Benjamin Herrenschmidt ","Subject":"Re: [PATCH] powerpc/44x: mask and shift to zero bug","Message-ID":"<20170828083618.pbbelpkp6smk4bza@mwanda>","References":"<20170825103340.op3uphrv3eyeutiz@mwanda>\n\t<1503809791.3814.43.camel@kernel.crashing.org>\n\t<20170828075705.dxyoqyxgmd3ila3g@mwanda>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170828075705.dxyoqyxgmd3ila3g@mwanda>","User-Agent":"NeoMutt/20170113 (1.7.2)","X-Source-IP":"aserv0022.oracle.com [141.146.126.234]","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Matthias Fuchs ,\n\tkernel-janitors@vger.kernel.org, Paul Mackerras ,\n\tlinuxppc-dev@lists.ozlabs.org","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}},{"id":1758504,"web_url":"http://patchwork.ozlabs.org/comment/1758504/","msgid":"<87lgm4ueh0.fsf@concordia.ellerman.id.au>","date":"2017-08-28T11:19:23","subject":"Re: [PATCH] powerpc/44x: mask and shift to zero bug","submitter":{"id":46580,"url":"http://patchwork.ozlabs.org/api/people/46580/","name":"Michael Ellerman","email":"mpe@ellerman.id.au"},"content":"Dan Carpenter writes:\n\n> On Sun, Aug 27, 2017 at 02:56:31PM +1000, Benjamin Herrenschmidt wrote:\n>> On Fri, 2017-08-25 at 13:33 +0300, Dan Carpenter wrote:\n>> > My static checker complains that 0x00001800 >> 13 is zero. Looking at\n>> > the context, it seems like a copy and paste bug from the line below and\n>> > probably 0x3 << 13 or 0x00006000 was intended.\n>> > \n>> > Fixes: 2af59f7d5c3e (\"[POWERPC] 4xx: Add 405GPr and 405EP support in boot wrapper\")\n>> > Signed-off-by: Dan Carpenter \n>> > ---\n>> > Not tested!\n>> > \n>> > diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c\n>> > index 9d3bd4c45a24..f7da65169124 100644\n>> > --- a/arch/powerpc/boot/4xx.c\n>> > +++ b/arch/powerpc/boot/4xx.c\n>> > @@ -564,7 +564,7 @@ void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk)\n>> > \t\tfbdv = 16;\n>> > \tcbdv = ((pllmr & 0x00060000) >> 17) + 1; /* CPU:PLB */\n>> > \topdv = ((pllmr & 0x00018000) >> 15) + 1; /* PLB:OPB */\n>> > -\tppdv = ((pllmr & 0x00001800) >> 13) + 1; /* PLB:PCI */\n>> > +\tppdv = ((pllmr & 0x00006000) >> 13) + 1; /* PLB:PCI */\n>> > \tepdv = ((pllmr & 0x00001800) >> 11) + 2; /* PLB:EBC */\n>> > \tudiv = ((cpc0_cr0 & 0x3e) >> 1) + 1; \n>> \n>> That rings a bell... Is this something we tried to fix before and had\n>> problems ? The thing is when I opened the 405GP and EP manual PDF,\n>> evince had memorized that this register was the last page I looked at\n>> :-) And I don't remember how many years ago that is.\n>> \n>> According to the 405gp spec ppdv is IBM bits 17,18 so your patch is\n>> correct.\n>> \n>> Acked-by: Benjamin Herrenschmidt \n>\n> Hm... I did a search through my mailbox and you're right we discussed\n> this before.\n>\n> [bug report] [POWERPC] 4xx: Add 405GPr and 405EP support in boot wrapper\n>\n> I sent this email during kernel summit and neither of us could send a\n> patch at the time and we both problem forgot. I definitely forgot.\n\nIf you send a patch with the report, like you did this time, then it\nwill be remembered in patchwork. That doesn't mean we won't forget it,\nbut it makes is *less likely* we'll forget it :)\n\nhttp://patchwork.ozlabs.org/project/linuxppc-dev/list/?submitter=9327&state=%2A&archive=both\n\ncheers","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xgq7Y3g0Sz9sNq\n\tfor ;\n\tMon, 28 Aug 2017 21:20:25 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xgq7Y2YY6zDqZB\n\tfor ;\n\tMon, 28 Aug 2017 21:20:25 +1000 (AEST)","from ozlabs.org (bilbo.ozlabs.org [103.22.144.67])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xgq6N2mbyzDq66\n\tfor ;\n\tMon, 28 Aug 2017 21:19:24 +1000 (AEST)","from authenticated.ozlabs.org (localhost [127.0.0.1])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPSA id 3xgq6N0FTNz9sD9;\n\tMon, 28 Aug 2017 21:19:23 +1000 (AEST)"],"From":"Michael Ellerman ","To":"Dan Carpenter ,\n\tBenjamin Herrenschmidt ","Subject":"Re: [PATCH] powerpc/44x: mask and shift to zero bug","In-Reply-To":"<20170828075705.dxyoqyxgmd3ila3g@mwanda>","References":"<20170825103340.op3uphrv3eyeutiz@mwanda>\n\t<1503809791.3814.43.camel@kernel.crashing.org>\n\t<20170828075705.dxyoqyxgmd3ila3g@mwanda>","User-Agent":"Notmuch/0.21 (https://notmuchmail.org)","Date":"Mon, 28 Aug 2017 21:19:23 +1000","Message-ID":"<87lgm4ueh0.fsf@concordia.ellerman.id.au>","MIME-Version":"1.0","Content-Type":"text/plain","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Matthias Fuchs ,\n\tkernel-janitors@vger.kernel.org, Paul Mackerras ,\n\tlinuxppc-dev@lists.ozlabs.org","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}},{"id":1760904,"web_url":"http://patchwork.ozlabs.org/comment/1760904/","msgid":"<3xjgLY3B4Qz9t2y@ozlabs.org>","date":"2017-08-31T11:36:21","subject":"Re: powerpc/44x: mask and shift to zero bug","submitter":{"id":69509,"url":"http://patchwork.ozlabs.org/api/people/69509/","name":"Michael Ellerman","email":"patch-notifications@ellerman.id.au"},"content":"On Fri, 2017-08-25 at 10:33:40 UTC, Dan Carpenter wrote:\n> My static checker complains that 0x00001800 >> 13 is zero. Looking at\n> the context, it seems like a copy and paste bug from the line below and\n> probably 0x3 << 13 or 0x00006000 was intended.\n> \n> Fixes: 2af59f7d5c3e (\"[POWERPC] 4xx: Add 405GPr and 405EP support in boot wrapper\")\n> Signed-off-by: Dan Carpenter \n> Acked-by: Benjamin Herrenschmidt \n\nApplied to powerpc next, thanks.\n\nhttps://git.kernel.org/powerpc/c/8d046759f6ad75824fdf7b9c9a3da0\n\ncheers","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xjhFX6zz1z9sMN\n\tfor ;\n\tThu, 31 Aug 2017 22:17:04 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xjhFX61N1zDrL4\n\tfor ;\n\tThu, 31 Aug 2017 22:17:04 +1000 (AEST)","from ozlabs.org (ozlabs.org [IPv6:2401:3900:2:1::2])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xjgLY5RyrzDqGZ\n\tfor ;\n\tThu, 31 Aug 2017 21:36:21 +1000 (AEST)","by ozlabs.org (Postfix, from userid 1034)\n\tid 3xjgLY3B4Qz9t2y; Thu, 31 Aug 2017 21:36:21 +1000 (AEST)"],"X-powerpc-patch-notification":"thanks","X-powerpc-patch-commit":"8d046759f6ad75824fdf7b9c9a3da0272ea9ea92","In-Reply-To":"<20170825103340.op3uphrv3eyeutiz@mwanda>","To":"Dan Carpenter ,\n\tBenjamin Herrenschmidt ,\n\tMatthias Fuchs ","From":"Michael Ellerman ","Subject":"Re: powerpc/44x: mask and shift to zero bug","Message-Id":"<3xjgLY3B4Qz9t2y@ozlabs.org>","Date":"Thu, 31 Aug 2017 21:36:21 +1000 (AEST)","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Paul Mackerras , kernel-janitors@vger.kernel.org,\n\tlinuxppc-dev@lists.ozlabs.org","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}}]