[{"id":1755094,"web_url":"http://patchwork.ozlabs.org/comment/1755094/","msgid":"<43f7cb54-8166-dff8-1b5f-24019e7652e4@samsung.com>","list_archive_url":null,"date":"2017-08-23T11:14:53","subject":"Re: [U-Boot] [PATCH v2 1/2] mmc: sunxi: Support new mode","submitter":{"id":8006,"url":"http://patchwork.ozlabs.org/api/people/8006/","name":"Jaehoon Chung","email":"jh80.chung@samsung.com"},"content":"Hi,\n\nOn 08/23/2017 07:03 PM, Maxime Ripard wrote:\n> Almost all of the newer Allwinner SoCs have a new operating mode for the\n> eMMC clocks that needs to be enabled in both the clock and the MMC\n> controller.\n> \n> Details about that mode are sparse, and the name itself (new mode vs old\n> mode) doesn't give much details, but it seems that the it changes the\n> sampling of the MMC clock. One side effect is also that it divides the\n> parent clock rate by 2.\n> \n> Add support for it through a Kconfig option.\n\nWell, i don't know exactly what mode likes your mention..\nI think it can be got from dt if it's provided from controller IP or SoC.\nhow about?\n\nBest Regards,\nJaehoon Chung\n\n> \n> Signed-off-by: Maxime Ripard \n> \n> ---\n> Changes from v1:\n> - Switched to IS_ENABLED when possible\n> - Added some defines\n> - Tried to put more details in the commit log\n> - Added a depends on in the Kconfig option\n> ---\n> arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h | 1 +\n> arch/arm/include/asm/arch-sunxi/mmc.h | 11 ++++++---\n> drivers/mmc/Kconfig | 4 ++++\n> drivers/mmc/sunxi_mmc.c | 27 +++++++++++++++++++---\n> 4 files changed, 37 insertions(+), 6 deletions(-)\n> \n> diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h b/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h\n> index 5e1346e5242a..5dfcbf3b017b 100644\n> --- a/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h\n> +++ b/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h\n> @@ -220,6 +220,7 @@ struct sunxi_ccm_reg {\n> #define CCM_MMC_CTRL_SCLK_DLY(x)\t((x) << 20)\n> #define CCM_MMC_CTRL_OSCM24\t\t(0x0 << 24)\n> #define CCM_MMC_CTRL_PLL6\t\t(0x1 << 24)\n> +#define CCM_MMC_CTRL_MODE_SEL_NEW\t(0x1 << 30)\n> #define CCM_MMC_CTRL_ENABLE\t\t(0x1 << 31)\n> \n> #define CCM_USB_CTRL_PHY0_RST (0x1 << 0)\n> diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h b/arch/arm/include/asm/arch-sunxi/mmc.h\n> index cb52e648731c..69f737f3bffc 100644\n> --- a/arch/arm/include/asm/arch-sunxi/mmc.h\n> +++ b/arch/arm/include/asm/arch-sunxi/mmc.h\n> @@ -35,16 +35,19 @@ struct sunxi_mmc {\n> \tu32 cbcr;\t\t/* 0x48 CIU byte count */\n> \tu32 bbcr;\t\t/* 0x4c BIU byte count */\n> \tu32 dbgc;\t\t/* 0x50 debug enable */\n> -\tu32 res0[11];\n> +\tu32 res0;\t\t/* 0x54 reserved */\n> +\tu32 a12a;\t\t/* 0x58 Auto command 12 argument */\n> +\tu32 ntsr;\t\t/* 0x5c\tNew timing set register */\n> +\tu32 res1[8];\n> \tu32 dmac;\t\t/* 0x80 internal DMA control */\n> \tu32 dlba;\t\t/* 0x84 internal DMA descr list base address */\n> \tu32 idst;\t\t/* 0x88 internal DMA status */\n> \tu32 idie;\t\t/* 0x8c internal DMA interrupt enable */\n> \tu32 chda;\t\t/* 0x90 */\n> \tu32 cbda;\t\t/* 0x94 */\n> -\tu32 res1[26];\n> +\tu32 res2[26];\n> #ifdef CONFIG_SUNXI_GEN_SUN6I\n> -\tu32 res2[64];\n> +\tu32 res3[64];\n> #endif\n> \tu32 fifo;\t\t/* 0x100 / 0x200 FIFO access address */\n> };\n> @@ -116,6 +119,8 @@ struct sunxi_mmc {\n> #define SUNXI_MMC_STATUS_CARD_DATA_BUSY\t\t(0x1 << 9)\n> #define SUNXI_MMC_STATUS_DATA_FSM_BUSY\t\t(0x1 << 10)\n> \n> +#define SUNXI_MMC_NTSR_MODE_SEL_NEW\t\t(0x1 << 31)\n> +\n> #define SUNXI_MMC_IDMAC_RESET\t\t(0x1 << 0)\n> #define SUNXI_MMC_IDMAC_FIXBURST\t(0x1 << 1)\n> #define SUNXI_MMC_IDMAC_ENABLE\t\t(0x1 << 7)\n> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig\n> index 51a87cdd77dc..9075b346036b 100644\n> --- a/drivers/mmc/Kconfig\n> +++ b/drivers/mmc/Kconfig\n> @@ -389,6 +389,10 @@ config MMC_SUNXI\n> \t This selects support for the SD/MMC Host Controller on\n> \t Allwinner sunxi SoCs.\n> \n> +config MMC_SUNXI_HAS_NEW_MODE\n> +\tbool\n> +\tdepends on MMC_SUNXI\n> +\n> config GENERIC_ATMEL_MCI\n> \tbool \"Atmel Multimedia Card Interface support\"\n> \tdepends on DM_MMC && BLK && DM_MMC_OPS && ARCH_AT91\n> diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c\n> index 588574fab6a9..bc638ae2e64a 100644\n> --- a/drivers/mmc/sunxi_mmc.c\n> +++ b/drivers/mmc/sunxi_mmc.c\n> @@ -96,6 +96,18 @@ static int mmc_resource_init(int sdc_no)\n> static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz)\n> {\n> \tunsigned int pll, pll_hz, div, n, oclk_dly, sclk_dly;\n> +\tbool new_mode = false;\n> +\tu32 val = 0;\n> +\n> +\tif (IS_ENABLED(CONFIG_MMC_SUNXI_HAS_NEW_MODE) && (priv->mmc_no == 2))\n> +\t\tnew_mode = true;\n> +\n> +\t/*\n> +\t * The MMC clock has an extra /2 post-divider when operating in the new\n> +\t * mode.\n> +\t */\n> +\tif (new_mode)\n> +\t\thz = hz * 2;\n> \n> \tif (hz <= 24000000) {\n> \t\tpll = CCM_MMC_CTRL_OSCM24;\n> @@ -152,9 +164,18 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz)\n> #endif\n> \t}\n> \n> -\twritel(CCM_MMC_CTRL_ENABLE | pll | CCM_MMC_CTRL_SCLK_DLY(sclk_dly) |\n> -\t CCM_MMC_CTRL_N(n) | CCM_MMC_CTRL_OCLK_DLY(oclk_dly) |\n> -\t CCM_MMC_CTRL_M(div), priv->mclkreg);\n> +\tif (new_mode) {\n> +#ifdef CONFIG_MMC_SUNXI_HAS_NEW_MODE\n> +\t\tval = CCM_MMC_CTRL_MODE_SEL_NEW;\n> +\t\twritel(SUNXI_MMC_NTSR_MODE_SEL_NEW, &priv->reg->ntsr);\n> +#endif\n> +\t} else {\n> +\t\tval = CCM_MMC_CTRL_OCLK_DLY(oclk_dly) |\n> +\t\t\tCCM_MMC_CTRL_SCLK_DLY(sclk_dly);\n> +\t}\n> +\n> +\twritel(CCM_MMC_CTRL_ENABLE| pll | CCM_MMC_CTRL_N(n) |\n> +\t CCM_MMC_CTRL_M(div) | val, priv->mclkreg);\n> \n> \tdebug(\"mmc %u set mod-clk req %u parent %u n %u m %u rate %u\\n\",\n> \t priv->mmc_no, hz, pll_hz, 1u << n, div, pll_hz / (1u << n) / div);\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xclFw71zmz9s8P\n\tfor ;\n\tWed, 23 Aug 2017 21:15:15 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 46C55C21E2C; Wed, 23 Aug 2017 11:15:06 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 03815C21DA4;\n\tWed, 23 Aug 2017 11:15:04 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 0497FC21DA4; Wed, 23 Aug 2017 11:15:01 +0000 (UTC)","from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33])\n\tby lists.denx.de (Postfix) with ESMTPS id 8A6B8C21D78\n\tfor ; Wed, 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epsmgms2p2new.samsung.com\n\t(Symantec Messaging Gateway) with SMTP id 29.39.10338.DA36D995;\n\tWed, 23 Aug 2017 20:14:53 +0900 (KST)","from [10.113.62.216] by mmp2.samsung.com (Oracle Communications\n\tMessaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id\n\t<0OV400D09XWTFB30@mmp2.samsung.com>;\n\tWed, 23 Aug 2017 20:14:53 +0900 (KST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-5.0 required=5.0 tests=RCVD_IN_DNSWL_HI,\n\tSPF_HELO_PASS autolearn=unavailable autolearn_force=no version=3.4.0","X-AuditID":"b6c32a47-f79db6d000003732-ad-599d63ae8ba3","To":"Maxime Ripard , Jagan Teki\n\t","From":"Jaehoon Chung ","Message-id":"<43f7cb54-8166-dff8-1b5f-24019e7652e4@samsung.com>","Date":"Wed, 23 Aug 2017 20:14:53 +0900","User-Agent":"Mozilla/5.0 (X11; Linux i686; rv:52.0) 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[U-Boot] [PATCH v2 1/2] mmc: sunxi: Support new mode","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1756041,"web_url":"http://patchwork.ozlabs.org/comment/1756041/","msgid":"<20170824084247.pe4nnvmn2ze6mxc6@flea.lan>","list_archive_url":null,"date":"2017-08-24T08:42:47","subject":"Re: [U-Boot] [PATCH v2 1/2] mmc: sunxi: Support new mode","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"Hi Jaehoon,\n\nOn Wed, Aug 23, 2017 at 08:14:53PM +0900, Jaehoon Chung wrote:\n> Hi,\n> \n> On 08/23/2017 07:03 PM, Maxime Ripard wrote:\n> > Almost all of the newer Allwinner SoCs have a new operating mode for the\n> > eMMC clocks that needs to be enabled in both the clock and the MMC\n> > controller.\n> > \n> > Details about that mode are sparse, and the name itself (new mode vs old\n> > mode) doesn't give much details, but it seems that the it changes the\n> > sampling of the MMC clock. One side effect is also that it divides the\n> > parent clock rate by 2.\n> > \n> > Add support for it through a Kconfig option.\n> \n> Well, i don't know exactly what mode likes your mention..\n> I think it can be got from dt if it's provided from controller IP or SoC.\n> how about?\n\nThat's how we do it in Linux, and obviously is our long term goal in\nU-Boot as well. However, the current driver in U-Boot doesn't use the\ndevice model (and the DT), so we cannot use that for now.\n\nOnce the switch is over, we'll of course switch to something like you\nsuggested.\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xdHqx621mz9s4s\n\tfor ;\n\tThu, 24 Aug 2017 18:43:09 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 845EBC21E92; Thu, 24 Aug 2017 08:43:04 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id CFA70C21C62;\n\tThu, 24 Aug 2017 08:43:01 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 690DAC21C62; Thu, 24 Aug 2017 08:43:00 +0000 (UTC)","from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54])\n\tby lists.denx.de (Postfix) with ESMTP id 497E8C21C39\n\tfor ; Thu, 24 Aug 2017 08:42:59 +0000 (UTC)","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 4DB9E209FA; Thu, 24 Aug 2017 10:42:57 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 2137720852;\n\tThu, 24 Aug 2017 10:42:47 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=none autolearn=unavailable\n\tautolearn_force=no version=3.4.0","Date":"Thu, 24 Aug 2017 10:42:47 +0200","From":"Maxime Ripard ","To":"Jaehoon Chung ","Message-ID":"<20170824084247.pe4nnvmn2ze6mxc6@flea.lan>","References":"\n\t<20170823100342.26148-1-maxime.ripard@free-electrons.com>\n\t<43f7cb54-8166-dff8-1b5f-24019e7652e4@samsung.com>","MIME-Version":"1.0","In-Reply-To":"<43f7cb54-8166-dff8-1b5f-24019e7652e4@samsung.com>","User-Agent":"NeoMutt/20170714 (1.8.3)","Cc":"u-boot@lists.denx.de, Jagan Teki ","Subject":"Re: [U-Boot] [PATCH v2 1/2] mmc: sunxi: Support new mode","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"multipart/mixed;\n\tboundary=\"===============2319342837739579802==\"","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1757927,"web_url":"http://patchwork.ozlabs.org/comment/1757927/","msgid":"","list_archive_url":null,"date":"2017-08-26T06:40:34","subject":"Re: [U-Boot] [PATCH v2 1/2] mmc: sunxi: Support new mode","submitter":{"id":20045,"url":"http://patchwork.ozlabs.org/api/people/20045/","name":"Jagan Teki","email":"jagannadh.teki@gmail.com"},"content":"On Wed, Aug 23, 2017 at 3:33 PM, Maxime Ripard\n wrote:\n> Almost all of the newer Allwinner SoCs have a new operating mode for the\n> eMMC clocks that needs to be enabled in both the clock and the MMC\n> controller.\n>\n> Details about that mode are sparse, and the name itself (new mode vs old\n> mode) doesn't give much details, but it seems that the it changes the\n> sampling of the MMC clock. One side effect is also that it divides the\n> parent clock rate by 2.\n>\n> Add support for it through a Kconfig option.\n>\n> Signed-off-by: Maxime Ripard \n\nReviewed-by: Jagan Teki \n\nthanks!","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"nWhT5p+e\"; dkim-atps=neutral"],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xfT1j4xVZz9t3J\n\tfor ;\n\tSat, 26 Aug 2017 16:40:41 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 6354DC22083; Sat, 26 Aug 2017 06:40:39 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 81BA1C2206E;\n\tSat, 26 Aug 2017 06:40:37 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 4A7A8C2204D; Sat, 26 Aug 2017 06:40:36 +0000 (UTC)","from mail-lf0-f66.google.com (mail-lf0-f66.google.com\n\t[209.85.215.66])\n\tby lists.denx.de (Postfix) with ESMTPS id 93B3AC2204D\n\tfor ; Sat, 26 Aug 2017 06:40:35 +0000 (UTC)","by mail-lf0-f66.google.com with SMTP id g77so985998lfg.2\n\tfor ; Fri, 25 Aug 2017 23:40:35 -0700 (PDT)","by 10.25.143.131 with HTTP; Fri, 25 Aug 2017 23:40:34 -0700 (PDT)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-0.0 required=5.0 tests=FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=5V92r7LjlNMbegR/rXZ9jUVX3nhYpflw1qlIvn9ib0E=;\n\tb=nWhT5p+euEI9rICPx3xak1jv6wj97DWRFcgVjdC8VmCrfZe7A5vJg1I+2yiIjDk52f\n\tjIEN9xQhCCQVRhFxEhEh8rboecwU9Zq5L88XgKKq2/yxlVVcV0Zb14/Gkh4ImFgTsFIr\n\tIh1EM+zh9enw8prss7CD0VGLoi7VGfjorlzapuJ5sRT+FToj+zZqygrWp7J6DRJkK9VA\n\tcomdgcSGaWi9G7nyBuZJbVgZHx4f14UF+NHvRD1ibGu1etpol/q3ALG959nl1UwMY2cK\n\tcPNwpjXW1U75sK+cDZbt2kNkP2wmi3Eolx4acHuzHd2u/IT1Wn0BMMf1/hVyKs4Nyzoz\n\tRrmg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=5V92r7LjlNMbegR/rXZ9jUVX3nhYpflw1qlIvn9ib0E=;\n\tb=tZzhsZf/aV9dTt/95MGxG64UmcdAtupG9lCTLxaCa1kwQpMVXoEq+ZwYfzj9iWgEZT\n\tA/bQTnku1+wKACaCDILpwptDWz4AnUf9wusGBwg/tH4q2WZe67ei9/CN0YI3uD0VF1q3\n\tnBwlma5ddA51L6GxEujZgx27NLHFDRgTxcibpmu7DcWbaD0c2+Itrx/a/zaNjG4ESVvs\n\tE9jInO1ayEbZ5mfoAseZDHuTlM0t73uG8NiF6UroZoccyLI2lpHkLuzMK/JmJnfqTFIk\n\tG+tmsNxqF12MtXlghU2cqwRJBCp6nX4thtpwv+IX+5C2Fdp1Hkz/xVmxLJpgH13XqChV\n\tzt5w==","X-Gm-Message-State":"AHYfb5gA+gKpz+lenYSsq070KnhwageYEXkIm7zGJ5JUAweEiFhEWj2Z\n\tsc1gQkgwR8QKRBVRvW2NPZjYZs/tKZTV","X-Received":"by 10.25.40.78 with SMTP id o75mr293014lfo.127.1503729635091;\n\tFri, 25 Aug 2017 23:40:35 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170823100342.26148-1-maxime.ripard@free-electrons.com>","References":"<20170823100342.26148-1-maxime.ripard@free-electrons.com>","From":"Jagan Teki ","Date":"Sat, 26 Aug 2017 12:10:34 +0530","Message-ID":"","To":"Maxime Ripard ","Cc":"\"u-boot@lists.denx.de\" ,\n\tJagan Teki ","Subject":"Re: [U-Boot] [PATCH v2 1/2] mmc: sunxi: Support new mode","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1758724,"web_url":"http://patchwork.ozlabs.org/comment/1758724/","msgid":"","list_archive_url":null,"date":"2017-08-28T17:19:11","subject":"Re: [U-Boot] [PATCH v2 1/2] mmc: sunxi: Support new mode","submitter":{"id":20045,"url":"http://patchwork.ozlabs.org/api/people/20045/","name":"Jagan Teki","email":"jagannadh.teki@gmail.com"},"content":"On Sat, Aug 26, 2017 at 12:10 PM, Jagan Teki wrote:\n> On Wed, Aug 23, 2017 at 3:33 PM, Maxime Ripard\n> wrote:\n>> Almost all of the newer Allwinner SoCs have a new operating mode for the\n>> eMMC clocks that needs to be enabled in both the clock and the MMC\n>> controller.\n>>\n>> Details about that mode are sparse, and the name itself (new mode vs old\n>> mode) doesn't give much details, but it seems that the it changes the\n>> sampling of the MMC clock. One side effect is also that it divides the\n>> parent clock rate by 2.\n>>\n>> Add support for it through a Kconfig option.\n>>\n>> Signed-off-by: Maxime Ripard \n>\n> Reviewed-by: Jagan Teki \n\nApplied to u-boot-sunxi/master\n\nthanks!","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"sLpZ/ve3\"; dkim-atps=neutral"],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xgz5q27rmz9s7M\n\tfor ;\n\tTue, 29 Aug 2017 03:19:25 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 90143C22581; Mon, 28 Aug 2017 17:19:19 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 07F33C2254E;\n\tMon, 28 Aug 2017 17:19:16 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 6868EC2254E; Mon, 28 Aug 2017 17:19:14 +0000 (UTC)","from mail-lf0-f67.google.com (mail-lf0-f67.google.com\n\t[209.85.215.67])\n\tby lists.denx.de (Postfix) with ESMTPS id D3A79C2252D\n\tfor ; Mon, 28 Aug 2017 17:19:12 +0000 (UTC)","by mail-lf0-f67.google.com with SMTP id g77so744305lfg.4\n\tfor ; Mon, 28 Aug 2017 10:19:12 -0700 (PDT)","by 10.25.222.200 with HTTP; Mon, 28 Aug 2017 10:19:11 -0700 (PDT)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-0.0 required=5.0 tests=FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=tXYVKcqua7qPSVoNPmm7+zSAyng79o2KOcmqs1u9oTo=;\n\tb=sLpZ/ve3t4gFsryBb7SpY8zrh/wiyNEzmnGW9JtorIx04fekafpY9sRqNcmb3KDB3n\n\tnLkkYNTN3z6C8oBdkpUe18KiYypIqEk5XpWFmJ0IzqX7laT4SGl9QZQRGNyZXKgc8YN6\n\tYwWK10kYlaEP9t3cWZ85y6PyZPPXE2jYtnm9WjKp0mP87hdO98OhwDUNL3MjG8T37ZNE\n\tJW9fK2rAYtsZKeLTGi74sV49q810XB6ixNcCLNBFGC9ShJSFJ8HWfLE0J6M8Mu0vE/qZ\n\t/T4q59DvgqRX5rXvTKg++rtCOTFtI/XU1iJfOYbX5yj23iRqoDGs4oy8iEnmiN9/v12V\n\tkBcA==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=tXYVKcqua7qPSVoNPmm7+zSAyng79o2KOcmqs1u9oTo=;\n\tb=YtlFigSMrxfShb9geZyn93aGQ/5Xh6CB8pSYAi7I+uXLEhhngdWGoFYYEZ7L3w+7Cu\n\tZHgyB3JJdnq/EmCtjNlI1QCLBWuJE67XVr8iZeil7WJBH60HY3gnuTGqMD5H0wTK3Spk\n\tcM7e6eLCw56CzJdiVuYd4z9CyrmPOwwXbzmxduQqbYBjOGsAm1orT3wGOIAECYPjZVTn\n\tIFmPKzjSUCoo8SvtQltRqRTWcBvL6gz+KCblZiptKwYJuxa2S9JhDxylPqRjI2rDotqG\n\tBUbb400dRhqnIb5qE9AEForqD9xy0mshjudUHdCWyeR1qWEvoeV2ECyEMfs+6tyOj5Jb\n\tIBEQ==","X-Gm-Message-State":"AHYfb5ifhuBPsav4piADuq+132LJt0wWQVj6JXCBHMzkWgPFjVQ2nnhA\n\tO+5VgYjbsO3n/p3JHeHkpdUcvs1Uhw==","X-Received":"by 10.25.216.211 with SMTP id r80mr619884lfi.32.1503940752337;\n\tMon, 28 Aug 2017 10:19:12 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"","References":"<20170823100342.26148-1-maxime.ripard@free-electrons.com>\n\t","From":"Jagan Teki ","Date":"Mon, 28 Aug 2017 22:49:11 +0530","Message-ID":"","To":"Maxime Ripard ","Cc":"\"u-boot@lists.denx.de\" ,\n\tJagan Teki ","Subject":"Re: [U-Boot] [PATCH v2 1/2] mmc: sunxi: Support new mode","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}}]