[{"id":1759195,"web_url":"http://patchwork.ozlabs.org/comment/1759195/","msgid":"<59A53F27.2010308@rock-chips.com>","list_archive_url":null,"date":"2017-08-29T10:17:11","subject":"Re: [PATCH v7 1/3] dt-bindings: display: Add Document for Rockchip\n\tSoc LVDS","submitter":{"id":64812,"url":"http://patchwork.ozlabs.org/api/people/64812/","name":"Mark yao","email":"mark.yao@rock-chips.com"},"content":"On 2017年08月23日 14:26, Sandy Huang wrote:\n> This patch add Document for Rockchip Soc RK3288 LVDS,\n> This based on the patches from Mark yao and Heiko Stuebner.\n>\n> Signed-off-by: Sandy Huang <hjc@rock-chips.com>\n> Signed-off-by: Mark yao <mark.yao@rock-chips.com>\n> Signed-off-by: Heiko Stuebner <heiko@sntech.de>\n> ---\nLooks good for me:\n\nReviewed-by: Mark Yao <mark.yao@rock-chips.com>\n\n> Changes according to Rob Herring's review.\n>\n>   .../bindings/display/rockchip/rockchip-lvds.txt    | 99 ++++++++++++++++++++++\n>   1 file changed, 99 insertions(+)\n>   create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt\n>\n> diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt\n> new file mode 100644\n> index 0000000..da6939e\n> --- /dev/null\n> +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt\n> @@ -0,0 +1,99 @@\n> +Rockchip RK3288 LVDS interface\n> +================================\n> +\n> +Required properties:\n> +- compatible: matching the soc type, one of\n> +\t- \"rockchip,rk3288-lvds\";\n> +\n> +- reg: physical base address of the controller and length\n> +\tof memory mapped region.\n> +- clocks: must include clock specifiers corresponding to entries in the\n> +\tclock-names property.\n> +- clock-names: must contain \"pclk_lvds\"\n> +\n> +- avdd1v0-supply: regulator phandle for 1.0V analog power\n> +- avdd1v8-supply: regulator phandle for 1.8V analog power\n> +- avdd3v3-supply: regulator phandle for 3.3V analog power\n> +\n> +- rockchip,grf: phandle to the general register files syscon\n> +- rockchip,output: \"rgb\", \"lvds\" or \"duallvds\", This describes the output interface\n> +\n> +Optional properties:\n> +- pinctrl-names: must contain a \"lcdc\" entry.\n> +- pinctrl-0: pin control group to be used for this controller.\n> +\n> +Required nodes:\n> +\n> +The lvds has two video ports as described by\n> +\tDocumentation/devicetree/bindings/media/video-interfaces.txt\n> +Their connections are modeled using the OF graph bindings specified in\n> +\tDocumentation/devicetree/bindings/graph.txt.\n> +\n> +- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl\n> +- video port 1 for either a panel or subsequent encoder\n> +\n> +the lvds panel described by\n> +\tDocumentation/devicetree/bindings/display/panel/simple-panel.txt\n> +\n> +Panel required properties:\n> +- ports for remote LVDS output\n> +\n> +Panel optional properties:\n> +- data-mapping: should be \"vesa-24\",\"jeida-24\" or \"jeida-18\".\n> +This describes decribed by:\n> +\tDocumentation/devicetree/bindings/display/panel/panel-lvds.txt\n> +\n> +Example:\n> +\n> +lvds_panel: lvds-panel {\n> +\tcompatible = \"auo,b101ean01\";\n> +\tenable-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>;\n> +\tdata-mapping = \"jeida-24\";\n> +\n> +\tports {\n> +\t\tpanel_in_lvds: endpoint {\n> +\t\t\tremote-endpoint = <&lvds_out_panel>;\n> +\t\t};\n> +\t};\n> +};\n> +\n> +For Rockchip RK3288:\n> +\n> +\tlvds: lvds@ff96c000 {\n> +\t\tcompatible = \"rockchip,rk3288-lvds\";\n> +\t\trockchip,grf = <&grf>;\n> +\t\treg = <0xff96c000 0x4000>;\n> +\t\tclocks = <&cru PCLK_LVDS_PHY>;\n> +\t\tclock-names = \"pclk_lvds\";\n> +\t\tpinctrl-names = \"lcdc\";\n> +\t\tpinctrl-0 = <&lcdc_ctl>;\n> +\t\tavdd1v0-supply = <&vdd10_lcd>;\n> +\t\tavdd1v8-supply = <&vcc18_lcd>;\n> +\t\tavdd3v3-supply = <&vcca_33>;\n> +\t\trockchip,output = \"rgb\";\n> +\t\tports {\n> +\t\t\t#address-cells = <1>;\n> +\t\t\t#size-cells = <0>;\n> +\n> +\t\t\tlvds_in: port@0 {\n> +\t\t\t\treg = <0>;\n> +\n> +\t\t\t\tlvds_in_vopb: endpoint@0 {\n> +\t\t\t\t\treg = <0>;\n> +\t\t\t\t\tremote-endpoint = <&vopb_out_lvds>;\n> +\t\t\t\t};\n> +\t\t\t\tlvds_in_vopl: endpoint@1 {\n> +\t\t\t\t\treg = <1>;\n> +\t\t\t\t\tremote-endpoint = <&vopl_out_lvds>;\n> +\t\t\t\t};\n> +\t\t\t};\n> +\n> +\t\t\tlvds_out: port@1 {\n> +\t\t\t\treg = <1>;\n> +\n> +\t\t\t\tlvds_out_panel: endpoint {\n> +\t\t\t\t\tremote-endpoint = <&panel_in_lvds>;\n> +\t\t\t\t};\n> +\t\t\t};\n> +\t\t};\n> +\t};","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xhPhT2l9kz9t1t\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tTue, 29 Aug 2017 20:17:26 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751541AbdH2KRY (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tTue, 29 Aug 2017 06:17:24 -0400","from regular1.263xmail.com ([211.150.99.136]:47578 \"EHLO\n\tregular1.263xmail.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751209AbdH2KRX (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Tue, 29 Aug 2017 06:17:23 -0400","from mark.yao?rock-chips.com (unknown [192.168.167.193])\n\tby regular1.263xmail.com (Postfix) with ESMTP id 7B56B8F;\n\tTue, 29 Aug 2017 18:17:17 +0800 (CST)","from [192.168.1.209] (localhost [127.0.0.1])\n\tby smtp.263.net (Postfix) with ESMTPA id BD0173A7;\n\tTue, 29 Aug 2017 18:17:13 +0800 (CST)","from [192.168.1.209] (unknown [103.29.142.67])\n\tby smtp.263.net (Postfix) whith ESMTP id 2237FFW89L;\n\tTue, 29 Aug 2017 18:17:17 +0800 (CST)"],"X-263anti-spam":"KSV:0;","X-MAIL-GRAY":"0","X-MAIL-DELIVERY":"1","X-KSVirus-check":"0","X-ABS-CHECKED":"4","X-RL-SENDER":"mark.yao@rock-chips.com","X-FST-TO":"linux-arm-kernel@lists.infradead.org","X-SENDER-IP":"103.29.142.67","X-LOGIN-NAME":"mark.yao@rock-chips.com","X-UNIQUE-TAG":"<dfe6ff5855fe9f6eceb177696b812c05>","X-ATTACHMENT-NUM":"0","X-SENDER":"yzq@rock-chips.com","X-DNS-TYPE":"0","Subject":"Re: [PATCH v7 1/3] dt-bindings: display: Add Document for Rockchip\n\tSoc LVDS","To":"Sandy Huang <hjc@rock-chips.com>, David Airlie <airlied@linux.ie>,\n\tRob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,\n\tHeiko Stuebner <heiko@sntech.de>","References":"<1503469615-39406-1-git-send-email-hjc@rock-chips.com>\n\t<1503469622-39462-1-git-send-email-hjc@rock-chips.com>","Cc":"devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tdri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, \n\tlinux-arm-kernel@lists.infradead.org","From":"Mark yao <mark.yao@rock-chips.com>","Message-ID":"<59A53F27.2010308@rock-chips.com>","Date":"Tue, 29 Aug 2017 18:17:11 +0800","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101\n\tThunderbird/38.3.0","MIME-Version":"1.0","In-Reply-To":"<1503469622-39462-1-git-send-email-hjc@rock-chips.com>","Content-Type":"text/plain; charset=utf-8; format=flowed","Content-Transfer-Encoding":"8bit","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1759200,"web_url":"http://patchwork.ozlabs.org/comment/1759200/","msgid":"<150421032.ptNih2SRiG@phil>","list_archive_url":null,"date":"2017-08-29T10:29:53","subject":"Re: [PATCH v7 1/3] dt-bindings: display: Add Document for Rockchip\n\tSoc LVDS","submitter":{"id":10645,"url":"http://patchwork.ozlabs.org/api/people/10645/","name":"Heiko Stuebner","email":"heiko@sntech.de"},"content":"Am Dienstag, 29. August 2017, 18:17:11 CEST schrieb Mark yao:\n> On 2017年08月23日 14:26, Sandy Huang wrote:\n> > This patch add Document for Rockchip Soc RK3288 LVDS,\n> > This based on the patches from Mark yao and Heiko Stuebner.\n> >\n> > Signed-off-by: Sandy Huang <hjc@rock-chips.com>\n> > Signed-off-by: Mark yao <mark.yao@rock-chips.com>\n> > Signed-off-by: Heiko Stuebner <heiko@sntech.de>\n> > ---\n> Looks good for me:\n> \n> Reviewed-by: Mark Yao <mark.yao@rock-chips.com>\n\nSigned-off ordering is wrong though ... you add a Signed-off below\nall others and you could also drop the one from me, as I don't\nthink I did provide to much value between Mark's and Sandy's variant\nof the patches :-)\n\n\nHeiko\n\n\n> > Changes according to Rob Herring's review.\n> >\n> >   .../bindings/display/rockchip/rockchip-lvds.txt    | 99 ++++++++++++++++++++++\n> >   1 file changed, 99 insertions(+)\n> >   create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt\n> >\n> > diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt\n> > new file mode 100644\n> > index 0000000..da6939e\n> > --- /dev/null\n> > +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt\n> > @@ -0,0 +1,99 @@\n> > +Rockchip RK3288 LVDS interface\n> > +================================\n> > +\n> > +Required properties:\n> > +- compatible: matching the soc type, one of\n> > +\t- \"rockchip,rk3288-lvds\";\n> > +\n> > +- reg: physical base address of the controller and length\n> > +\tof memory mapped region.\n> > +- clocks: must include clock specifiers corresponding to entries in the\n> > +\tclock-names property.\n> > +- clock-names: must contain \"pclk_lvds\"\n> > +\n> > +- avdd1v0-supply: regulator phandle for 1.0V analog power\n> > +- avdd1v8-supply: regulator phandle for 1.8V analog power\n> > +- avdd3v3-supply: regulator phandle for 3.3V analog power\n> > +\n> > +- rockchip,grf: phandle to the general register files syscon\n> > +- rockchip,output: \"rgb\", \"lvds\" or \"duallvds\", This describes the output interface\n> > +\n> > +Optional properties:\n> > +- pinctrl-names: must contain a \"lcdc\" entry.\n> > +- pinctrl-0: pin control group to be used for this controller.\n> > +\n> > +Required nodes:\n> > +\n> > +The lvds has two video ports as described by\n> > +\tDocumentation/devicetree/bindings/media/video-interfaces.txt\n> > +Their connections are modeled using the OF graph bindings specified in\n> > +\tDocumentation/devicetree/bindings/graph.txt.\n> > +\n> > +- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl\n> > +- video port 1 for either a panel or subsequent encoder\n> > +\n> > +the lvds panel described by\n> > +\tDocumentation/devicetree/bindings/display/panel/simple-panel.txt\n> > +\n> > +Panel required properties:\n> > +- ports for remote LVDS output\n> > +\n> > +Panel optional properties:\n> > +- data-mapping: should be \"vesa-24\",\"jeida-24\" or \"jeida-18\".\n> > +This describes decribed by:\n> > +\tDocumentation/devicetree/bindings/display/panel/panel-lvds.txt\n> > +\n> > +Example:\n> > +\n> > +lvds_panel: lvds-panel {\n> > +\tcompatible = \"auo,b101ean01\";\n> > +\tenable-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>;\n> > +\tdata-mapping = \"jeida-24\";\n> > +\n> > +\tports {\n> > +\t\tpanel_in_lvds: endpoint {\n> > +\t\t\tremote-endpoint = <&lvds_out_panel>;\n> > +\t\t};\n> > +\t};\n> > +};\n> > +\n> > +For Rockchip RK3288:\n> > +\n> > +\tlvds: lvds@ff96c000 {\n> > +\t\tcompatible = \"rockchip,rk3288-lvds\";\n> > +\t\trockchip,grf = <&grf>;\n> > +\t\treg = <0xff96c000 0x4000>;\n> > +\t\tclocks = <&cru PCLK_LVDS_PHY>;\n> > +\t\tclock-names = \"pclk_lvds\";\n> > +\t\tpinctrl-names = \"lcdc\";\n> > +\t\tpinctrl-0 = <&lcdc_ctl>;\n> > +\t\tavdd1v0-supply = <&vdd10_lcd>;\n> > +\t\tavdd1v8-supply = <&vcc18_lcd>;\n> > +\t\tavdd3v3-supply = <&vcca_33>;\n> > +\t\trockchip,output = \"rgb\";\n> > +\t\tports {\n> > +\t\t\t#address-cells = <1>;\n> > +\t\t\t#size-cells = <0>;\n> > +\n> > +\t\t\tlvds_in: port@0 {\n> > +\t\t\t\treg = <0>;\n> > +\n> > +\t\t\t\tlvds_in_vopb: endpoint@0 {\n> > +\t\t\t\t\treg = <0>;\n> > +\t\t\t\t\tremote-endpoint = <&vopb_out_lvds>;\n> > +\t\t\t\t};\n> > +\t\t\t\tlvds_in_vopl: endpoint@1 {\n> > +\t\t\t\t\treg = <1>;\n> > +\t\t\t\t\tremote-endpoint = <&vopl_out_lvds>;\n> > +\t\t\t\t};\n> > +\t\t\t};\n> > +\n> > +\t\t\tlvds_out: port@1 {\n> > +\t\t\t\treg = <1>;\n> > +\n> > +\t\t\t\tlvds_out_panel: endpoint {\n> > +\t\t\t\t\tremote-endpoint = <&panel_in_lvds>;\n> > +\t\t\t\t};\n> > +\t\t\t};\n> > +\t\t};\n> > +\t};\n> \n> \n> \n\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xhPz13txVz9t2Q\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tTue, 29 Aug 2017 20:30:05 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751373AbdH2KaD convert rfc822-to-8bit (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tTue, 29 Aug 2017 06:30:03 -0400","from gloria.sntech.de ([95.129.55.99]:36848 \"EHLO gloria.sntech.de\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751324AbdH2KaD (ORCPT <rfc822;devicetree@vger.kernel.org>);\n\tTue, 29 Aug 2017 06:30:03 -0400","from ip9234ad97.dynamic.kabel-deutschland.de ([146.52.173.151]\n\thelo=phil.localnet) by gloria.sntech.de with esmtpsa\n\t(TLS1.1:DHE_RSA_AES_256_CBC_SHA1:256)\n\t(Exim 4.80) (envelope-from <heiko@sntech.de>)\n\tid 1dmdmM-0006y3-8V; Tue, 29 Aug 2017 12:29:54 +0200"],"From":"Heiko Stuebner <heiko@sntech.de>","To":"Mark yao <mark.yao@rock-chips.com>","Cc":"Sandy Huang <hjc@rock-chips.com>, David Airlie <airlied@linux.ie>,\n\tRob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,\n\tdevicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tdri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, \n\tlinux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH v7 1/3] dt-bindings: display: Add Document for Rockchip\n\tSoc LVDS","Date":"Tue, 29 Aug 2017 12:29:53 +0200","Message-ID":"<150421032.ptNih2SRiG@phil>","User-Agent":"KMail/5.2.3 (Linux/4.11.0-1-amd64; KDE/5.28.0; x86_64; ; )","In-Reply-To":"<59A53F27.2010308@rock-chips.com>","References":"<1503469615-39406-1-git-send-email-hjc@rock-chips.com>\n\t<1503469622-39462-1-git-send-email-hjc@rock-chips.com>\n\t<59A53F27.2010308@rock-chips.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8BIT","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1759559,"web_url":"http://patchwork.ozlabs.org/comment/1759559/","msgid":"<20170829171706.lnb4ugm2olbz7ajj@rob-hp-laptop>","list_archive_url":null,"date":"2017-08-29T17:17:06","subject":"Re: [PATCH v7 1/3] dt-bindings: display: Add Document for Rockchip\n\tSoc LVDS","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring","email":"robh@kernel.org"},"content":"On Wed, Aug 23, 2017 at 02:26:59PM +0800, Sandy Huang wrote:\n> This patch add Document for Rockchip Soc RK3288 LVDS,\n> This based on the patches from Mark yao and Heiko Stuebner.\n> \n> Signed-off-by: Sandy Huang <hjc@rock-chips.com>\n> Signed-off-by: Mark yao <mark.yao@rock-chips.com>\n> Signed-off-by: Heiko Stuebner <heiko@sntech.de>\n> ---\n> \n> Changes according to Rob Herring's review.    \n> \n>  .../bindings/display/rockchip/rockchip-lvds.txt    | 99 ++++++++++++++++++++++\n>  1 file changed, 99 insertions(+)\n>  create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt\n\nReviewed-by: Rob Herring <robh@kernel.org>\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) 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2017 10:17:08 -0700 (PDT)","Date":"Tue, 29 Aug 2017 12:17:06 -0500","From":"Rob Herring <robh@kernel.org>","To":"Sandy Huang <hjc@rock-chips.com>","Cc":"Mark Yao <mark.yao@rock-chips.com>, David Airlie <airlied@linux.ie>,\n\tMark Rutland <mark.rutland@arm.com>, Heiko Stuebner <heiko@sntech.de>,\n\tdri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org","Subject":"Re: [PATCH v7 1/3] dt-bindings: display: Add Document for Rockchip\n\tSoc LVDS","Message-ID":"<20170829171706.lnb4ugm2olbz7ajj@rob-hp-laptop>","References":"<1503469615-39406-1-git-send-email-hjc@rock-chips.com>\n\t<1503469622-39462-1-git-send-email-hjc@rock-chips.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<1503469622-39462-1-git-send-email-hjc@rock-chips.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1761486,"web_url":"http://patchwork.ozlabs.org/comment/1761486/","msgid":"<8578950f-74a9-6fa7-5530-70f4b41a5a8f@rock-chips.com>","list_archive_url":null,"date":"2017-09-01T06:49:16","subject":"Re: [PATCH v7 1/3] dt-bindings: display: Add Document for Rockchip\n\tSoc LVDS","submitter":{"id":72133,"url":"http://patchwork.ozlabs.org/api/people/72133/","name":"Huang Jiachai","email":"hjc@rock-chips.com"},"content":"Hi heiko,\n\n在 2017/8/29 18:29, Heiko Stuebner 写道:\n> Am Dienstag, 29. August 2017, 18:17:11 CEST schrieb Mark yao:\n>> On 2017年08月23日 14:26, Sandy Huang wrote:\n>>> This patch add Document for Rockchip Soc RK3288 LVDS,\n>>> This based on the patches from Mark yao and Heiko Stuebner.\n>>>\n>>> Signed-off-by: Sandy Huang <hjc@rock-chips.com>\n>>> Signed-off-by: Mark yao <mark.yao@rock-chips.com>\n>>> Signed-off-by: Heiko Stuebner <heiko@sntech.de>\n>>> ---\n>> Looks good for me:\n>>\n>> Reviewed-by: Mark Yao <mark.yao@rock-chips.com>\n> \n> Signed-off ordering is wrong though ... you add a Signed-off below\n> all others and you could also drop the one from me, as I don't\n> think I did provide to much value between Mark's and Sandy's variant\n> of the patches :-)\n> \n> \n> Heiko\n> \n> \nI will change the Singed off order as bellow at next version.\n\nSigned-off-by: Mark yao <mark.yao@rock-chips.com>\nSigned-off-by: Heiko Stuebner <heiko@sntech.de>\nSigned-off-by: Sandy Huang <hjc@rock-chips.com>\n\n>>> Changes according to Rob Herring's review.\n>>>\n>>>    .../bindings/display/rockchip/rockchip-lvds.txt    | 99 ++++++++++++++++++++++\n>>>    1 file changed, 99 insertions(+)\n>>>    create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt\n>>>\n>>> diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt\n>>> new file mode 100644\n>>> index 0000000..da6939e\n>>> --- /dev/null\n>>> +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt\n>>> @@ -0,0 +1,99 @@\n>>> +Rockchip RK3288 LVDS interface\n>>> +================================\n>>> +\n>>> +Required properties:\n>>> +- compatible: matching the soc type, one of\n>>> +\t- \"rockchip,rk3288-lvds\";\n>>> +\n>>> +- reg: physical base address of the controller and length\n>>> +\tof memory mapped region.\n>>> +- clocks: must include clock specifiers corresponding to entries in the\n>>> +\tclock-names property.\n>>> +- clock-names: must contain \"pclk_lvds\"\n>>> +\n>>> +- avdd1v0-supply: regulator phandle for 1.0V analog power\n>>> +- avdd1v8-supply: regulator phandle for 1.8V analog power\n>>> +- avdd3v3-supply: regulator phandle for 3.3V analog power\n>>> +\n>>> +- rockchip,grf: phandle to the general register files syscon\n>>> +- rockchip,output: \"rgb\", \"lvds\" or \"duallvds\", This describes the output interface\n>>> +\n>>> +Optional properties:\n>>> +- pinctrl-names: must contain a \"lcdc\" entry.\n>>> +- pinctrl-0: pin control group to be used for this controller.\n>>> +\n>>> +Required nodes:\n>>> +\n>>> +The lvds has two video ports as described by\n>>> +\tDocumentation/devicetree/bindings/media/video-interfaces.txt\n>>> +Their connections are modeled using the OF graph bindings specified in\n>>> +\tDocumentation/devicetree/bindings/graph.txt.\n>>> +\n>>> +- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl\n>>> +- video port 1 for either a panel or subsequent encoder\n>>> +\n>>> +the lvds panel described by\n>>> +\tDocumentation/devicetree/bindings/display/panel/simple-panel.txt\n>>> +\n>>> +Panel required properties:\n>>> +- ports for remote LVDS output\n>>> +\n>>> +Panel optional properties:\n>>> +- data-mapping: should be \"vesa-24\",\"jeida-24\" or \"jeida-18\".\n>>> +This describes decribed by:\n>>> +\tDocumentation/devicetree/bindings/display/panel/panel-lvds.txt\n>>> +\n>>> +Example:\n>>> +\n>>> +lvds_panel: lvds-panel {\n>>> +\tcompatible = \"auo,b101ean01\";\n>>> +\tenable-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>;\n>>> +\tdata-mapping = \"jeida-24\";\n>>> +\n>>> +\tports {\n>>> +\t\tpanel_in_lvds: endpoint {\n>>> +\t\t\tremote-endpoint = <&lvds_out_panel>;\n>>> +\t\t};\n>>> +\t};\n>>> +};\n>>> +\n>>> +For Rockchip RK3288:\n>>> +\n>>> +\tlvds: lvds@ff96c000 {\n>>> +\t\tcompatible = \"rockchip,rk3288-lvds\";\n>>> +\t\trockchip,grf = <&grf>;\n>>> +\t\treg = <0xff96c000 0x4000>;\n>>> +\t\tclocks = <&cru PCLK_LVDS_PHY>;\n>>> +\t\tclock-names = \"pclk_lvds\";\n>>> +\t\tpinctrl-names = \"lcdc\";\n>>> +\t\tpinctrl-0 = <&lcdc_ctl>;\n>>> +\t\tavdd1v0-supply = <&vdd10_lcd>;\n>>> +\t\tavdd1v8-supply = <&vcc18_lcd>;\n>>> +\t\tavdd3v3-supply = <&vcca_33>;\n>>> +\t\trockchip,output = \"rgb\";\n>>> +\t\tports {\n>>> +\t\t\t#address-cells = <1>;\n>>> +\t\t\t#size-cells = <0>;\n>>> +\n>>> +\t\t\tlvds_in: port@0 {\n>>> +\t\t\t\treg = <0>;\n>>> +\n>>> +\t\t\t\tlvds_in_vopb: endpoint@0 {\n>>> +\t\t\t\t\treg = <0>;\n>>> +\t\t\t\t\tremote-endpoint = <&vopb_out_lvds>;\n>>> +\t\t\t\t};\n>>> +\t\t\t\tlvds_in_vopl: endpoint@1 {\n>>> +\t\t\t\t\treg = <1>;\n>>> +\t\t\t\t\tremote-endpoint = <&vopl_out_lvds>;\n>>> +\t\t\t\t};\n>>> +\t\t\t};\n>>> +\n>>> +\t\t\tlvds_out: port@1 {\n>>> +\t\t\t\treg = <1>;\n>>> +\n>>> +\t\t\t\tlvds_out_panel: endpoint {\n>>> +\t\t\t\t\tremote-endpoint = <&panel_in_lvds>;\n>>> +\t\t\t\t};\n>>> +\t\t\t};\n>>> +\t\t};\n>>> +\t};\n>>\n>>\n>>\n> \n> \n> \n> _______________________________________________\n> Linux-rockchip mailing list\n> Linux-rockchip@lists.infradead.org\n> http://lists.infradead.org/mailman/listinfo/linux-rockchip\n> \n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xk8xB2rYrz9sMN\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tFri,  1 Sep 2017 16:49:34 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751040AbdIAGtc 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(CST)"],"X-263anti-spam":"KSV:0;","X-MAIL-GRAY":"0","X-MAIL-DELIVERY":"1","X-KSVirus-check":"0","X-ABS-CHECKED":"4","X-RL-SENDER":"hjc@rock-chips.com","X-FST-TO":"sandy.huang@rock-chips.com","X-SENDER-IP":"58.22.7.114","X-LOGIN-NAME":"hjc@rock-chips.com","X-UNIQUE-TAG":"<15eea474108034e1ba68f16b8aed1b7f>","X-ATTACHMENT-NUM":"0","X-SENDER":"hjc@rock-chips.com","X-DNS-TYPE":"0","Subject":"Re: [PATCH v7 1/3] dt-bindings: display: Add Document for Rockchip\n\tSoc LVDS","To":"Heiko Stuebner <heiko@sntech.de>, Mark yao <mark.yao@rock-chips.com>","Cc":"Mark Rutland <mark.rutland@arm.com>, devicetree@vger.kernel.org,\n\tDavid Airlie <airlied@linux.ie>,\n\tdri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,\n\tlinux-rockchip@lists.infradead.org, Rob Herring <robh+dt@kernel.org>, \n\tlinux-arm-kernel@lists.infradead.org","References":"<1503469615-39406-1-git-send-email-hjc@rock-chips.com>\n\t<1503469622-39462-1-git-send-email-hjc@rock-chips.com>\n\t<59A53F27.2010308@rock-chips.com> <150421032.ptNih2SRiG@phil>","From":"Sandy Huang <hjc@rock-chips.com>","Message-ID":"<8578950f-74a9-6fa7-5530-70f4b41a5a8f@rock-chips.com>","Date":"Fri, 1 Sep 2017 14:49:16 +0800","User-Agent":"Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<150421032.ptNih2SRiG@phil>","Content-Type":"text/plain; charset=utf-8; format=flowed","Content-Transfer-Encoding":"8bit","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}}]