[{"id":1756542,"web_url":"http://patchwork.ozlabs.org/comment/1756542/","msgid":"<20170824163323.GG31858@bhelgaas-glaptop.roam.corp.google.com>","list_archive_url":null,"date":"2017-08-24T16:33:23","subject":"Re: [PATCH] PCI: rockchip: Use gpiod_set_value_cansleep() to allow\n\treset via expanders","submitter":{"id":67298,"url":"http://patchwork.ozlabs.org/api/people/67298/","name":"Bjorn Helgaas","email":"helgaas@kernel.org"},"content":"On Sat, Aug 19, 2017 at 09:07:14PM -0300, Fabio Estevam wrote:\n> The reset GPIO can be connected to a I2C or SPI IO expander, which may\n> sleep, so it is safer to use the gpiod_set_value_cansleep() variant\n> instead.\n> \n> Signed-off-by: Fabio Estevam \n\nWaiting for Shawn's ack...\n\n> ---\n> drivers/pci/host/pcie-rockchip.c | 4 ++--\n> 1 file changed, 2 insertions(+), 2 deletions(-)\n> \n> diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c\n> index 2eccd53..124b280 100644\n> --- a/drivers/pci/host/pcie-rockchip.c\n> +++ b/drivers/pci/host/pcie-rockchip.c\n> @@ -537,7 +537,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)\n> \tint err, i;\n> \tu32 status;\n> \n> -\tgpiod_set_value(rockchip->ep_gpio, 0);\n> +\tgpiod_set_value_cansleep(rockchip->ep_gpio, 0);\n> \n> \terr = reset_control_assert(rockchip->aclk_rst);\n> \tif (err) {\n> @@ -682,7 +682,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)\n> \trockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,\n> \t\t\t PCIE_CLIENT_CONFIG);\n> \n> -\tgpiod_set_value(rockchip->ep_gpio, 1);\n> +\tgpiod_set_value_cansleep(rockchip->ep_gpio, 1);\n> \n> \t/* 500ms timeout value should be enough for Gen1/2 training */\n> \terr = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1,\n> -- \n> 2.7.4\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=)","mail.kernel.org;\n\tdmarc=none (p=none dis=none) header.from=kernel.org","mail.kernel.org;\n\tspf=none smtp.mailfrom=helgaas@kernel.org"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xdVGb5YCVz9sCZ\n\tfor ;\n\tFri, 25 Aug 2017 02:33:27 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751317AbdHXQd0 (ORCPT );\n\tThu, 24 Aug 2017 12:33:26 -0400","from mail.kernel.org ([198.145.29.99]:46846 \"EHLO mail.kernel.org\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751197AbdHXQd0 (ORCPT );\n\tThu, 24 Aug 2017 12:33:26 -0400","from localhost (unknown [69.55.156.165])\n\t(using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits))\n\t(No client certificate requested)\n\tby mail.kernel.org (Postfix) with ESMTPSA id CD0AC21A29;\n\tThu, 24 Aug 2017 16:33:25 +0000 (UTC)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mail.kernel.org CD0AC21A29","Date":"Thu, 24 Aug 2017 11:33:23 -0500","From":"Bjorn Helgaas ","To":"Fabio Estevam ","Cc":"bhelgaas@google.com, heiko@sntech.de, linux-pci@vger.kernel.org","Subject":"Re: [PATCH] PCI: rockchip: Use gpiod_set_value_cansleep() to allow\n\treset via expanders","Message-ID":"<20170824163323.GG31858@bhelgaas-glaptop.roam.corp.google.com>","References":"<1503187634-3823-1-git-send-email-festevam@gmail.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<1503187634-3823-1-git-send-email-festevam@gmail.com>","User-Agent":"Mutt/1.5.21 (2010-09-15)","Sender":"linux-pci-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-pci@vger.kernel.org"}},{"id":1756550,"web_url":"http://patchwork.ozlabs.org/comment/1756550/","msgid":"<1690109.dqujpfY2W8@phil>","list_archive_url":null,"date":"2017-08-24T16:37:02","subject":"Re: [PATCH] PCI: rockchip: Use gpiod_set_value_cansleep() to allow\n\treset via expanders","submitter":{"id":10645,"url":"http://patchwork.ozlabs.org/api/people/10645/","name":"Heiko Stuebner","email":"heiko@sntech.de"},"content":"Am Donnerstag, 24. August 2017, 11:33:23 CEST schrieb Bjorn Helgaas:\n> On Sat, Aug 19, 2017 at 09:07:14PM -0300, Fabio Estevam wrote:\n> > The reset GPIO can be connected to a I2C or SPI IO expander, which may\n> > sleep, so it is safer to use the gpiod_set_value_cansleep() variant\n> > instead.\n> > \n> > Signed-off-by: Fabio Estevam \n> \n> Waiting for Shawn's ack...\n\nwe might want to include him then, as I'm not sure if he patrols the\nlinux-pci list :-) . [I've added him]\n\n\n> \n> > ---\n> > drivers/pci/host/pcie-rockchip.c | 4 ++--\n> > 1 file changed, 2 insertions(+), 2 deletions(-)\n> > \n> > diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c\n> > index 2eccd53..124b280 100644\n> > --- a/drivers/pci/host/pcie-rockchip.c\n> > +++ b/drivers/pci/host/pcie-rockchip.c\n> > @@ -537,7 +537,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)\n> > \tint err, i;\n> > \tu32 status;\n> > \n> > -\tgpiod_set_value(rockchip->ep_gpio, 0);\n> > +\tgpiod_set_value_cansleep(rockchip->ep_gpio, 0);\n> > \n> > \terr = reset_control_assert(rockchip->aclk_rst);\n> > \tif (err) {\n> > @@ -682,7 +682,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)\n> > \trockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,\n> > \t\t\t PCIE_CLIENT_CONFIG);\n> > \n> > -\tgpiod_set_value(rockchip->ep_gpio, 1);\n> > +\tgpiod_set_value_cansleep(rockchip->ep_gpio, 1);\n> > \n> > \t/* 500ms timeout value should be enough for Gen1/2 training */\n> > \terr = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1,\n> \n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xdVLx39RSz9sCZ\n\tfor ;\n\tFri, 25 Aug 2017 02:37:13 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753338AbdHXQhL (ORCPT );\n\tThu, 24 Aug 2017 12:37:11 -0400","from gloria.sntech.de ([95.129.55.99]:55180 \"EHLO gloria.sntech.de\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1753949AbdHXQhK (ORCPT );\n\tThu, 24 Aug 2017 12:37:10 -0400","from p5b127ee6.dip0.t-ipconnect.de ([91.18.126.230]\n\thelo=phil.localnet) by gloria.sntech.de with esmtpsa\n\t(TLS1.1:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80)\n\t(envelope-from )\n\tid 1dkv7v-00035H-2F; Thu, 24 Aug 2017 18:37:03 +0200"],"From":"Heiko Stuebner ","To":"Bjorn Helgaas , Shawn Lin ","Cc":"Fabio Estevam , bhelgaas@google.com,\n\tlinux-pci@vger.kernel.org","Subject":"Re: [PATCH] PCI: rockchip: Use gpiod_set_value_cansleep() to allow\n\treset via expanders","Date":"Thu, 24 Aug 2017 18:37:02 +0200","Message-ID":"<1690109.dqujpfY2W8@phil>","User-Agent":"KMail/5.2.3 (Linux/4.11.0-1-amd64; KDE/5.28.0; x86_64; ; )","In-Reply-To":"<20170824163323.GG31858@bhelgaas-glaptop.roam.corp.google.com>","References":"<1503187634-3823-1-git-send-email-festevam@gmail.com>\n\t<20170824163323.GG31858@bhelgaas-glaptop.roam.corp.google.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"7Bit","Content-Type":"text/plain; charset=\"us-ascii\"","Sender":"linux-pci-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-pci@vger.kernel.org"}},{"id":1758328,"web_url":"http://patchwork.ozlabs.org/comment/1758328/","msgid":"","list_archive_url":null,"date":"2017-08-28T00:27:15","subject":"Re: [PATCH] PCI: rockchip: Use gpiod_set_value_cansleep() to allow\n\treset via expanders","submitter":{"id":6978,"url":"http://patchwork.ozlabs.org/api/people/6978/","name":"Fabio Estevam","email":"festevam@gmail.com"},"content":"On Thu, Aug 24, 2017 at 1:37 PM, Heiko Stuebner wrote:\n\n>> Waiting for Shawn's ack...\n>\n> we might want to include him then, as I'm not sure if he patrols the\n> linux-pci list :-) . [I've added him]\n\nSorry, I missed to add Shawn on Cc. I have just resent the patch with him on Cc.\n\nThanks","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"PpicGGHe\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xgXdy4Rzrz9rvt\n\tfor ;\n\tMon, 28 Aug 2017 10:27:18 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751552AbdH1A1R (ORCPT );\n\tSun, 27 Aug 2017 20:27:17 -0400","from mail-oi0-f47.google.com ([209.85.218.47]:34576 \"EHLO\n\tmail-oi0-f47.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751507AbdH1A1R (ORCPT\n\t); Sun, 27 Aug 2017 20:27:17 -0400","by mail-oi0-f47.google.com with SMTP id g127so19606075oic.1\n\tfor ; Sun, 27 Aug 2017 17:27:16 -0700 (PDT)","by 10.157.17.252 with HTTP; Sun, 27 Aug 2017 17:27:15 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=NqJ6XGSAP9+ffs/IL1iQWNH3z86AwSo5aqi8lcaZfQA=;\n\tb=PpicGGHer6f8eTcum8QwhqDu9OOKCpV6CLGv9Fvn5GJ7hRGHJEJNYxg4dfecRldJ8C\n\tgzv14c+PKzcEPaNuAKph9V+l2MxvP/94uU9MGTLxHne4/1kkR2HlgeSpsNSGrqcIw+sx\n\twpnxm3fCk0xF7mDh/SZB/Uvlpe8bz+pP6+TUo5jxMmTyvGfAS7xmA3gxD12MbRbOXg81\n\tpHU0qyZP1SQ4LyixZpMQQndgiNPWumopmkHqElIh+NdTtp9wm+V+2HBKC1Vp7B9F4FcI\n\tSkdAG4gK4kJOAHwDWSLRUpMcF+u0PloEY3EbBAB/cDq8e3Tr+B0iu1mnEWG5wcy8bTS3\n\t5KHg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=NqJ6XGSAP9+ffs/IL1iQWNH3z86AwSo5aqi8lcaZfQA=;\n\tb=Gxb1wLqaPIrQuTX6iFyT83wWAX6+u5qQrcqU+vKKnUO6FYNo62u6d+ngPIb94IUhaL\n\tcBz+ahutT3D/2R6iLMQUpRtkEo7DJ/53ywZCOlTKVhaxDrIENv2WjAQJymQw08zfvMOj\n\t6aHauEVI/Joy0AylVN7in/78Lb8fNiFfzf6VgL79YLTqDgQed24jjR4dH/PBue3obF3j\n\ttzjjDBkZQl7umr1vWrWGx9h+a2f1+unUQNN8QCIqT3rbFpssM6EDv5iU5jex1FBwXGf/\n\tTYbG6lB3dmjg+y6X0yui6QVeuWl/wrUdBSr6POBemJV9iGqW3VOJvC6KgurzyxwqWWvG\n\tqtgw==","X-Gm-Message-State":"AHYfb5ho9Xjnom7YBfH+gabgwTE0FsuN7ofAT23KgIm2Rp0Mjm3cJm6A\n\tLtvLCHL0+qtY2RtluloqI4xWHokn+Q==","X-Received":"by 10.202.195.213 with SMTP id\n\tt204mr5668024oif.253.1503880036322; \n\tSun, 27 Aug 2017 17:27:16 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1690109.dqujpfY2W8@phil>","References":"<1503187634-3823-1-git-send-email-festevam@gmail.com>\n\t<20170824163323.GG31858@bhelgaas-glaptop.roam.corp.google.com>\n\t<1690109.dqujpfY2W8@phil>","From":"Fabio Estevam ","Date":"Sun, 27 Aug 2017 21:27:15 -0300","Message-ID":"","Subject":"Re: [PATCH] PCI: rockchip: Use gpiod_set_value_cansleep() to allow\n\treset via expanders","To":"Heiko Stuebner ","Cc":"Bjorn Helgaas , Shawn Lin ,\n\tBjorn Helgaas ,\n\t\"linux-pci@vger.kernel.org\" ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"linux-pci-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-pci@vger.kernel.org"}},{"id":1758331,"web_url":"http://patchwork.ozlabs.org/comment/1758331/","msgid":"","list_archive_url":null,"date":"2017-08-28T00:46:29","subject":"Re: [PATCH] PCI: rockchip: Use gpiod_set_value_cansleep() to allow\n\treset via expanders","submitter":{"id":66993,"url":"http://patchwork.ozlabs.org/api/people/66993/","name":"Shawn Lin","email":"shawn.lin@rock-chips.com"},"content":"On 2017/8/28 8:27, Fabio Estevam wrote:\n> On Thu, Aug 24, 2017 at 1:37 PM, Heiko Stuebner wrote:\n> \n>>> Waiting for Shawn's ack...\n>>\n>> we might want to include him then, as I'm not sure if he patrols the\n>> linux-pci list :-) . [I've added him]\n\nAha, I also patrol linux-rockchip for pcie-rockchip, but this patch\ndidn't include it either.\n\n> \n> Sorry, I missed to add Shawn on Cc. I have just resent the patch with him on Cc.\n> \n\nDon't worry. I will check it out ASAP.\n\n> Thanks\n> \n> \n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xgY463SNPz9s7v\n\tfor ;\n\tMon, 28 Aug 2017 10:46:30 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751507AbdH1Aq3 (ORCPT );\n\tSun, 27 Aug 2017 20:46:29 -0400","from lucky1.263xmail.com ([211.157.147.133]:46936 \"EHLO\n\tlucky1.263xmail.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751496AbdH1Aq2 (ORCPT\n\t); Sun, 27 Aug 2017 20:46:28 -0400","from shawn.lin?rock-chips.com (unknown [192.168.167.239])\n\tby lucky1.263xmail.com (Postfix) with ESMTP id E9BCC8F2D9;\n\tMon, 28 Aug 2017 08:46:24 +0800 (CST)","from [172.16.12.30] (localhost [127.0.0.1])\n\tby smtp.263.net (Postfix) with ESMTPA id F188F398;\n\tMon, 28 Aug 2017 08:46:23 +0800 (CST)","from [172.16.12.30] (unknown [58.22.7.114])\n\tby smtp.263.net (Postfix) whith ESMTP id 10372EKWBZE;\n\tMon, 28 Aug 2017 08:46:24 +0800 (CST)"],"X-263anti-spam":"KSV:0;","X-MAIL-GRAY":"1","X-MAIL-DELIVERY":"0","X-KSVirus-check":"0","X-ABS-CHECKED":"4","X-RL-SENDER":"shawn.lin@rock-chips.com","X-FST-TO":"linux-pci@vger.kernel.org","X-SENDER-IP":"58.22.7.114","X-LOGIN-NAME":"shawn.lin@rock-chips.com","X-UNIQUE-TAG":"","X-ATTACHMENT-NUM":"0","X-SENDER":"lintao@rock-chips.com","X-DNS-TYPE":"0","Cc":"shawn.lin@rock-chips.com, Bjorn Helgaas ,\n\t\"linux-pci@vger.kernel.org\" ","Subject":"Re: [PATCH] PCI: rockchip: Use gpiod_set_value_cansleep() to allow\n\treset via expanders","To":"Fabio Estevam , Heiko Stuebner ","References":"<1503187634-3823-1-git-send-email-festevam@gmail.com>\n\t<20170824163323.GG31858@bhelgaas-glaptop.roam.corp.google.com>\n\t<1690109.dqujpfY2W8@phil>\n\t","From":"Shawn Lin ","Message-ID":"","Date":"Mon, 28 Aug 2017 08:46:29 +0800","User-Agent":"Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"","Content-Type":"text/plain; charset=utf-8; format=flowed","Content-Transfer-Encoding":"7bit","Sender":"linux-pci-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-pci@vger.kernel.org"}}]