[{"id":1751007,"web_url":"http://patchwork.ozlabs.org/comment/1751007/","msgid":"<621d4044-5326-a294-8aa8-ea68affbd7b1@linux.vnet.ibm.com>","list_archive_url":null,"date":"2017-08-18T12:56:08","subject":"Re: [PATCH 2/2] kvm/xive: Add missing barriers and document them","submitter":{"id":67066,"url":"http://patchwork.ozlabs.org/api/people/67066/","name":"Guilherme G. Piccoli","email":"gpiccoli@linux.vnet.ibm.com"},"content":"On 08/17/2017 11:10 PM, Benjamin Herrenschmidt wrote:\n> This adds missing memory barriers to order updates/tests of\n> the virtual CPPR and MFRR, thus fixing a lost IPI problem.\n> \n> While at it also document all barriers in this file\n> \n> This fixes a bug causing guest IPIs to occasionally get lost.\n> \n> Signed-off-by: Benjamin Herrenschmidt \n\nThanks Ben. Shouldn't this be marked to stable (v4.12+)?\nAlso, if a Fixes tag is required:\n\nFixes: 5af50993850a (\"KVM: PPC: Book3S HV: Native usage of the XIVE\ninterrupt controller\").\n\nFeel free to add my:\nTested-by: Guilherme G. Piccoli \n\nCheers,\n\n\nGuilherme\n\n> ---\n> arch/powerpc/kvm/book3s_xive_template.c | 57 +++++++++++++++++++++++++++++++--\n> 1 file changed, 55 insertions(+), 2 deletions(-)\n> \n> diff --git a/arch/powerpc/kvm/book3s_xive_template.c b/arch/powerpc/kvm/book3s_xive_template.c\n> index 150be86b1018..d1ed2c41b5d2 100644\n> --- a/arch/powerpc/kvm/book3s_xive_template.c\n> +++ b/arch/powerpc/kvm/book3s_xive_template.c\n> @@ -17,6 +17,12 @@ static void GLUE(X_PFX,ack_pending)(struct kvmppc_xive_vcpu *xc)\n> \tu16 ack;\n> \n> \t/*\n> +\t * Ensure any previous store to CPPR is ordered vs.\n> +\t * the subsequent loads from PIPR or ACK.\n> +\t */\n> +\teieio();\n> +\n> +\t/*\n> \t * DD1 bug workaround: If PIPR is less favored than CPPR\n> \t * ignore the interrupt or we might incorrectly lose an IPB\n> \t * bit.\n> @@ -244,6 +250,11 @@ static u32 GLUE(X_PFX,scan_interrupts)(struct kvmppc_xive_vcpu *xc,\n> \t/*\n> \t * If we found an interrupt, adjust what the guest CPPR should\n> \t * be as if we had just fetched that interrupt from HW.\n> +\t *\n> +\t * Note: This can only make xc->cppr smaller as the previous\n> +\t * loop will only exit with hirq != 0 if prio is lower than\n> +\t * the current xc->cppr. Thus we don't need to re-check xc->mfrr\n> +\t * for pending IPIs.\n> \t */\n> \tif (hirq)\n> \t\txc->cppr = prio;\n> @@ -390,6 +401,12 @@ X_STATIC int GLUE(X_PFX,h_cppr)(struct kvm_vcpu *vcpu, unsigned long cppr)\n> \txc->cppr = cppr;\n> \n> \t/*\n> +\t * Order the above update of xc->cppr with the subsequent\n> +\t * read of xc->mfrr inside push_pending_to_hw()\n> +\t */\n> +\tsmp_mb();\n> +\n> +\t/*\n> \t * We are masking less, we need to look for pending things\n> \t * to deliver and set VP pending bits accordingly to trigger\n> \t * a new interrupt otherwise we might miss MFRR changes for\n> @@ -429,21 +446,37 @@ X_STATIC int GLUE(X_PFX,h_eoi)(struct kvm_vcpu *vcpu, unsigned long xirr)\n> \t * used to signal MFRR changes is EOId when fetched from\n> \t * the queue.\n> \t */\n> -\tif (irq == XICS_IPI || irq == 0)\n> +\tif (irq == XICS_IPI || irq == 0) {\n> +\t\t/*\n> +\t\t * This barrier orders the setting of xc->cppr vs.\n> +\t\t * subsquent test of xc->mfrr done inside\n> +\t\t * scan_interrupts and push_pending_to_hw\n> +\t\t */\n> +\t\tsmp_mb();\n> \t\tgoto bail;\n> +\t}\n> \n> \t/* Find interrupt source */\n> \tsb = kvmppc_xive_find_source(xive, irq, &src);\n> \tif (!sb) {\n> \t\tpr_devel(\" source not found !\\n\");\n> \t\trc = H_PARAMETER;\n> +\t\t/* Same as above */\n> +\t\tsmp_mb();\n> \t\tgoto bail;\n> \t}\n> \tstate = &sb->irq_state[src];\n> \tkvmppc_xive_select_irq(state, &hw_num, &xd);\n> \n> \tstate->in_eoi = true;\n> -\tmb();\n> +\n> +\t/*\n> +\t * This barrier orders both setting of in_eoi above vs,\n> +\t * subsequent test of guest_priority, and the setting\n> +\t * of xc->cppr vs. subsquent test of xc->mfrr done inside\n> +\t * scan_interrupts and push_pending_to_hw\n> +\t */\n> +\tsmp_mb();\n> \n> again:\n> \tif (state->guest_priority == MASKED) {\n> @@ -470,6 +503,14 @@ X_STATIC int GLUE(X_PFX,h_eoi)(struct kvm_vcpu *vcpu, unsigned long xirr)\n> \n> \t}\n> \n> +\t/*\n> +\t * This barrier orders the above guest_priority check\n> +\t * and spin_lock/unlock with clearing in_eoi below.\n> +\t *\n> +\t * It also has to be a full mb() as it must ensure\n> +\t * the MMIOs done in source_eoi() are completed before\n> +\t * state->in_eoi is visible.\n> +\t */\n> \tmb();\n> \tstate->in_eoi = false;\n> bail:\n> @@ -504,6 +545,18 @@ X_STATIC int GLUE(X_PFX,h_ipi)(struct kvm_vcpu *vcpu, unsigned long server,\n> \t/* Locklessly write over MFRR */\n> \txc->mfrr = mfrr;\n> \n> +\t/*\n> +\t * The load of xc->cppr below and the subsequent MMIO store\n> +\t * to the IPI must happen after the above mfrr update is\n> +\t * globally visible so that:\n> +\t *\n> +\t * - Synchronize with another CPU doing an H_EOI or a H_CPPR\n> +\t * updating xc->cppr then reading xc->mfrr.\n> +\t *\n> +\t * - The target of the IPI sees the xc->mfrr update\n> +\t */\n> +\tmb();\n> +\n> \t/* Shoot the IPI if most favored than target cppr */\n> \tif (mfrr < xc->cppr)\n> \t\t__x_writeq(0, __x_trig_page(&xc->vp_ipi_data));\n> \n\n--\nTo unsubscribe from this list: send the line \"unsubscribe kvm-ppc\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=kvm-ppc-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xYjkm6CN9z9t3m\n\tfor ;\n\tFri, 18 Aug 2017 22:56:16 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751114AbdHRM4Q (ORCPT );\n\tFri, 18 Aug 2017 08:56:16 -0400","from mx0a-001b2d01.pphosted.com ([148.163.156.1]:59129 \"EHLO\n\tmx0a-001b2d01.pphosted.com\" rhost-flags-OK-OK-OK-OK)\n\tby vger.kernel.org with ESMTP id S1751045AbdHRM4P (ORCPT\n\t); Fri, 18 Aug 2017 08:56:15 -0400","from pps.filterd (m0098404.ppops.net [127.0.0.1])\n\tby mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv7ICsQr0127687\n\tfor ; Fri, 18 Aug 2017 08:56:15 -0400","from e15.ny.us.ibm.com (e15.ny.us.ibm.com [129.33.205.205])\n\tby mx0a-001b2d01.pphosted.com with ESMTP id 2cdqfyp3sd-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor ; Fri, 18 Aug 2017 08:56:14 -0400","from localhost\n\tby e15.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! 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Violators will be prosecuted; \n\tFri, 18 Aug 2017 08:56:11 -0400","from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com\n\t[9.57.199.111])\n\tby b01cxnp22034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP\n\tid v7ICuBTi22806778; Fri, 18 Aug 2017 12:56:11 GMT","from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id C907EAC043;\n\tFri, 18 Aug 2017 08:56:31 -0400 (EDT)","from [9.85.152.247] (unknown [9.85.152.247])\n\tby b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 7329BAC03F;\n\tFri, 18 Aug 2017 08:56:30 -0400 (EDT)"],"Subject":"Re: [PATCH 2/2] kvm/xive: Add missing barriers and document them","To":"Benjamin Herrenschmidt ,\n\tkvm-ppc@vger.kernel.org","Cc":"paulus@samba.org, linuxppc dev list ,\n\t\"kvm@vger.kernel.org\" ,\n\tBrian King ","References":"<1503022258.4493.133.camel@kernel.crashing.org>","From":"\"Guilherme G. Piccoli\" ","Date":"Fri, 18 Aug 2017 09:56:08 -0300","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<1503022258.4493.133.camel@kernel.crashing.org>","Content-Type":"text/plain; charset=utf-8","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","X-TM-AS-GCONF":"00","x-cbid":"17081812-0036-0000-0000-0000025AC2BA","X-IBM-SpamModules-Scores":"","X-IBM-SpamModules-Versions":"BY=3.00007567; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000223; SDB=6.00904102; UDB=6.00452974;\n\tIPR=6.00684314; \n\tBA=6.00005538; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009;\n\tZB=6.00000000; \n\tZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00016755;\n\tXFM=3.00000015; UTC=2017-08-18 12:56:13","X-IBM-AV-DETECTION":"SAVI=unused REMOTE=unused XFE=unused","x-cbparentid":"17081812-0037-0000-0000-0000417ADD09","Message-Id":"<621d4044-5326-a294-8aa8-ea68affbd7b1@linux.vnet.ibm.com>","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-08-18_04:, , signatures=0","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=0\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1708180206","Sender":"kvm-ppc-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"kvm-ppc@vger.kernel.org"}}]