[{"id":1751299,"web_url":"http://patchwork.ozlabs.org/comment/1751299/","msgid":"","list_archive_url":null,"date":"2017-08-18T16:12:30","subject":"Re: [U-Boot] [PATCH v3 1/8] armv8: Add workaround for USB erratum\n\tA-009008","submitter":{"id":67822,"url":"http://patchwork.ozlabs.org/api/people/67822/","name":"York Sun","email":"york.sun@nxp.com"},"content":"+Marek\n\nMarek,\n\nThis patch set is to add errata workarounds for FSL SoCs, not to USB \ndriver. I intend to merge them for next release.\n\nOn 08/17/2017 12:48 AM, Ran Wang wrote:\n> USB High Speed (HS) EYE Height Adjustment\n> USB HS speed eye diagram fails with the default value at\n> many corners, particularly at a high temperature\n> \n> Optimal eye at TXREFTUNE value to 1001 is observed, change\n> set the same value.\n> \n> Signed-off-by: Ran Wang \n> ---\n> Change in v3:\n> \tUse inline function to make code cleaner.\n> \n\nRan,\n\nThis version is much better. I will change 1001 to 0x9 in the commit \nmessage to match the code.\n\nYork","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"ThpjsOiL\";\n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=york.sun@nxp.com; "],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xYpNd1WKNz9t36\n\tfor ;\n\tSat, 19 Aug 2017 02:25:53 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 08AB6C220B2; Fri, 18 Aug 2017 16:18:56 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 29AFCC220AB;\n\tFri, 18 Aug 2017 16:18:54 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 5C289C220A9; Fri, 18 Aug 2017 16:12:33 +0000 (UTC)","from EUR02-VE1-obe.outbound.protection.outlook.com\n\t(mail-eopbgr20058.outbound.protection.outlook.com [40.107.2.58])\n\tby lists.denx.de (Postfix) with ESMTPS id E9792C2200D\n\tfor ; Fri, 18 Aug 2017 16:12:32 +0000 (UTC)","from VI1PR04MB2078.eurprd04.prod.outlook.com (10.166.43.18) by\n\tVI1PR04MB1342.eurprd04.prod.outlook.com (10.163.165.157) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.1.1341.21; Fri, 18 Aug 2017 16:12:31 +0000","from VI1PR04MB2078.eurprd04.prod.outlook.com\n\t([fe80::5ce6:46c1:8a2c:ca59]) by\n\tVI1PR04MB2078.eurprd04.prod.outlook.com\n\t([fe80::5ce6:46c1:8a2c:ca59%14]) with mapi id 15.01.1362.019;\n\tFri, 18 Aug 2017 16:12:30 +0000"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tRCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,T_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=B8KMsmSzxBaNlrPguVlxTU/banKlIX1BidfC+Vkwh/o=;\n\tb=ThpjsOiLCfTjQa8iAwc29KxZ/Uz3d4wP2kLOhKOJodZv9PwP5UvslHZC1rQ3arfRiGFiqc1M+mrzJPDo9nlFiA6IgmqZ+LoUczuZ3FBB+yqWIMKWRSsDkUqLvzK1b75YT7Ybz0AkF8lix9xCrNKPcGweA9+3cZk5vPF1iKoY+8c=","From":"York Sun ","To":"Ran Wang ","Thread-Topic":"[PATCH v3 1/8] armv8: Add workaround for USB erratum A-009008","Thread-Index":"AQHTFy08aY0qkG3NwUS5L6KDNgUkGQ==","Date":"Fri, 18 Aug 2017 16:12:30 +0000","Message-ID":"","References":"<1502955089-2049-1-git-send-email-ran.wang_1@nxp.com>","Accept-Language":"en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","authentication-results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"ThpjsOiL\";\n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=york.sun@nxp.com; "],"x-originating-ip":"[192.88.168.1]","x-ms-publictraffictype":"Email","x-microsoft-exchange-diagnostics":"1; VI1PR04MB1342;\n\t6:LS32UJ0aMUyW2RQUe/31DIIROdGNQ7W3FuQf238x9QLCUspZUCTLooxun756HDE/Rrmk69A37zVEjM5rrvcGI9tGdCB67yZJtICbWBdkp1bRUjEZFLTVfLHFU9dgnnd1flKw/rcSaFiaRwO+CzfXWoYE1mFohzzuv6teOOoY79PAZdCepqSQdTggNYa8ZVoPC/ullcL0YR06zNk276gL4fL6gRfEMaHbASy3cdRMwACkNt2tkIo7+6J/xnDJpJ9SVPGZ0yJ5v9oSYxiDqZdAfJDyzQwFuRaqo/aRP9V3m2mqCiNP55cTDcVZhmnvsgVgIcdLtUtnDWbl9FYvTr10Eg==;\n\t5:TLRXdvTIPkSrJOR1sFK0EhYJQD8c58pC3R+4ApqFF9fOm8IZzTrbAaj5PDwmDPRXKlJj5v+EUFzheWXEEXk82HdjZTySpzurTEKOad7AlE4+d0dSISoX8vlBEN/xg8TRVcDgJkjCPJ6vaWciUOdUtQ==;\n\t24:32UFZRuNvmM1tF60uyx07Jey6rLCgJ8RnWcVEAK8uWwkVO4V7PxaBzURNPcsl3LXb2BbQ/szHPoGiaJp/+gqXVkCRhXR/Gqge9PUOpcLoyo=;\n\t7:TTpi0gPxNcmKYtuYhSFtdhdtR92QBFwI/YdLeYGQsRDIyaHY4iSpmWtciSJOO05GJJlHC41ByjJ+4Y9l7zJcCY+fjLJGLHyY41gfXmhxvyDEGCA/5nelmPVraV360g5ORD94drZmyQXLLFOU1oaq5TCpUF8i/W8ttWAoySWXFemkmaCdVsn1OXdxcb/9Fx5x10pS/Jo1Wzw/dyEIdeCePxuDQvNKcuUPdsbDyI6Fyw8=","x-ms-exchange-antispam-srfa-diagnostics":"SSOS;SSOR;","x-forefront-antispam-report":"SFV:SKI; SCL:-1; SFV:NSPM;\n\tSFS:(10009020)(6009001)(189002)(199003)(24454002)(377454003)(229853002)(6636002)(7696004)(53936002)(25786009)(74316002)(6506006)(2906002)(5250100002)(54356999)(86362001)(66066001)(189998001)(14454004)(53546010)(478600001)(8936002)(102836003)(9686003)(50986999)(81166006)(6862004)(8676002)(81156014)(55016002)(101416001)(97736004)(4326008)(2900100001)(5660300001)(105586002)(33656002)(6246003)(7736002)(6436002)(106356001)(43066003)(99286003)(54906002)(68736007)(110136004)(3660700001)(3450700001)(3280700002)(3846002)(6116002)(305945005)(76176999);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR04MB1342;\n\tH:VI1PR04MB2078.eurprd04.prod.outlook.com; FPR:; SPF:None;\n\tPTR:InfoNoRecords; MX:1; A:1; LANG:en; ","x-ms-office365-filtering-correlation-id":"c8be2b2a-0e61-47c6-c864-08d4e653ed60","x-ms-office365-filtering-ht":"Tenant","x-microsoft-antispam":"UriScan:; BCL:0; PCL:0;\n\tRULEID:(300000500095)(300135000095)(300000501095)(300135300095)(22001)(300000502095)(300135100095)(2017030254152)(48565401081)(300000503095)(300135400095)(2017052603031)(201703131423075)(201703031133081)(201702281549075)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095);\n\tSRVR:VI1PR04MB1342; ","x-ms-traffictypediagnostic":"VI1PR04MB1342:","x-exchange-antispam-report-test":"UriScan:(185117386973197);","x-microsoft-antispam-prvs":"","x-exchange-antispam-report-cfa-test":"BCL:0; PCL:0;\n\tRULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6040450)(601004)(2401047)(8121501046)(5005006)(3002001)(93006095)(93001095)(100000703101)(100105400095)(10201501046)(6055026)(6041248)(20161123555025)(20161123562025)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123560025)(20161123558100)(20161123564025)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095);\n\tSRVR:VI1PR04MB1342; BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:VI1PR04MB1342; ","x-forefront-prvs":"040359335D","received-spf":"None (protection.outlook.com: nxp.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","MIME-Version":"1.0","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"18 Aug 2017 16:12:30.3893\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"VI1PR04MB1342","Cc":"\"marex@denx.de\" , Andy Tang ,\n\tPriyanka Jain , open list , \n\tSuresh Gupta ","Subject":"Re: [U-Boot] [PATCH v3 1/8] armv8: Add workaround for USB erratum\n\tA-009008","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Reply-To":"York Sun ","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1751375,"web_url":"http://patchwork.ozlabs.org/comment/1751375/","msgid":"","list_archive_url":null,"date":"2017-08-18T17:16:17","subject":"Re: [U-Boot] [PATCH v3 1/8] armv8: Add workaround for USB erratum\n\tA-009008","submitter":{"id":1124,"url":"http://patchwork.ozlabs.org/api/people/1124/","name":"Marek Vasut","email":"marek.vasut@gmail.com"},"content":"On 08/17/2017 09:31 AM, Ran Wang wrote:\n> USB High Speed (HS) EYE Height Adjustment\n> USB HS speed eye diagram fails with the default value at\n> many corners, particularly at a high temperature\n> \n> Optimal eye at TXREFTUNE value to 1001 is observed, change\n> set the same value.\n> \n> Signed-off-by: Ran Wang \n> ---\n> Change in v3:\n> \tUse inline function to make code cleaner.\n> \n> Change in v2:\n> \tIn function erratum_a009008():\n> \t1.Put a blank line after variable declaration.\n> \t2.Move common code together.\n> \n> arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 7 ++++++\n> arch/arm/cpu/armv8/fsl-layerscape/soc.c | 25 ++++++++++++++++++++++\n> .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 6 ++++++\n> .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 +\n> 4 files changed, 39 insertions(+)\n> \n> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig\n> index 5825f9b..300f5ce 100644\n> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig\n> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig\n> @@ -22,6 +22,7 @@ config ARCH_LS1043A\n> \tselect SYS_FSL_ERRATUM_A009942\n> \tselect SYS_FSL_ERRATUM_A010315\n> \tselect SYS_FSL_ERRATUM_A010539\n> +\tselect SYS_FSL_ERRATUM_A009008\n> \tselect SYS_FSL_HAS_DDR3\n> \tselect SYS_FSL_HAS_DDR4\n> \tselect ARCH_EARLY_INIT_R\n> @@ -43,6 +44,7 @@ config ARCH_LS1046A\n> \tselect SYS_FSL_ERRATUM_A009942\n> \tselect SYS_FSL_ERRATUM_A010165\n> \tselect SYS_FSL_ERRATUM_A010539\n> +\tselect SYS_FSL_ERRATUM_A009008\n> \tselect SYS_FSL_HAS_DDR4\n> \tselect SYS_FSL_SRDS_2\n> \tselect ARCH_EARLY_INIT_R\n> @@ -79,6 +81,7 @@ config ARCH_LS2080A\n> \tselect SYS_FSL_ERRATUM_A009942\n> \tselect SYS_FSL_ERRATUM_A010165\n> \tselect SYS_FSL_ERRATUM_A009203\n> +\tselect SYS_FSL_ERRATUM_A009008\n> \tselect ARCH_EARLY_INIT_R\n> \tselect BOARD_EARLY_INIT_F\n> \n> @@ -222,6 +225,10 @@ config SYS_FSL_ERRATUM_A010315\n> config SYS_FSL_ERRATUM_A010539\n> \tbool \"Workaround for PIN MUX erratum A010539\"\n> \n> +config SYS_FSL_ERRATUM_A009008\n> +\tbool \"Workaround for USB PHY erratum A009008\"\n> +\n> +\n> config MAX_CPUS\n> \tint \"Maximum number of CPUs permitted for Layerscape\"\n> \tdefault 4 if ARCH_LS1043A\n> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c\n> index aee1ffa..7e5288b 100644\n> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c\n> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c\n> @@ -52,6 +52,29 @@ bool soc_has_aiop(void)\n> \treturn false;\n> }\n> \n> +static inline void set_usb_txvreftune(u32 __iomem *scfg, u32 offset)\n\nDrop the inline.\n\n> +{\n> +\tu32 val;\n> +\n> +\tval = scfg_in32(scfg + offset / 4) & ~(0xF << 6);\n> +\tval |= USB_TXVREFTUNE << 6;\n> +\tscfg_out32(scfg + offset / 4, val);\n\nclrsetbits_le32() or something ? Clean up the math a little.\n\n> +}\n> +\n> +static void erratum_a009008(void)\n> +{\n> +#ifdef CONFIG_SYS_FSL_ERRATUM_A009008\n> +\tu32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;\n> +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)\n> +\tset_usb_txvreftune(scfg, SCFG_USB3PRM1CR_USB1);\n> +\tset_usb_txvreftune(scfg, SCFG_USB3PRM1CR_USB2);\n> +\tset_usb_txvreftune(scfg, SCFG_USB3PRM1CR_USB3);\n> +#elif defined(CONFIG_ARCH_LS2080A)\n> +\tset_usb_txvreftune(scfg, SCFG_USB3PRM1CR);\n> +#endif\n> +#endif /* CONFIG_SYS_FSL_ERRATUM_A009008 */\n> +}\n> +\n> #if defined(CONFIG_FSL_LSCH3)\n> /*\n> * This erratum requires setting a value to eddrtqcr1 to\n> @@ -198,6 +221,7 @@ void fsl_lsch3_early_init_f(void)\n> #endif\n> \terratum_a008514();\n> \terratum_a008336();\n> +\terratum_a009008();\n> #ifdef CONFIG_CHAIN_OF_TRUST\n> \t/* In case of Secure Boot, the IBR configures the SMMU\n> \t* to allow only Secure transactions.\n> @@ -473,6 +497,7 @@ void fsl_lsch2_early_init_f(void)\n> \terratum_a009929();\n> \terratum_a009660();\n> \terratum_a010539();\n> +\terratum_a009008();\n> }\n> #endif\n> \n> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h\n> index 8ad199f..62d7046 100644\n> --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h\n> +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h\n> @@ -337,6 +337,12 @@ struct ccsr_gur {\n> #define SCFG_USBPWRFAULT_USB2_SHIFT\t2\n> #define SCFG_USBPWRFAULT_USB1_SHIFT\t0\n> \n> +#define SCFG_BASE\t\t\t0x01570000\n> +#define SCFG_USB3PRM1CR_USB1\t\t0x070\n> +#define SCFG_USB3PRM1CR_USB2\t\t0x07C\n> +#define SCFG_USB3PRM1CR_USB3\t\t0x088\n> +#define USB_TXVREFTUNE\t\t\t0x9\n> +\n> #define SCFG_SNPCNFGCR_SECRDSNP\t\t0x80000000\n> #define SCFG_SNPCNFGCR_SECWRSNP\t\t0x40000000\n> #define SCFG_SNPCNFGCR_SATARDSNP\t0x00800000\n> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h\n> index 59410aa..c622ee5 100644\n> --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h\n> +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h\n> @@ -133,6 +133,7 @@\n> #define SCFG_BASE\t\t0x01fc0000\n> #define SCFG_USB3PRM1CR\t\t\t0x000\n> #define SCFG_USB3PRM1CR_INIT\t\t0x27672b2a\n> +#define USB_TXVREFTUNE\t\t\t0x9\n\nShould this also be SCFG_USB_... ? It looks terribly ad-hoc here.\n\n> #define SCFG_QSPICLKCTLR\t0x10\n> \n> #define TP_ITYP_AV\t\t0x00000001\t/* Initiator available */\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"DtTVO6YJ\"; dkim-atps=neutral"],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xYqW52YQbz9t3m\n\tfor ;\n\tSat, 19 Aug 2017 03:16:33 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 09CF8C22144; Fri, 18 Aug 2017 17:16:24 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 6E676C21FBC;\n\tFri, 18 Aug 2017 17:16:21 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid B3D0FC21FBC; Fri, 18 Aug 2017 17:16:20 +0000 (UTC)","from mail-wr0-f195.google.com (mail-wr0-f195.google.com\n\t[209.85.128.195])\n\tby lists.denx.de (Postfix) with ESMTPS id 51010C21D7A\n\tfor ; Fri, 18 Aug 2017 17:16:20 +0000 (UTC)","by mail-wr0-f195.google.com with SMTP id 49so7860557wrw.5\n\tfor ; Fri, 18 Aug 2017 10:16:20 -0700 (PDT)","from [192.168.1.4] (ip-86-49-107-50.net.upcbroadband.cz.\n\t[86.49.107.50]) by smtp.gmail.com with ESMTPSA id\n\t62sm4800574wrq.35.2017.08.18.10.16.18\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tFri, 18 Aug 2017 10:16:18 -0700 (PDT)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,\n\tT_DKIM_INVALID autolearn=unavailable\n\tautolearn_force=no version=3.4.0","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=subject:to:cc:references:from:message-id:date:user-agent\n\t:mime-version:in-reply-to:content-language:content-transfer-encoding; \n\tbh=sSMFhsX82vzdm5U4Stgw34ozEUOnsaeo28qU07mjmmM=;\n\tb=DtTVO6YJXKjQc3kayaRkyaNroSPT71sz0JZQ5OeODCh8dSYn5mTuRKvyNAYiqJE4rj\n\tcryLPhabEgJETtNICvgo34HNeTvR20RQDrFd2zjAJUSemjtoMo7mMWWOgCEaigatQHEr\n\tKGbDi/BHJrRBLxfxjkMpsgCg9kM5ySf7j6NTMAWDNeBpPB+5eXiHThVPpVMHU5QQyas0\n\tYuEOxRC7/wmM+mdGKcEmpPYP2jn7ws60wob/gSJrKDMDZfSh3cLDZNo6r+9brn2iF1Fv\n\tQCLwLtwcS7TQMsH/g0ASpXlT9r3QZ2N5scULXagUKtJzYJDCsYwn81sBZs0S6i9VTL0m\n\tGksg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:subject:to:cc:references:from:message-id:date\n\t:user-agent:mime-version:in-reply-to:content-language\n\t:content-transfer-encoding;\n\tbh=sSMFhsX82vzdm5U4Stgw34ozEUOnsaeo28qU07mjmmM=;\n\tb=LmLDgzeeIEnW6+Zw+hUFtE5/L//gXVxXT6cbmdnr8VyFO7NJUbnk00ItN94eF+z7h5\n\ts0F0IkHLOPMx/Fa5W8xd9cm+dM5oy/JsXNpuqQzD0wh3wH64aLyTgVzjXFqhDBZBwSkG\n\tgxwOgN9l9gzyKEXpvK9hJV5S1djw/BXxj/AlWrkI/Z+ueuPwhEocEjGfdc182ODyNwZy\n\tkf2JUuJP2HAdbN7I5K4ZqdiOJcjPQ+mvF84mpL+4m9B2Ow2dTNoTgzOF6LYnUWIGUtCi\n\t44PGC5coriHORHTWgS4e5jVZIewCECUPZ0bmhFwUcNHho42OIQnmMznFQlXk7YN4p/oi\n\tw6Xw==","X-Gm-Message-State":"AHYfb5gEVi51qqCpl+yC/Kg19hIjF/XcFbgiQy2Q1J4wpRewJpiWk5Py\n\tB9bsWpGkarom6A==","X-Received":"by 10.223.150.169 with SMTP id u38mr6010702wrb.0.1503076579668; \n\tFri, 18 Aug 2017 10:16:19 -0700 (PDT)","To":"Ran Wang , open list ,\n\tAlbert Aribaud , York Sun , \n\tSuresh Gupta , Sriram Dash ","References":"<1502955089-2049-1-git-send-email-ran.wang_1@nxp.com>","From":"Marek Vasut ","Message-ID":"","Date":"Fri, 18 Aug 2017 19:16:17 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<1502955089-2049-1-git-send-email-ran.wang_1@nxp.com>","Content-Language":"en-US","Cc":"Priyanka Jain ","Subject":"Re: [U-Boot] [PATCH v3 1/8] armv8: Add workaround for USB erratum\n\tA-009008","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1751376,"web_url":"http://patchwork.ozlabs.org/comment/1751376/","msgid":"","list_archive_url":null,"date":"2017-08-18T17:15:05","subject":"Re: [U-Boot] [PATCH v3 1/8] armv8: Add workaround for USB erratum\n\tA-009008","submitter":{"id":12009,"url":"http://patchwork.ozlabs.org/api/people/12009/","name":"Marek Vasut","email":"marex@denx.de"},"content":"On 08/18/2017 06:12 PM, York Sun wrote:\n> +Marek\n> \n> Marek,\n> \n> This patch set is to add errata workarounds for FSL SoCs, not to USB \n> driver. I intend to merge them for next release.\n\nIt'd be nice to see the patch too ...\n\n> On 08/17/2017 12:48 AM, Ran Wang wrote:\n>> USB High Speed (HS) EYE Height Adjustment\n>> USB HS speed eye diagram fails with the default value at\n>> many corners, particularly at a high temperature\n>>\n>> Optimal eye at TXREFTUNE value to 1001 is observed, change\n>> set the same value.\n>>\n>> Signed-off-by: Ran Wang \n>> ---\n>> Change in v3:\n>> \tUse inline function to make code cleaner.\n>>\n> \n> Ran,\n> \n> This version is much better. I will change 1001 to 0x9 in the commit \n> message to match the code.\n> \n> York\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xYqWc3491z9t3m\n\tfor ;\n\tSat, 19 Aug 2017 03:17:00 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 0846CC22156; Fri, 18 Aug 2017 17:16:58 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 1F066C22084;\n\tFri, 18 Aug 2017 17:16:57 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 630C1C2213D; Fri, 18 Aug 2017 17:16:54 +0000 (UTC)","from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9])\n\tby lists.denx.de (Postfix) with ESMTPS id 27F53C22142\n\tfor ; Fri, 18 Aug 2017 17:16:54 +0000 (UTC)","from frontend01.mail.m-online.net (unknown [192.168.8.182])\n\tby mail-out.m-online.net (Postfix) with ESMTP id 3xYqWT5VGbz1qrMd;\n\tFri, 18 Aug 2017 19:16:53 +0200 (CEST)","from localhost (dynscan1.mnet-online.de [192.168.6.70])\n\tby mail.m-online.net (Postfix) with ESMTP id 3xYqWT3b43z3jgXr;\n\tFri, 18 Aug 2017 19:16:53 +0200 (CEST)","from mail.mnet-online.de ([192.168.8.182])\n\tby localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new,\n\tport 10024)\n\twith ESMTP id UZv4NyyoyxLV; Fri, 18 Aug 2017 19:16:51 +0200 (CEST)","from [IPv6:::1] (unknown [195.140.253.167])\n\t(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mail.mnet-online.de (Postfix) with ESMTPSA;\n\tFri, 18 Aug 2017 19:16:51 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-0.7 required=5.0 tests=RCVD_IN_DNSWL_LOW,\n\tRCVD_IN_MSPIKE_H3,\n\tRCVD_IN_MSPIKE_WL autolearn=unavailable autolearn_force=no\n\tversion=3.4.0","X-Virus-Scanned":"amavisd-new at mnet-online.de","X-Auth-Info":"KLXcaP9FGsrUp6BH5kIaGDvcgovZzlGgmVrHZWyC3Mc=","To":"York Sun , Ran Wang ","References":"<1502955089-2049-1-git-send-email-ran.wang_1@nxp.com>\n\t","From":"Marek Vasut ","Message-ID":"","Date":"Fri, 18 Aug 2017 19:15:05 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"","Content-Language":"en-US","Cc":"Andy Tang , Priyanka Jain ,\n\topen list , Suresh Gupta ","Subject":"Re: [U-Boot] [PATCH v3 1/8] armv8: Add workaround for USB erratum\n\tA-009008","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1751384,"web_url":"http://patchwork.ozlabs.org/comment/1751384/","msgid":"","list_archive_url":null,"date":"2017-08-18T17:21:54","subject":"Re: [U-Boot] [PATCH v3 1/8] armv8: Add workaround for USB erratum\n\tA-009008","submitter":{"id":67822,"url":"http://patchwork.ozlabs.org/api/people/67822/","name":"York Sun","email":"york.sun@nxp.com"},"content":"On 08/18/2017 10:16 AM, Marek Vasut wrote:\n> On 08/17/2017 09:31 AM, Ran Wang wrote:\n>> USB High Speed (HS) EYE Height Adjustment\n>> USB HS speed eye diagram fails with the default value at\n>> many corners, particularly at a high temperature\n>>\n>> Optimal eye at TXREFTUNE value to 1001 is observed, change\n>> set the same value.\n>>\n>> Signed-off-by: Ran Wang \n>> ---\n>> Change in v3:\n>> \tUse inline function to make code cleaner.\n>>\n>> Change in v2:\n>> \tIn function erratum_a009008():\n>> \t1.Put a blank line after variable declaration.\n>> \t2.Move common code together.\n>>\n>> arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 7 ++++++\n>> arch/arm/cpu/armv8/fsl-layerscape/soc.c | 25 ++++++++++++++++++++++\n>> .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 6 ++++++\n>> .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 +\n>> 4 files changed, 39 insertions(+)\n>>\n>> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig\n>> index 5825f9b..300f5ce 100644\n>> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig\n>> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig\n>> @@ -22,6 +22,7 @@ config ARCH_LS1043A\n>> \tselect SYS_FSL_ERRATUM_A009942\n>> \tselect SYS_FSL_ERRATUM_A010315\n>> \tselect SYS_FSL_ERRATUM_A010539\n>> +\tselect SYS_FSL_ERRATUM_A009008\n>> \tselect SYS_FSL_HAS_DDR3\n>> \tselect SYS_FSL_HAS_DDR4\n>> \tselect ARCH_EARLY_INIT_R\n>> @@ -43,6 +44,7 @@ config ARCH_LS1046A\n>> \tselect SYS_FSL_ERRATUM_A009942\n>> \tselect SYS_FSL_ERRATUM_A010165\n>> \tselect SYS_FSL_ERRATUM_A010539\n>> +\tselect SYS_FSL_ERRATUM_A009008\n>> \tselect SYS_FSL_HAS_DDR4\n>> \tselect SYS_FSL_SRDS_2\n>> \tselect ARCH_EARLY_INIT_R\n>> @@ -79,6 +81,7 @@ config ARCH_LS2080A\n>> \tselect SYS_FSL_ERRATUM_A009942\n>> \tselect SYS_FSL_ERRATUM_A010165\n>> \tselect SYS_FSL_ERRATUM_A009203\n>> +\tselect SYS_FSL_ERRATUM_A009008\n>> \tselect ARCH_EARLY_INIT_R\n>> \tselect BOARD_EARLY_INIT_F\n>> \n>> @@ -222,6 +225,10 @@ config SYS_FSL_ERRATUM_A010315\n>> config SYS_FSL_ERRATUM_A010539\n>> \tbool \"Workaround for PIN MUX erratum A010539\"\n>> \n>> +config SYS_FSL_ERRATUM_A009008\n>> +\tbool \"Workaround for USB PHY erratum A009008\"\n>> +\n>> +\n>> config MAX_CPUS\n>> \tint \"Maximum number of CPUs permitted for Layerscape\"\n>> \tdefault 4 if ARCH_LS1043A\n>> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c\n>> index aee1ffa..7e5288b 100644\n>> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c\n>> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c\n>> @@ -52,6 +52,29 @@ bool soc_has_aiop(void)\n>> \treturn false;\n>> }\n>> \n>> +static inline void set_usb_txvreftune(u32 __iomem *scfg, u32 offset)\n> \n> Drop the inline.\n\nMarek, please explain why we should drop the \"inline\"?\nI suggested the \"inline\" based on v2 patch.\n\nYork","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"SlaPE+As\";\n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=york.sun@nxp.com; "],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xYqdW2hxbz9t3m\n\tfor ;\n\tSat, 19 Aug 2017 03:22:07 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 182F9C22135; Fri, 18 Aug 2017 17:22:00 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 89379C21FBC;\n\tFri, 18 Aug 2017 17:21:57 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 96CC7C21FBC; Fri, 18 Aug 2017 17:21:56 +0000 (UTC)","from EUR01-VE1-obe.outbound.protection.outlook.com\n\t(mail-ve1eur01on0055.outbound.protection.outlook.com [104.47.1.55])\n\tby lists.denx.de (Postfix) with ESMTPS id 12D52C21D7B\n\tfor ; Fri, 18 Aug 2017 17:21:56 +0000 (UTC)","from VI1PR04MB2078.eurprd04.prod.outlook.com (10.166.43.18) by\n\tVI1PR04MB1214.eurprd04.prod.outlook.com (10.162.121.148) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.1.1362.18; Fri, 18 Aug 2017 17:21:54 +0000","from VI1PR04MB2078.eurprd04.prod.outlook.com\n\t([fe80::5ce6:46c1:8a2c:ca59]) by\n\tVI1PR04MB2078.eurprd04.prod.outlook.com\n\t([fe80::5ce6:46c1:8a2c:ca59%14]) with mapi id 15.01.1362.019;\n\tFri, 18 Aug 2017 17:21:54 +0000"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tRCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,T_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=DkxgN+zOEy5tE64f/dDt3CACZtIBhV7JGzr+13adHgo=;\n\tb=SlaPE+AsdtoCdaiUdxDoJ2kQvFHZnewtDg/NTTsAv6OHTXOhBWHG1oiGa1aQInOkKKmK5DpL44HG6GnNG5vEFJbpvm9RCZDULporhy/gtxjr7vrix1jYRa1iqA3xWo6VJJn64f1fXjYMiV1uAxExRCur4MSoqx2AY6jrtjFqU20=","From":"York Sun ","To":"Marek Vasut , Ran Wang , \"open\n\tlist\" , Albert Aribaud ,\n\tSuresh Gupta , Sriram Dash ","Thread-Topic":"[U-Boot] [PATCH v3 1/8] armv8: Add workaround for USB erratum\n\tA-009008","Thread-Index":"AQHTFy08aY0qkG3NwUS5L6KDNgUkGQ==","Date":"Fri, 18 Aug 2017 17:21:54 +0000","Message-ID":"","References":"<1502955089-2049-1-git-send-email-ran.wang_1@nxp.com>\n\t","Accept-Language":"en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","authentication-results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"SlaPE+As\";\n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=york.sun@nxp.com; "],"x-originating-ip":"[192.88.168.1]","x-ms-publictraffictype":"Email","x-microsoft-exchange-diagnostics":"1; VI1PR04MB1214;\n\t6:g4u4sYNAmZ1UQgriR75pLaxItX70VrSzTGrpx1/QXZ98bF5RxbpC9hQyMVO/8eHt1n9DjjXczU6UzgJfG0ydBJOgp3MYzFNmSk7xN6Hm0WM7XEVUXT6jDJUamNKqLzr8JDfT+vIvsjPCJU0nqOpgi+3k4JwxL3DvpLxZpWENb2PwTZ+JGZ5xC4uOYsfn+Z0SY8I7bRH95YQmgHaHKeYOa2zNi82Y25PA73SI3UuI+ZYdw9zgtUwHMlvXM3uU3Dz1dwdgfShekLypnYf0q37nnlFObGboGpS9FbNFXWzTvBUjkr73Wfw50uvGxOMmb3xkmUosUfr6U5knirZRmgBD9A==;\n\t5:LnP9i78vW9DC6dKRdifHQnltqePyQ8dNayNi5sr/XiLpUXVs4CadtPBQPScaUa26NqmTPoGeF4uk11Y+klJ28bN+UmMyHDgSJM4eEgZ9s14MrFU02zZ5MUylXYMBoqG6YdpVQPDuRUVZi2l5lAeD8w==;\n\t24:Nk/B0CoJi5F6nB4kSHNE3ShBFcmKH7hibRh3ISV2n/hGeSoEJDrL+oX7G/sahCNfnrIsoH84LBN0xOg9fLkV1cHRy7zH8XkF3PsxQcxexAs=;\n\t7:fP5eGysQ6Xm7fErRkd9FtwgZG2M/xVfFXGUofmrgzWUiECCmiaS9Hw0jcMdpStGcodGpifOFwWs40PwILeq/W/aJrk/0osI8+Kix+fdDPbnUbS33nj9JRIZUcIyRDKJXRT3hneyOttLffHKxVNtYMGLwjFffYcbU3gY0ek/QayInHCKSRumZ/yt3e8ws/XOsDytktGHddELSTOiZ3+cI8OkKcXX07X3g1Ofu4A3Ap5g=","x-ms-exchange-antispam-srfa-diagnostics":"SSOS;SSOR;","x-forefront-antispam-report":"SFV:SKI; SCL:-1; SFV:NSPM;\n\tSFS:(10009020)(6009001)(39860400002)(189002)(377454003)(24454002)(199003)(33656002)(106356001)(39060400002)(81156014)(81166006)(8676002)(86362001)(55016002)(99286003)(105586002)(8936002)(54356999)(53936002)(5250100002)(9686003)(68736007)(189998001)(3660700001)(3280700002)(3450700001)(2906002)(50986999)(6246003)(76176999)(97736004)(2900100001)(66066001)(101416001)(43066003)(229853002)(478600001)(14454004)(305945005)(53546010)(7696004)(7736002)(6636002)(74316002)(5660300001)(25786009)(6436002)(6506006)(4326008)(3846002)(102836003)(6116002);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR04MB1214;\n\tH:VI1PR04MB2078.eurprd04.prod.outlook.com; FPR:; SPF:None;\n\tPTR:InfoNoRecords; MX:1; A:1; LANG:en; ","x-ms-office365-filtering-correlation-id":"a9e65f02-848d-4d6c-676d-08d4e65d9f47","x-ms-office365-filtering-ht":"Tenant","x-microsoft-antispam":"UriScan:; BCL:0; PCL:0;\n\tRULEID:(300000500095)(300135000095)(300000501095)(300135300095)(22001)(300000502095)(300135100095)(2017030254152)(300000503095)(300135400095)(48565401081)(2017052603031)(201703131423075)(201703031133081)(201702281549075)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095);\n\tSRVR:VI1PR04MB1214; ","x-ms-traffictypediagnostic":"VI1PR04MB1214:","x-exchange-antispam-report-test":"UriScan:(185117386973197);","x-microsoft-antispam-prvs":"","x-exchange-antispam-report-cfa-test":"BCL:0; PCL:0;\n\tRULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6040450)(601004)(2401047)(8121501046)(5005006)(3002001)(93006095)(93001095)(100000703101)(100105400095)(10201501046)(6055026)(6041248)(20161123555025)(20161123564025)(20161123562025)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123560025)(20161123558100)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095);\n\tSRVR:VI1PR04MB1214; BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:VI1PR04MB1214; ","x-forefront-prvs":"040359335D","received-spf":"None (protection.outlook.com: nxp.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","MIME-Version":"1.0","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"18 Aug 2017 17:21:54.2967\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"VI1PR04MB1214","Cc":"Priyanka Jain ","Subject":"Re: [U-Boot] [PATCH v3 1/8] armv8: Add workaround for USB erratum\n\tA-009008","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Reply-To":"York Sun ","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}}]