[{"id":1758010,"web_url":"http://patchwork.ozlabs.org/comment/1758010/","msgid":"","list_archive_url":null,"date":"2017-08-26T13:39:25","subject":"Re: [U-Boot] [PATCH 13/13] x86: Support Intel Cherry Hill board","submitter":{"id":6170,"url":"http://patchwork.ozlabs.org/api/people/6170/","name":"Simon Glass","email":"sjg@chromium.org"},"content":"On 15 August 2017 at 23:42, Bin Meng wrote:\n> This adds support to Intel Cherry Hill board, a board based on\n> Intel Braswell SoC. The following devices are validated:\n>\n> - serial port as the serial console\n> - on-board Realtek 8169 ethernet controller\n> - SATA AHCI controller\n> - EMMC/SDHC controller\n> - USB 3.0 xHCI controller\n> - PCIe x1 slot with a graphics card\n> - ICH SPI controller with an 8MB Macronix SPI flash\n> - Integrated graphics device as the video console\n>\n> Signed-off-by: Bin Meng \n>\n> ---\n>\n> arch/x86/dts/Makefile | 1 +\n> arch/x86/dts/cherryhill.dts | 215 +++++++++++++\n> board/intel/Kconfig | 10 +\n> board/intel/cherryhill/Kconfig | 25 ++\n> board/intel/cherryhill/MAINTAINERS | 6 +\n> board/intel/cherryhill/Makefile | 7 +\n> board/intel/cherryhill/cherryhill.c | 596 ++++++++++++++++++++++++++++++++++++\n> board/intel/cherryhill/start.S | 9 +\n> configs/cherryhill_defconfig | 36 +++\n> doc/README.x86 | 30 ++\n> include/configs/cherryhill.h | 22 ++\n> 11 files changed, 957 insertions(+)\n> create mode 100644 arch/x86/dts/cherryhill.dts\n> create mode 100644 board/intel/cherryhill/Kconfig\n> create mode 100644 board/intel/cherryhill/MAINTAINERS\n> create mode 100644 board/intel/cherryhill/Makefile\n> create mode 100644 board/intel/cherryhill/cherryhill.c\n> create mode 100644 board/intel/cherryhill/start.S\n> create mode 100644 configs/cherryhill_defconfig\n> create mode 100644 include/configs/cherryhill.h\n\nReviewed-by: Simon Glass ","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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\n\tSat, 26 Aug 2017 06:39:45 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1502862122-14771-14-git-send-email-bmeng.cn@gmail.com>","References":"<1502862122-14771-1-git-send-email-bmeng.cn@gmail.com>\n\t<1502862122-14771-14-git-send-email-bmeng.cn@gmail.com>","From":"Simon Glass ","Date":"Sat, 26 Aug 2017 07:39:25 -0600","X-Google-Sender-Auth":"FaRxytfzFfKGu-w0q2JSGgb5Ga8","Message-ID":"","To":"Bin Meng ","Cc":"U-Boot Mailing List ","Subject":"Re: [U-Boot] [PATCH 13/13] x86: Support Intel Cherry Hill board","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1769560,"web_url":"http://patchwork.ozlabs.org/comment/1769560/","msgid":"","list_archive_url":null,"date":"2017-09-16T04:32:48","subject":"Re: [U-Boot] [PATCH 13/13] x86: Support Intel Cherry Hill board","submitter":{"id":64981,"url":"http://patchwork.ozlabs.org/api/people/64981/","name":"Bin Meng","email":"bmeng.cn@gmail.com"},"content":"On Sat, Aug 26, 2017 at 9:39 PM, Simon Glass wrote:\n> On 15 August 2017 at 23:42, Bin Meng wrote:\n>> This adds support to Intel Cherry Hill board, a board based on\n>> Intel Braswell SoC. The following devices are validated:\n>>\n>> - serial port as the serial console\n>> - on-board Realtek 8169 ethernet controller\n>> - SATA AHCI controller\n>> - EMMC/SDHC controller\n>> - USB 3.0 xHCI controller\n>> - PCIe x1 slot with a graphics card\n>> - ICH SPI controller with an 8MB Macronix SPI flash\n>> - Integrated graphics device as the video console\n>>\n>> Signed-off-by: Bin Meng \n>>\n>> ---\n>>\n>> arch/x86/dts/Makefile | 1 +\n>> arch/x86/dts/cherryhill.dts | 215 +++++++++++++\n>> board/intel/Kconfig | 10 +\n>> board/intel/cherryhill/Kconfig | 25 ++\n>> board/intel/cherryhill/MAINTAINERS | 6 +\n>> board/intel/cherryhill/Makefile | 7 +\n>> board/intel/cherryhill/cherryhill.c | 596 ++++++++++++++++++++++++++++++++++++\n>> board/intel/cherryhill/start.S | 9 +\n>> configs/cherryhill_defconfig | 36 +++\n>> doc/README.x86 | 30 ++\n>> include/configs/cherryhill.h | 22 ++\n>> 11 files changed, 957 insertions(+)\n>> create mode 100644 arch/x86/dts/cherryhill.dts\n>> create mode 100644 board/intel/cherryhill/Kconfig\n>> create mode 100644 board/intel/cherryhill/MAINTAINERS\n>> create mode 100644 board/intel/cherryhill/Makefile\n>> create mode 100644 board/intel/cherryhill/cherryhill.c\n>> create mode 100644 board/intel/cherryhill/start.S\n>> create mode 100644 configs/cherryhill_defconfig\n>> create mode 100644 include/configs/cherryhill.h\n>\n> Reviewed-by: Simon Glass \n\napplied to u-boot-x86, thanks!","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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