[{"id":1760555,"web_url":"http://patchwork.ozlabs.org/comment/1760555/","msgid":"<87efrs8y8q.fsf@concordia.ellerman.id.au>","date":"2017-08-30T22:52:21","subject":"Re: mpic IRQ_TYPE_BOTH handling","submitter":{"id":46580,"url":"http://patchwork.ozlabs.org/api/people/46580/","name":"Michael Ellerman","email":"mpe@ellerman.id.au"},"content":"Hi Gregory,\n\nGregory Fong writes:\n> Hi all,\n>\n> In arch/powerpc/sysdev/mpic.c , it looks like IRQ_TYPE_EDGE_BOTH is\n> handled the same way as IRQ_TYPE_EDGE_FALLING:\n>\n> static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type)\n> {\n> /* Now convert sense value */\n> switch(type & IRQ_TYPE_SENSE_MASK) {\n> case IRQ_TYPE_EDGE_RISING:\n> return MPIC_INFO(VECPRI_SENSE_EDGE) |\n> MPIC_INFO(VECPRI_POLARITY_POSITIVE);\n> case IRQ_TYPE_EDGE_FALLING:\n> case IRQ_TYPE_EDGE_BOTH:\n> return MPIC_INFO(VECPRI_SENSE_EDGE) |\n> MPIC_INFO(VECPRI_POLARITY_NEGATIVE);\n> case IRQ_TYPE_LEVEL_HIGH:\n> return MPIC_INFO(VECPRI_SENSE_LEVEL) |\n> MPIC_INFO(VECPRI_POLARITY_POSITIVE);\n> case IRQ_TYPE_LEVEL_LOW:\n> default:\n> return MPIC_INFO(VECPRI_SENSE_LEVEL) |\n> MPIC_INFO(VECPRI_POLARITY_NEGATIVE);\n> }\n> }\n>\n> If IRQ_TYPE_EDGE_BOTH is unsupported, shouldn't we be returning an\n> error, instead of silently setting to use IRQ_TYPE_EDGE_FALLING?\n> Something like the following (sorry if the diff wraps weirdly, on\n> webmail at the moment):\n\nI don't know this code so I asked Ben and he said something like\n\"PowerMacs never use BOTH, so it hasn't mattered, but Freescale machines\nmight\".\n\nSo if you want to send a proper signed-off patch, and confirm that all\nthe callers can handle the error properly, then we can merge it.\n\ncheers\n\n> ----8<----\n> diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c\n> index b9aac95..5867ea2 100644\n> --- a/arch/powerpc/sysdev/mpic.c\n> +++ b/arch/powerpc/sysdev/mpic.c\n> @@ -876,6 +876,9 @@ int mpic_set_irq_type(struct irq_data *d, unsigned\n> int flow_type)\n> if (src >= mpic->num_sources)\n> return -EINVAL;\n>\n> + if (flow_type & IRQ_TYPE_SENSE_MASK == IRQ_TYPE_EDGE_BOTH)\n> + return -EINVAL;\n> +\n> vold = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI));\n>\n> /* We don't support \"none\" type */\n> ---->8----\n>\n> Thanks,\n> Gregory","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xjLQN74Smz9s65\n\tfor ;\n\tThu, 31 Aug 2017 08:53:32 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xjLQN6CkWzDqR8\n\tfor ;\n\tThu, 31 Aug 2017 08:53:32 +1000 (AEST)","from ozlabs.org (ozlabs.org [IPv6:2401:3900:2:1::2])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xjLP345FLzDqNY\n\tfor ;\n\tThu, 31 Aug 2017 08:52:23 +1000 (AEST)","from authenticated.ozlabs.org (localhost [127.0.0.1])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPSA id 3xjLP32MV3z9s83;\n\tThu, 31 Aug 2017 08:52:23 +1000 (AEST)"],"From":"Michael Ellerman ","To":"Gregory Fong , linuxppc-dev@lists.ozlabs.org","Subject":"Re: mpic IRQ_TYPE_BOTH handling","In-Reply-To":"","References":"","User-Agent":"Notmuch/0.21 (https://notmuchmail.org)","Date":"Thu, 31 Aug 2017 08:52:21 +1000","Message-ID":"<87efrs8y8q.fsf@concordia.ellerman.id.au>","MIME-Version":"1.0","Content-Type":"text/plain","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"\"linux-kernel@vger.kernel.org\" ","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}},{"id":1763958,"web_url":"http://patchwork.ozlabs.org/comment/1763958/","msgid":"<59AFC126.30909@nxp.com>","date":"2017-09-06T09:34:31","subject":"Re: mpic IRQ_TYPE_BOTH handling","submitter":{"id":71003,"url":"http://patchwork.ozlabs.org/api/people/71003/","name":"Laurentiu Tudor","email":"laurentiu.tudor@nxp.com"},"content":"On 08/31/2017 01:52 AM, Michael Ellerman wrote:\n> Hi Gregory,\n>\n> Gregory Fong writes:\n>> Hi all,\n>>\n>> In arch/powerpc/sysdev/mpic.c , it looks like IRQ_TYPE_EDGE_BOTH is\n>> handled the same way as IRQ_TYPE_EDGE_FALLING:\n>>\n>> static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type)\n>> {\n>> /* Now convert sense value */\n>> switch(type & IRQ_TYPE_SENSE_MASK) {\n>> case IRQ_TYPE_EDGE_RISING:\n>> return MPIC_INFO(VECPRI_SENSE_EDGE) |\n>> MPIC_INFO(VECPRI_POLARITY_POSITIVE);\n>> case IRQ_TYPE_EDGE_FALLING:\n>> case IRQ_TYPE_EDGE_BOTH:\n>> return MPIC_INFO(VECPRI_SENSE_EDGE) |\n>> MPIC_INFO(VECPRI_POLARITY_NEGATIVE);\n>> case IRQ_TYPE_LEVEL_HIGH:\n>> return MPIC_INFO(VECPRI_SENSE_LEVEL) |\n>> MPIC_INFO(VECPRI_POLARITY_POSITIVE);\n>> case IRQ_TYPE_LEVEL_LOW:\n>> default:\n>> return MPIC_INFO(VECPRI_SENSE_LEVEL) |\n>> MPIC_INFO(VECPRI_POLARITY_NEGATIVE);\n>> }\n>> }\n>>\n>> If IRQ_TYPE_EDGE_BOTH is unsupported, shouldn't we be returning an\n>> error, instead of silently setting to use IRQ_TYPE_EDGE_FALLING?\n>> Something like the following (sorry if the diff wraps weirdly, on\n>> webmail at the moment):\n>\n> I don't know this code so I asked Ben and he said something like\n> \"PowerMacs never use BOTH, so it hasn't mattered, but Freescale machines\n> might\".\n\nIIRC, the mpic in freescale MPICs the interrupts are either low or high, \nso not both. There's a bit which controls the interrupt polarity which \nselects if the interrupt triggers on high-to-low or low-to-high.\nSo i guess it doesn't matter on freescale machines too.\n\n---\nBest Regards, Laurentiu","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xnJP22y62z9s3T\n\tfor ;\n\tWed, 6 Sep 2017 19:36:06 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xnJP21tjnzDqF7\n\tfor ;\n\tWed, 6 Sep 2017 19:36:06 +1000 (AEST)","from EUR01-DB5-obe.outbound.protection.outlook.com\n\t(mail-db5eur01on0058.outbound.protection.outlook.com [104.47.2.58])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xnJMK3qYPzDqF7\n\tfor ;\n\tWed, 6 Sep 2017 19:34:37 +1000 (AEST)","from VI1PR0401MB1856.eurprd04.prod.outlook.com (10.165.235.22) by\n\tVI1PR0401MB2496.eurprd04.prod.outlook.com (10.168.65.10) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.13.10; 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