[{"id":1442747,"web_url":"http://patchwork.ozlabs.org/comment/1442747/","msgid":"<20160831042100.GA3308@Asurada>","date":"2016-08-31T04:21:01","subject":"Re: Setting some clocks back to DUMMY fixes spdif output on imx6q\n\twandboard rev B1","submitter":{"id":36301,"url":"http://patchwork.ozlabs.org/api/people/36301/","name":"Nicolin Chen","email":"nicoleotsuka@gmail.com"},"content":"On Tue, Aug 30, 2016 at 01:14:14PM +0200, Xavi Drudis Ferran wrote:\n\n> linux-libre-4.7 without my patch, i.e. clocks defined like this :\n> arch/arm/boot/dts/imx6qdl.dtsi:\n> aips-bus@02000000 { /* AIPS1 */\n> [...]\n> spba-bus@02000000 {\n> [...]\n> spdif: spdif@02004000 {\n> clocks = <&clks IMX6QDL_CLK_SPDIF_GCLK>, <&clks IMX6QDL_CLK_OSC>,\n> <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_ASRC>,\n> <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_ESAI_EXTAL>,\n> <&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_MLB>,\n> <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_SPBA>;\n> clock-names = \"core\", \"rxtx0\",\n> \"rxtx1\", \"rxtx2\",\n> \"rxtx3\", \"rxtx4\",\n> \"rxtx5\", \"rxtx6\",\n> \"rxtx7\", \"spba\";\n> [...]\n\n> [ 9.376398] fsl-spdif-dai 2004000.spdif: use rxtx6 as tx clock source for 44100Hz sample rate\n> [ 9.376404] fsl-spdif-dai 2004000.spdif: use txclk df 94 for 44100Hz sample rate\n> [ 9.376409] fsl-spdif-dai 2004000.spdif: the best rate for 44100Hz sample rate is 43882Hz\n\nWithout your patch, it chose rxtx6 (MLB) as the source for 44.1KHz.\n\n> linux-libre-4.7 with my patch, i.e. clocks defined like this :\n> arch/arm/boot/dts/imx6qdl.dtsi:\n> aips-bus@02000000 { /* AIPS1 */\n> [...]\n> spba-bus@02000000 {\n> [...]\n> spdif: spdif@02004000 {\n> clocks = <&clks IMX6QDL_CLK_SPDIF_GCLK>, <&clks IMX6QDL_CLK_OSC>,\n> <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_DUMMY>,\n> <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_DUMMY>,\n> <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_DUMMY>,\n> <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_SPBA>;\n> clock-names = \"core\", \"rxtx0\",\n> \"rxtx1\", \"rxtx2\",\n> \"rxtx3\", \"rxtx4\",\n> \"rxtx5\", \"rxtx6\",\n> \"rxtx7\", \"spba\";\n> [...]\n\n> [ 6.662922] fsl-spdif-dai 2004000.spdif: use rxtx1 as tx clock source for 44100Hz sample rate\n> [ 6.662927] fsl-spdif-dai 2004000.spdif: use txclk df 9 for 44100Hz sample rate\n> [ 6.662932] fsl-spdif-dai 2004000.spdif: the best rate for 44100Hz sample rate is 43859Hz\n\nWith your patch, it selects rxtx1 (the dedicated SPDIF baud clock).\n\n> Does it mean that a 43859Hz clock is close enough to theoretical 44100Hz\n> but 43882Hz is not ? \n\nNo, the problem is not at the rate but the source -- Although the\nMLB clock exists in the clock tree as a better rate provider, it\nmight not be correctly enabled or running at the rate it claims.\n\n> Maybe there's something wrong with rxtx6 (IMX6QDL_CLK_MLB). This clock\n\nYes.\n\n> does not seem to be used elsewhere (I mean in files, it's used in any\n> board that includes imx6qdl.dtsi)\n> \n> \n> include/dt-bindings/clock/imx6qdl-clock.h: \n> #define IMX6QDL_CLK_MLB\t\t\t\t\t\t139\n \n> Might it have to do with the fact I'm using (still trying in fact) to use etnaviv ?\n> \n> drivers/clk/imx/clk-imx6q.c:\n> \n> if (clk_on_imx6dl())\n> /*\n> * The multiplexer and divider of the imx6q clock gpu2d get\n> * redefined/reused as mlb_sys_sel and mlb_sys_clk_podf on imx6dl.\n> */\n> clk[IMX6QDL_CLK_MLB] = imx_clk_gate2(\"mlb\", \"gpu2d_core_podf\", base + 0x74, 18);\n> else\n> clk[IMX6QDL_CLK_MLB] = imx_clk_gate2(\"mlb\", \"axi\", base + 0x74, 18);\n> \n> \n> But I'm on a imx6q not imx6dl .\n\nThere are five MLB clocks sharing the same clock gate according\nto CCM chapter in the Reference Manual of imx6q. But five clocks\ncome from three different parent clocks, and I am wondering if\nthe MLB clock that's connected to the S/PDIF module is really\nderived from this AXI.\n\nHope Fabio might be able to help on the clock tree issue here:)\n\n> --- linux-4.7-no-spdif-out/arch/arm/boot/dts/imx6qdl.dtsi\t2016-07-25 00:19:43.000000000 +0200\n> +++ linux-4.7/arch/arm/boot/dts/imx6qdl.dtsi\t2016-08-30 12:51:37.369431791 +0200\n> @@ -242,7 +242,7 @@\n> \t\t\t\t\tclocks = <&clks IMX6QDL_CLK_SPDIF_GCLK>, <&clks IMX6QDL_CLK_OSC>,\n> \t\t\t\t\t\t <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_ASRC>,\n> \t\t\t\t\t\t <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_ESAI_EXTAL>,\n> -\t\t\t\t\t\t <&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_MLB>,\n> +\t\t\t\t\t\t <&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_DUMMY>,\n\nAs MLB might be gated or not available at all, disabling it is a\nquick work around.\n \n> AFAICS it just uses rxtx5 (IMX6QDL_CLK_IPG) for 32KHz and gets a little closer to that. \n> But I haven't tried to play at 32KHz\n> \n> Is there anything else I can try ? \n\nAnother solution for you could be to change the rates of two of\nthose existing clocks to the perfect rates for 44.1KHz and 48KHz\nrespectively, 22579200Hz and 24576000Hz for example. (If you\nonly need one sample rate support, changing rxtx1 SPDIF clock\nonly then.)","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3sPC0n6txyz9s65\n\tfor ;\n\tWed, 31 Aug 2016 14:22:49 +1000 (AEST)","from ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3sPC0n2cR5zDrnd\n\tfor ;\n\tWed, 31 Aug 2016 14:22:49 +1000 (AEST)","from mail-pf0-x233.google.com (mail-pf0-x233.google.com\n\t[IPv6:2607:f8b0:400e:c00::233])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3sPBzB5Mf4zDrhy\n\tfor ;\n\tWed, 31 Aug 2016 14:21:25 +1000 (AEST)","by mail-pf0-x233.google.com with SMTP id p64so14941364pfb.1\n\tfor ;\n\tTue, 30 Aug 2016 21:21:25 -0700 (PDT)","from Asurada (c-73-231-2-134.hsd1.ca.comcast.net. [73.231.2.134])\n\tby smtp.gmail.com with ESMTPSA id\n\tb134sm60642968pfb.55.2016.08.30.21.21.23\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tTue, 30 Aug 2016 21:21:23 -0700 (PDT)"],"Authentication-Results":["ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com header.b=BOKWXIfR;\n\tdkim-atps=neutral","lists.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com header.b=BOKWXIfR;\n\tdkim-atps=neutral","lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com header.b=BOKWXIfR;\n\tdkim-atps=neutral"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113;\n\th=date:from:to:cc:subject:message-id:references:mime-version\n\t:content-disposition:in-reply-to:user-agent;\n\tbh=awp8Zva7CFU1CYo+l2BHGP9iFU7/lcKBmkCc03YmYgw=;\n\tb=BOKWXIfR2+5L4EcBKvdvmselkTalsXFZcjMfeMXOLMYpK3En1ZrTLWcIyu5geIV6RL\n\t3GdBylTDEE2GCxvtoQuvCPRTJ9FCn3MUvDJvFaDzyKTPvidpQsqI3O1UmMBgtsHkIEqV\n\tQOC09+oHLeGQIlONuQA3BEQiT4y5cQ0Gi8lnPOaqD/tcR6NCwf/XWvIPH5y2DYPgGPoW\n\tUlGHM4fkbKZL/hQ3QrQt2AqPvpX7E74Jni3SaQOCtGEdbkivVwCcRfnScaku3LbpjBZL\n\t0L5W60Qhpp3VDAbNS6NYnjibMZLFgWkwSfFF04pC7n7nWunGUNbzjb4MZqPpKCEe/+Ix\n\tviLg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20130820;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:in-reply-to:user-agent;\n\tbh=awp8Zva7CFU1CYo+l2BHGP9iFU7/lcKBmkCc03YmYgw=;\n\tb=C29C92UJzV/VTx3QKScjwpG1GI9NgQwc+57gOqlJNetPi1mQ8a1rG0tNJWVSRN8og4\n\trp6Z/AElbigvtJ5MxYASn81Fsqia3vhf+EkYFvXtSyO7qvUChpcAbd70k33HO7RoriDh\n\t7BR8iKtgMCt/3tVygqGeGLFj7Y9iHOPT5Udc7yNK+6ZNTDAeMm+PbyBAjhtAUrf02X8P\n\tH4i6iiHktLxQLRydOz/DzJhMA4fbv0K5h5Bt5ZWP12ac0J+HfDZ+xTi6e5g4soXjZRmA\n\tQkYt9DbHUom4MghiHF/cory6m5FerAydUwrmK1SPMdkqQHPI3Rtv81t8QD2U6816bRJA\n\tBXwQ==","X-Gm-Message-State":"AE9vXwM4/mMpDOQFMbJFzlXr+Dx2YVDY7MeTkJ9CXySDbiBvoTVmZ2IjQvxxVXhDJVuKXw==","X-Received":"by 10.98.73.131 with SMTP id r3mr13150981pfi.112.1472617284287; \n\tTue, 30 Aug 2016 21:21:24 -0700 (PDT)","Date":"Tue, 30 Aug 2016 21:21:01 -0700","From":"Nicolin Chen ","To":"Xavi Drudis Ferran ","Subject":"Re: Setting some clocks back to DUMMY fixes spdif output on imx6q\n\twandboard rev B1","Message-ID":"<20160831042100.GA3308@Asurada>","References":"<20160828160055.GA2122@begut>\n\t<20160829192820.GA14207@Asurada-Nvidia>\n\t<20160829195428.GD1967@begut> <20160830111414.GA1968@begut>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20160830111414.GA1968@begut>","User-Agent":"Mutt/1.5.22 (2013-10-16)","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.22","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Shengjiu Wang , alsa-devel@alsa-project.org,\n\tXiubo Li , Timur Tabi ,\n\tfabio.estevam@nxp.com, linuxppc-dev@lists.ozlabs.org","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}},{"id":1442946,"web_url":"http://patchwork.ozlabs.org/comment/1442946/","msgid":"<20160831091013.GA3185@begut>","date":"2016-08-31T09:10:13","subject":"Re: Setting some clocks back to DUMMY fixes spdif output on imx6q\n\twandboard rev B1","submitter":{"id":69793,"url":"http://patchwork.ozlabs.org/api/people/69793/","name":"Xavier Drudis Ferran","email":"xdrudis@tinet.cat"},"content":"El Tue, Aug 30, 2016 at 09:21:01PM -0700, Nicolin Chen deia:\n> \n> No, the problem is not at the rate but the source -- Although the\n> MLB clock exists in the clock tree as a better rate provider, it\n> might not be correctly enabled or running at the rate it claims.\n> \n\n> \n> There are five MLB clocks sharing the same clock gate according\n> to CCM chapter in the Reference Manual of imx6q. But five clocks\n> come from three different parent clocks, and I am wondering if\n> the MLB clock that's connected to the S/PDIF module is really\n> derived from this AXI.\n> \n> Hope Fabio might be able to help on the clock tree issue here:)\n>\n\nI hope too, it's a little over my head, to be euphemistic. \n\n> \n> Another solution for you could be to change the rates of two of\n> those existing clocks to the perfect rates for 44.1KHz and 48KHz\n> respectively, 22579200Hz and 24576000Hz for example. (If you\n> only need one sample rate support, changing rxtx1 SPDIF clock\n> only then.)\n\nThank you very much. I'm not sure what practical problem that would\nsolve for me, audio sounds quite right to my ears with the workaround\n(disabling MLB). I've looked page 121 of\nhttp://cache.freescale.com/files/32bit/doc/data_sheet/IMX6DQIEC.pdf\nAnd it seems like the the margin for the SPDIF clock would be 16 ns\nand I'm like 10 times out of spec. But I can't hear the problem. I\nmay try it one day to hear how it sounds.\n\nI'll try to remember it if I ever come across some problem with my audio.\nFor now what I'd like is to stay as close to linux-libre mainline \nas possible, so the quick workaround is enough for me. \n\nNow for the general case, I'm not sure what the solution should be.\nPage 4 of the pdf above says MLB is not present in industrial \"parts\",\nonly automotive, or consumer \"parts\". There are several versions of\nIMX6Q in the market. What version must I have ? I guess consumer\n(with MLB) but I'm not sure... According to the wandboard-quad-rev-b1\nmanual its consumer, MCIMX6Q5EYM10AC, so I should have MLB, I guess.\n\n$ cat /proc/cpuinfo \nprocessor\t : 0\nmodel name\t : ARMv7 Processor rev 10 (v7l)\nBogoMIPS\t : 7.54\nFeatures\t : half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpd32 \nCPU implementer\t : 0x41\nCPU architecture: 7\nCPU variant\t : 0x2\nCPU part\t : 0xc09\nCPU revision\t : 10\n[...]\n\nI can't tell what CPU part : 0xc09 means.\n\nIn the reference manual pg 796 I see the same gate seems to affect Media\nLocal Bus (MLB) clock and Digital Transmission Content Protection\n(DTCP). I don't use DTCP but I haven't done anything to disable it.\n\nhttp://www.nxp.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf?fasp=1&WT_TYPE=Reference%20Manuals&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Documentation&fileExt=.pdf\n\n\nThanks again, you've been very helpful.","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3sPKPp5CjHz9sdn\n\tfor ;\n\tWed, 31 Aug 2016 19:11:26 +1000 (AEST)","from ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3sPKPp4S4xzDrq0\n\tfor ;\n\tWed, 31 Aug 2016 19:11:26 +1000 (AEST)","from mx2.tinet.org (mx2.tinet.org [195.77.216.147])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3sPKNb5ljyzDrhc\n\tfor ;\n\tWed, 31 Aug 2016 19:10:23 +1000 (AEST)","from smtp01.tinet.org (smtp01.tinet.org [195.77.216.131]) by\n\tmx2.tinet.org with ESMTP id YTYg0z6pOlfm1XqX for\n\t;\n\tWed, 31 Aug 2016 11:10:16 +0200 (CEST)","(qmail 912 invoked from network); 31 Aug 2016 09:10:15 -0000","from 4.red-81-38-76.dynamicip.rima-tde.net (HELO begut)\n\t(xdrudis@[81.38.76.4]) (envelope-sender )\n\tby smtp01.tinet.org (qmail-ldap-1.03) with SMTP\n\tfor ; 31 Aug 2016 09:10:15 -0000","from xdrudis by begut with local (Exim 4.84_2)\n\t(envelope-from )\n\tid 1bf1XC-0000zz-Jj; Wed, 31 Aug 2016 11:10:14 +0200"],"X-ASG-Debug-ID":"1472634616-069e0e633b1e22b0001-v7v7hK","X-Barracuda-Envelope-From":"xdrudis@tinet.cat","X-Barracuda-Effective-Source-IP":"smtp01.tinet.org[195.77.216.131]","X-Barracuda-Apparent-Source-IP":"195.77.216.131","Date":"Wed, 31 Aug 2016 11:10:13 +0200","From":"Xavi Drudis Ferran ","To":"Nicolin Chen ","Subject":"Re: Setting some clocks back to DUMMY fixes spdif output on imx6q\n\twandboard rev B1","Message-ID":"<20160831091013.GA3185@begut>","X-ASG-Orig-Subj":"Re: Setting some clocks back to DUMMY fixes spdif output on\n\timx6q wandboard rev B1","References":"<20160828160055.GA2122@begut>\n\t<20160829192820.GA14207@Asurada-Nvidia>\n\t<20160829195428.GD1967@begut> <20160830111414.GA1968@begut>\n\t<20160831042100.GA3308@Asurada>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20160831042100.GA3308@Asurada>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-Barracuda-Connect":"smtp01.tinet.org[195.77.216.131]","X-Barracuda-Start-Time":"1472634616","X-Barracuda-URL":"https://webmail.tinet.cat:443/cgi-mod/mark.cgi","X-Barracuda-Scan-Msg-Size":"2827","X-Barracuda-BRTS-Status":"1","X-Virus-Scanned":"by bsmtpd at tinet.org","X-Barracuda-Bayes":"INNOCENT GLOBAL 0.5302 1.0000 0.7500","X-Barracuda-Spam-Score":"0.75","X-Barracuda-Spam-Status":"No,\n\tSCORE=0.75 using global scores of TAG_LEVEL=1000.0\n\tQUARANTINE_LEVEL=6.0 KILL_LEVEL=8.0 tests=BSF_SC0_MISMATCH_TO","X-Barracuda-Spam-Report":"Code version 3.2, rules version 3.2.3.32484\n\tRule breakdown below\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t0.00 BSF_SC0_MISMATCH_TO Envelope rcpt doesn't match header","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.22","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Shengjiu Wang ,\n\tXavi Drudis Ferran , alsa-devel@alsa-project.org, \n\tXiubo Li , Timur Tabi ,\n\tfabio.estevam@nxp.com, linuxppc-dev@lists.ozlabs.org","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}}]