[{"id":3688721,"web_url":"http://patchwork.ozlabs.org/comment/3688721/","msgid":"","list_archive_url":null,"date":"2026-05-08T20:42:38","subject":"Re: [PATCH 4/4] hw/display/exynos4210_fimd: Assume display surface is\n 32bpp","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"content":"On 5/8/26 11:20, Peter Maydell wrote:\n> For a long time QEMU has guaranteed that the console surface is 32bpp\n> and not anything else. This old display device still has code\n> assuming it might be something else. Remove the code that made\n> put_pixel_toqemu a function pointer indirection, and use\n> put_to_qemufb_pixel32() directly.\n> \n> This removes the last hw_error() in this file.\n> \n> Signed-off-by: Peter Maydell\n> ---\n> hw/display/exynos4210_fimd.c | 62 ++----------------------------------\n> 1 file changed, 2 insertions(+), 60 deletions(-)\n\nReviewed-by: Richard Henderson \n\nr~","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=gg7Sdbs9;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4gC1LR6WKCz1yHW\n\tfor ; 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