[{"id":3688596,"web_url":"http://patchwork.ozlabs.org/comment/3688596/","msgid":"","list_archive_url":null,"date":"2026-05-08T16:40:22","subject":"Re: [PATCH v4 1/2] usb: xhci-pci: add AMD Promontory 21 PCI glue","submitter":{"id":81779,"url":"http://patchwork.ozlabs.org/api/people/81779/","name":"Mario Limonciello","email":"Mario.Limonciello@amd.com"},"content":"On 5/8/26 09:39, Jihong Min wrote:\n> AMD Promontory 21 (PROM21) xHCI controllers use generic xHCI\n> operation, but the PCI function also exposes optional\n> controller-specific sensor functionality. Add a small PROM21 PCI glue\n> driver for AMD 1022:43fd controllers.\n> \n> The driver delegates USB host operation to the common xhci-pci core and\n> creates a \"hwmon\" auxiliary device for optional child drivers. Failure\n> to create the auxiliary device is logged but does not fail the xHCI\n> probe, since the auxiliary device is only needed for sensor support.\n> \n> Keep the PROM21 PCI glue built-in only when enabled because it owns the\n> PCI binding for PROM21 xHCI controllers and must be available whenever\n> the common built-in xhci-pci driver hands those controllers off. This\n> avoids an early boot case where generic xhci-pci rejects a PROM21\n> controller but a modular xhci-pci-prom21 driver is not available in the\n> initramfs, leaving USB devices behind that controller unavailable.\n> \n> Assisted-by: Codex:gpt-5.5\n> Signed-off-by: Jihong Min \n> ---\n> drivers/usb/host/Kconfig | 18 +++++\n> drivers/usb/host/Makefile | 1 +\n> drivers/usb/host/xhci-pci-prom21.c | 111 +++++++++++++++++++++++++++++\n> drivers/usb/host/xhci-pci.c | 11 +++\n> 4 files changed, 141 insertions(+)\n> create mode 100644 drivers/usb/host/xhci-pci-prom21.c\n> \n> diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig\n> index 0a277a07cf70..74eedef1440d 100644\n> --- a/drivers/usb/host/Kconfig\n> +++ b/drivers/usb/host/Kconfig\n> @@ -42,6 +42,24 @@ config USB_XHCI_PCI\n> \tdepends on USB_PCI\n> \tdefault y\n> \n> +config USB_XHCI_PCI_PROM21\n> +\tbool \"AMD Promontory 21 xHCI PCI support\"\n> +\tdepends on USB_XHCI_PCI=y\n> +\tselect AUXILIARY_BUS\n> +\thelp\n> +\t Say 'Y' to enable support for the AMD Promontory 21 xHCI PCI\n> +\t controller with optional sensor support. This driver does not add\n> +\t PROM21-specific USB or xHCI operation. It binds PROM21 xHCI PCI\n> +\t functions, delegates USB host operation to the common xHCI PCI core,\n> +\t and creates auxiliary devices for optional sensor drivers.\n> +\n> +\t This driver is built-in only because it owns the PCI binding for\n> +\t PROM21 xHCI controllers when enabled and must be available whenever\n> +\t the common xHCI PCI driver is available. The optional sensor driver\n> +\t can still be built as a module.\n> +\n> +\t If unsure, say 'N'.\n> +\n> config USB_XHCI_PCI_RENESAS\n> \ttristate \"Support for additional Renesas xHCI controller with firmware\"\n> \tdepends on USB_XHCI_PCI\n> diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile\n> index a07e7ba9cd53..174580c1281a 100644\n> --- a/drivers/usb/host/Makefile\n> +++ b/drivers/usb/host/Makefile\n> @@ -71,6 +71,7 @@ obj-$(CONFIG_USB_UHCI_HCD)\t+= uhci-hcd.o\n> obj-$(CONFIG_USB_FHCI_HCD)\t+= fhci.o\n> obj-$(CONFIG_USB_XHCI_HCD)\t+= xhci-hcd.o\n> obj-$(CONFIG_USB_XHCI_PCI)\t+= xhci-pci.o\n> +obj-$(CONFIG_USB_XHCI_PCI_PROM21)\t+= xhci-pci-prom21.o\n> obj-$(CONFIG_USB_XHCI_PCI_RENESAS)\t+= xhci-pci-renesas.o\n> obj-$(CONFIG_USB_XHCI_PLATFORM) += xhci-plat-hcd.o\n> obj-$(CONFIG_USB_XHCI_HISTB)\t+= xhci-histb.o\n> diff --git a/drivers/usb/host/xhci-pci-prom21.c b/drivers/usb/host/xhci-pci-prom21.c\n> new file mode 100644\n> index 000000000000..7354a898732e\n> --- /dev/null\n> +++ b/drivers/usb/host/xhci-pci-prom21.c\n> @@ -0,0 +1,111 @@\n> +// SPDX-License-Identifier: GPL-2.0\n> +/*\n> + * AMD Promontory 21 xHCI host controller PCI Bus Glue.\n> + *\n> + * This does not add any PROM21-specific USB or xHCI operation. It exists only\n> + * to publish an auxiliary device for integrated temperature sensor support.\n> + *\n> + * Copyright (C) 2026 Jihong Min \n> + */\n> +\n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +\n> +#include \"xhci-pci.h\"\n> +\n> +struct prom21_xhci_auxdev {\n> +\tstruct auxiliary_device *auxdev;\n> +};\n> +\n> +static void prom21_xhci_auxdev_release(struct device *dev, void *res)\n> +{\n> +\tstruct prom21_xhci_auxdev *prom21_auxdev = res;\n> +\n> +\tauxiliary_device_destroy(prom21_auxdev->auxdev);\n> +}\n> +\n> +static int prom21_xhci_create_auxdev(struct pci_dev *pdev)\n> +{\n> +\tstruct prom21_xhci_auxdev *prom21_auxdev;\n> +\n> +\tprom21_auxdev = devres_alloc(prom21_xhci_auxdev_release,\n> +\t\t\t\t sizeof(*prom21_auxdev), GFP_KERNEL);\n> +\tif (!prom21_auxdev)\n> +\t\treturn -ENOMEM;\n> +\n> +\tprom21_auxdev->auxdev =\n> +\t\tauxiliary_device_create(&pdev->dev, KBUILD_MODNAME, \"hwmon\",\n> +\t\t\t\t\tNULL, (pci_domain_nr(pdev->bus) << 16) |\n> +\t\t\t\t\t\t pci_dev_id(pdev));\n> +\tif (!prom21_auxdev->auxdev) {\n> +\t\tdevres_free(prom21_auxdev);\n> +\t\treturn -ENOMEM;\n> +\t}\n> +\n> +\tdevres_add(&pdev->dev, prom21_auxdev);\n> +\treturn 0;\n> +}\n> +\n> +static void prom21_xhci_destroy_auxdev(struct pci_dev *pdev)\n> +{\n> +\tdevres_release(&pdev->dev, prom21_xhci_auxdev_release, NULL, NULL);\n> +}\n> +\n> +static int prom21_xhci_probe(struct pci_dev *dev,\n> +\t\t\t const struct pci_device_id *id)\n> +{\n> +\tint retval;\n> +\n> +\tretval = xhci_pci_common_probe(dev, id);\n> +\tif (retval)\n> +\t\treturn retval;\n> +\n> +\tretval = prom21_xhci_create_auxdev(dev);\n> +\tif (retval) {\n> +\t\t/*\n> +\t\t * The auxiliary device only provides optional temperature sensor\n> +\t\t * support. Keep the xHCI controller usable if it fails.\n> +\t\t */\n> +\t\tdev_err(&dev->dev,\n> +\t\t\t\"failed to create PROM21 hwmon auxiliary device: %d\\n\",\n> +\t\t\tretval);\n> +\t}\n> +\n> +\treturn 0;\n> +}\n> +\n> +static void prom21_xhci_remove(struct pci_dev *dev)\n> +{\n> +\tprom21_xhci_destroy_auxdev(dev);\n> +\txhci_pci_remove(dev);\n> +}\n> +\n> +static const struct pci_device_id pci_ids[] = {\n> +\t{ PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x43fd) }, /* PROM21 xHCI */\n> +\t{ /* end: all zeroes */ }\n> +};\n> +MODULE_DEVICE_TABLE(pci, pci_ids);\n> +\n> +static struct pci_driver prom21_xhci_driver = {\n> +\t.name = \"xhci-pci-prom21\",\n> +\t.id_table = pci_ids,\n> +\n> +\t.probe = prom21_xhci_probe,\n> +\t.remove = prom21_xhci_remove,\n> +\n> +\t.shutdown = usb_hcd_pci_shutdown,\n> +\t.driver = {\n> +\t\t.pm = pm_ptr(&usb_hcd_pci_pm_ops),\n> +\t},\n> +};\n> +module_pci_driver(prom21_xhci_driver);\n> +\n> +MODULE_DESCRIPTION(\"AMD Promontory 21 xHCI PCI Host Controller Driver\");\n> +MODULE_IMPORT_NS(\"xhci\");\n> +MODULE_LICENSE(\"GPL\");\n> diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c\n> index 585b2f3117b0..5db427ad0422 100644\n> --- a/drivers/usb/host/xhci-pci.c\n> +++ b/drivers/usb/host/xhci-pci.c\n> @@ -84,6 +84,7 @@\n> #define PCI_DEVICE_ID_AMD_PROMONTORYA_3\t\t\t0x43ba\n> #define PCI_DEVICE_ID_AMD_PROMONTORYA_2\t\t\t0x43bb\n> #define PCI_DEVICE_ID_AMD_PROMONTORYA_1\t\t\t0x43bc\n> +#define PCI_DEVICE_ID_AMD_PROM21_XHCI\t\t\t0x43fd\n\nThis define should be in a common header used by xhci-pci.c and \nxhci-pci-prom21.c both.\n\n> \n> #define PCI_DEVICE_ID_ATI_NAVI10_7316_XHCI\t\t0x7316\n> \n> @@ -696,12 +697,22 @@ static const struct pci_device_id pci_ids_renesas[] = {\n> \t{ /* end: all zeroes */ }\n> };\n> \n> +/* handled by xhci-pci-prom21 if enabled */\n> +static const struct pci_device_id pci_ids_prom21[] = {\n> +\t{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_PROM21_XHCI) },\n> +\t{ /* end: all zeroes */ }\n> +};\n> +\n> static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)\n> {\n> \tif (IS_ENABLED(CONFIG_USB_XHCI_PCI_RENESAS) &&\n> \t\t\tpci_match_id(pci_ids_renesas, dev))\n> \t\treturn -ENODEV;\n> \n> +\tif (IS_ENABLED(CONFIG_USB_XHCI_PCI_PROM21) &&\n> +\t pci_match_id(pci_ids_prom21, dev))\n> +\t\treturn -ENODEV;\n> +\n> \treturn xhci_pci_common_probe(dev, id);\n> }\n>","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256\n header.s=selector1 header.b=HqdSthh5;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-54266-incoming=patchwork.ozlabs.org@vger.kernel.org;\n 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Basavaraj Natikar , linux-usb@vger.kernel.org,\n linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org,\n linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org","References":"<20260508143910.14673-1-hurryman2212@gmail.com>\n <20260508143910.14673-2-hurryman2212@gmail.com>","From":"Mario Limonciello ","In-Reply-To":"<20260508143910.14673-2-hurryman2212@gmail.com>","Content-Type":"text/plain; charset=UTF-8; format=flowed","Content-Transfer-Encoding":"7bit","X-ClientProxiedBy":"SN6PR2101CA0017.namprd21.prod.outlook.com\n (2603:10b6:805:106::27) To SA0PR12MB4557.namprd12.prod.outlook.com\n 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Min","email":"hurryman2212@icloud.com"},"content":"> This define should be in a common header used by xhci-pci.c and\n > xhci-pci-prom21.c both.\n\nAgreed. I moved PCI_DEVICE_ID_AMD_PROM21_XHCI to xhci-pci.h so both\nxhci-pci.c and xhci-pci-prom21.c use the same definition.\n\nSincerely,\nJihong Min","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=icloud.com header.i=@icloud.com header.a=rsa-sha256\n header.s=1a1hai header.b=w202iOzK;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-54272-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=icloud.com header.i=@icloud.com\n header.b=\"w202iOzK\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=57.103.79.73","smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=icloud.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=icloud.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4gBxGv36ckz1yJq\n\tfor ; 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charset=UTF-8; format=flowed","Content-Transfer-Encoding":"7bit","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNTA4MDE3NiBTYWx0ZWRfXzpmF9wrpzXTu\n tKBf77DhhCB1nYMVNDDZuQeaVROUmEBwh1picBLd97Q7N3PxRCwJk0cVS8FUWn+CPtM0n/FPTpT\n qnW1OK4Mb6kD7pYEToaxwujvE4uyxo1IEa76s4sL1eg+3gBCIW6j/wa482AKWV4AfQSsBZ/WgA4\n kEsHMZ3bq3cXrAPsgbqzeCFp6Hrj0Jk1C8tMGwNDaYN+eeaFWYdyCw5Eo2zc7z0sKC4h0khRHtq\n WMLP7kQ9JaNfaGh/QzZ/cSnV6px58e6aShM4xysHe9U28gPV2zr68uTMW/WRtmC9EKQ7qYqu7/l\n 4E0ldtbKBEHjiR/lft3pQkvSt4x/iGJasA118PPvlJMFWlM7TwmUyoSdn1mP7Y=","X-Authority-Info-Out":"v=2.4 cv=Sbb6t/Ru c=1 sm=1 tr=0 ts=69fe1fe6\n cx=c_apl:c_pps:t_out a=YrL12D//S6tul8v/L+6tKg==:117\n a=YrL12D//S6tul8v/L+6tKg==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10\n a=x7bEGLp0ZPQA:10 a=5jDBv52wX64A:10 a=VkNPw1HP01LnGYTKEx00:22\n a=c1yG8o5ftu5EqDgq3rYA:9 a=QEXdDO2ut3YA:10 a=PgRulw5oR9JgysbTFEid:22\n a=oa2-kN79Xhin27rcel9q:22","X-Proofpoint-GUID":"BMNQUzgsUv3Sd3p2K5uLoLAzvfwkxk6T","X-Proofpoint-ORIG-GUID":"BMNQUzgsUv3Sd3p2K5uLoLAzvfwkxk6T"}},{"id":3688647,"web_url":"http://patchwork.ozlabs.org/comment/3688647/","msgid":"<966c9e07-10e6-4abe-9cb5-77b974f31302@amd.com>","list_archive_url":null,"date":"2026-05-08T17:42:04","subject":"Re: [PATCH v4 1/2] usb: xhci-pci: add AMD Promontory 21 PCI glue","submitter":{"id":81779,"url":"http://patchwork.ozlabs.org/api/people/81779/","name":"Mario Limonciello","email":"Mario.Limonciello@amd.com"},"content":"On 5/8/26 12:39, Jihong Min wrote:\n> > This define should be in a common header used by xhci-pci.c and\n> > xhci-pci-prom21.c both.\n> \n> Agreed. I moved PCI_DEVICE_ID_AMD_PROM21_XHCI to xhci-pci.h so both\n> xhci-pci.c and xhci-pci-prom21.c use the same definition.\n> \n> Sincerely,\n> Jihong Min\n> \n\nSomething else I was thinking about while reviewing this series.\n\nPromontory 21 is only on AMD platforms and AMD platforms are only x86. \nI think the Kconfig should be conditional on AMD CPU support being \nenabled and X86 architecture so that we don't bloat other architectures \nwith dead code that will never run.","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256\n header.s=selector1 header.b=IeJyE5yn;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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a74c9945-ca0b-4d4c-fa83-08dead292012","X-MS-Exchange-CrossTenant-AuthSource":"SA0PR12MB4557.namprd12.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"08 May 2026 17:42:07.8593\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"3dd8961f-e488-4e60-8e11-a82d994e183d","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n YC/tITJvygaRqUWoYlD00ectm83OeClX2gR1ceN/Pk2olja2JVVBoxs1NUgRiXZukzOfYZKDWv6a+GqAIwTvDg==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"CYXPR12MB9337"}},{"id":3688650,"web_url":"http://patchwork.ozlabs.org/comment/3688650/","msgid":"","list_archive_url":null,"date":"2026-05-08T17:48:35","subject":"Re: [PATCH v4 1/2] usb: xhci-pci: add AMD Promontory 21 PCI glue","submitter":{"id":93350,"url":"http://patchwork.ozlabs.org/api/people/93350/","name":"Jihong Min","email":"hurryman2212@icloud.com"},"content":"> Something else I was thinking about while reviewing this series.\n>\n> Promontory 21 is only on AMD platforms and AMD platforms are only x86. \n> I think the Kconfig should be conditional on AMD CPU support being \n> enabled and X86 architecture so that we don't bloat other \n> architectures with dead code that will never run.\nAgreed. PROM21 is AMD x86 platform-specific, so I will add X86 and\nCPU_SUP_AMD dependencies to USB_XHCI_PCI_PROM21 for v5.\n\nSincerely,\nJihong Min","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=icloud.com header.i=@icloud.com header.a=rsa-sha256\n header.s=1a1hai header.b=P0rY+qLi;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-54275-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=icloud.com header.i=@icloud.com\n header.b=\"P0rY+qLi\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=57.103.79.121","smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=icloud.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=icloud.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4gBxZ812hYz1yCg\n\tfor ; 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charset=UTF-8; format=flowed","Content-Transfer-Encoding":"7bit","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNTA4MDE3OCBTYWx0ZWRfX935Lm/qcOlJ4\n Wd9FC7bHZcNIWRmEu4awLvUwSbEm2uMLs//2yZT8sgY4kYWdfpnwgSmELukQA0CfCZ4bUuVuD0Z\n U+k/FjEfI8w/y0wKB+QhldIyZ1X1/5RtVcxAOGQQXndpLxzrt/yF6RADdaMcM4j1of9vEBdDg5g\n g6tzmp/kz5P8i872ylvf4UjnucFwADrfm1DKeJcE5z9yxsKd4FS5bAQTofOjT4XOLuIqQS8NRHb\n XMmWo06QZmHmKYbEnJOCbxx8WV1a2ArLy2Af4qhzA2V8lbbAvuT5uSK57oZsgMiFd4+hvPcv94o\n euha7GuwlZHsxJyRk3WkUIOWQ+xwFljM5rpmL/xL/HyPmrhFHfxx9TvEQSTx6I=","X-Proofpoint-GUID":"Cd0ZLK5VeTSlOhUfl_RtlPeOkMoRsz_y","X-Proofpoint-ORIG-GUID":"Cd0ZLK5VeTSlOhUfl_RtlPeOkMoRsz_y","X-Authority-Info-Out":"v=2.4 cv=GJ4F0+NK c=1 sm=1 tr=0 ts=69fe21f8\n cx=c_apl:c_pps:t_out a=YrL12D//S6tul8v/L+6tKg==:117\n a=YrL12D//S6tul8v/L+6tKg==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10\n a=x7bEGLp0ZPQA:10 a=5jDBv52wX64A:10 a=VkNPw1HP01LnGYTKEx00:22\n a=W5yn_su87cR4V-zVC3gA:9 a=QEXdDO2ut3YA:10 a=PgRulw5oR9JgysbTFEid:22\n a=oa2-kN79Xhin27rcel9q:22"}},{"id":3688664,"web_url":"http://patchwork.ozlabs.org/comment/3688664/","msgid":"<2657e1b7-126d-4c4b-8027-012a6d3ffee3@icloud.com>","list_archive_url":null,"date":"2026-05-08T18:11:01","subject":"Re: [PATCH v4 1/2] usb: xhci-pci: add AMD Promontory 21 PCI glue","submitter":{"id":93350,"url":"http://patchwork.ozlabs.org/api/people/93350/","name":"Jihong Min","email":"hurryman2212@icloud.com"},"content":">> Something else I was thinking about while reviewing this series.\n>>\n>> Promontory 21 is only on AMD platforms and AMD platforms are only \n>> x86. I think the Kconfig should be conditional on AMD CPU support \n>> being enabled and X86 architecture so that we don't bloat other \n>> architectures with dead code that will never run.\nOne related Kconfig question: would it be acceptable to make\nUSB_XHCI_PCI_PROM21 default y with the X86 && CPU_SUP_AMD dependency?\n\nThis would only default-enable the PROM21 xHCI PCI glue. The hwmon driver\nwould still be controlled separately by SENSORS_PROM21_XHCI and would remain\nopt-in, so the undocumented temperature register polling would not be \nenabled\nby default.\n\nThe concern is that, without default y, distribution configs may miss the\nPROM21 PCI glue and then SENSORS_PROM21_XHCI can not bind even if the hwmon\ndriver itself is enabled or available as a module.\n\nWould you prefer this, or should USB_XHCI_PCI_PROM21 remain explicitly \nenabled\nby distributions?\n\nSincerely,\nJihong Min","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=icloud.com header.i=@icloud.com header.a=rsa-sha256\n header.s=1a1hai header.b=nkFuTMQD;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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charset=UTF-8; format=flowed","Content-Transfer-Encoding":"7bit","X-Proofpoint-ORIG-GUID":"sl9rJsX7eR6qgLM1qVLBH4gVb3t01cp7","X-Authority-Info-Out":"v=2.4 cv=f79FxeyM c=1 sm=1 tr=0 ts=69fe273c\n cx=c_apl:c_pps:t_out a=qkKslKyYc0ctBTeLUVfTFg==:117 a=IkcTkHD0fZMA:10\n a=NGcC8JguVDcA:10 a=x7bEGLp0ZPQA:10 a=5jDBv52wX64A:10\n a=VkNPw1HP01LnGYTKEx00:22 a=cZtEhlklJ10v6u5TLhAA:9 a=QEXdDO2ut3YA:10","X-Proofpoint-GUID":"sl9rJsX7eR6qgLM1qVLBH4gVb3t01cp7","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNTA4MDE4MiBTYWx0ZWRfX+B2wgVjg2Q/r\n RNN4afRGFiweI7ch7aU7gk8wbXXDLe7vpVXTQNRBqgetOdAFvRiXZ9ra0bHEAv7FsvjsFaa52UR\n aMDmjdnMfYNec17kLaG1ZkJqUN3q/IVNmIHbhsVX1ZU1VbAq5oIK2S3EV1HayXWpchk75te3iek\n plxGGzivtAbYTEQ9QV/4SS6r0GMsBeRNOsgYI2E3dmn5U1pQLMutx00UVOdI1hlY9pMjQm2wYef\n Y3inbE7domPmONMWSIDhZTF19tnOM68r5sZ8BBZ6wUOnY66gS0qtQMVSUVPhxlsiBMrB9Idfzww\n LeRFlbox0YGi6iTwrG57y60ahU/owMXgxl98lm/hFHDjG5s184IaQFpHBZHBIg="}},{"id":3688667,"web_url":"http://patchwork.ozlabs.org/comment/3688667/","msgid":"<053b019e-9c6a-4eb3-aa69-0c07cd6e7f12@roeck-us.net>","list_archive_url":null,"date":"2026-05-08T18:15:59","subject":"Re: [PATCH v4 1/2] usb: xhci-pci: add AMD Promontory 21 PCI glue","submitter":{"id":21889,"url":"http://patchwork.ozlabs.org/api/people/21889/","name":"Guenter Roeck","email":"linux@roeck-us.net"},"content":"On 5/8/26 11:11, Jihong Min wrote:\n>>> Something else I was thinking about while reviewing this series.\n>>>\n>>> Promontory 21 is only on AMD platforms and AMD platforms are only x86. I think the Kconfig should be conditional on AMD CPU support being enabled and X86 architecture so that we don't bloat other architectures with dead code that will never run.\n> One related Kconfig question: would it be acceptable to make\n> USB_XHCI_PCI_PROM21 default y with the X86 && CPU_SUP_AMD dependency?\n> \n> This would only default-enable the PROM21 xHCI PCI glue. The hwmon driver\n> would still be controlled separately by SENSORS_PROM21_XHCI and would remain\n> opt-in, so the undocumented temperature register polling would not be enabled\n> by default.\n> \n> The concern is that, without default y, distribution configs may miss the\n> PROM21 PCI glue and then SENSORS_PROM21_XHCI can not bind even if the hwmon\n> driver itself is enabled or available as a module.\n> \n> Would you prefer this, or should USB_XHCI_PCI_PROM21 remain explicitly enabled\n> by distributions?\n> \n\nHow about \"default USB_XHCI_PCI\" ?\n\nGuenter","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=NfM8b4LV;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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charset=UTF-8; format=flowed","Content-Transfer-Encoding":"7bit"}},{"id":3688672,"web_url":"http://patchwork.ozlabs.org/comment/3688672/","msgid":"","list_archive_url":null,"date":"2026-05-08T18:39:17","subject":"Re: [PATCH v4 1/2] usb: xhci-pci: add AMD Promontory 21 PCI glue","submitter":{"id":93350,"url":"http://patchwork.ozlabs.org/api/people/93350/","name":"Jihong Min","email":"hurryman2212@icloud.com"},"content":"> How about \"default USB_XHCI_PCI\" ?\n>\n> Guenter\nThat makes sense. I changed USB_XHCI_PCI_PROM21 to use\n\n   default USB_XHCI_PCI\n\nlocally.\n\nSincerely,\nJihong Min","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=icloud.com header.i=@icloud.com header.a=rsa-sha256\n header.s=1a1hai header.b=tEEhhB/F;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-54279-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=icloud.com header.i=@icloud.com\n header.b=\"tEEhhB/F\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=57.103.78.148","smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=icloud.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=icloud.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4gByZr1FTxz1yCg\n\tfor ; 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charset=UTF-8; format=flowed","Content-Transfer-Encoding":"8bit","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNTA4MDE4NiBTYWx0ZWRfX5l+nXdPZIG85\n 0vN+HkQohTFxE1W0vt+9a8Hok4QWjMOj5Kkg/hw3id43Nj81o3EznIxSnSteykA328i+BBWBMsw\n kZcb6ia2jqxFeuZ7/Ab9KLwrQOLyZN90OctDd5+Mk+boB5jNTBJ1uyEK3wR/mIeoesKuqTD++Pr\n Zd/PS+qoasJII2h3vZ9BEaB3L4vICxy+Lm3atWXyJYHwIPkqeLxlQRDMWad+fXqnW05gwdcMkzE\n cZ27s/+E5Dc3K7TYZYfUgA3iGIh4A+xhoQpi3q66ggx2UWoxlL2yQn6EGaMgfvB3DkCIXbiHajM\n seuAVvNp40C+oIjpvO4BNAL9p5DjHK8GNeU5u1KPf0xTnCDSamcekEAgSOoEBY=","X-Authority-Info-Out":"v=2.4 cv=eb4wvrEH c=1 sm=1 tr=0 ts=69fe2ddc\n cx=c_apl:c_pps:t_out a=YrL12D//S6tul8v/L+6tKg==:117\n a=YrL12D//S6tul8v/L+6tKg==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10\n a=x7bEGLp0ZPQA:10 a=5jDBv52wX64A:10 a=VkNPw1HP01LnGYTKEx00:22\n a=KVoNWVYdi2H2b-9ruPcA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10\n a=PgRulw5oR9JgysbTFEid:22 a=oa2-kN79Xhin27rcel9q:22","X-Proofpoint-GUID":"uGSqubEKY4K-OAH_rpyAlLQCnNopeudA","X-Proofpoint-ORIG-GUID":"uGSqubEKY4K-OAH_rpyAlLQCnNopeudA"}},{"id":3688809,"web_url":"http://patchwork.ozlabs.org/comment/3688809/","msgid":"","list_archive_url":null,"date":"2026-05-09T05:34:52","subject":"Re: [PATCH v4 1/2] usb: xhci-pci: add AMD Promontory 21 PCI glue","submitter":{"id":93350,"url":"http://patchwork.ozlabs.org/api/people/93350/","name":"Jihong Min","email":"hurryman2212@icloud.com"},"content":"On 5/9/26, Mario Limonciello wrote:\n > Promontory 21 is only on AMD platforms and AMD platforms are only x86.\n > I think the Kconfig should be conditional on AMD CPU support being\n > enabled and X86 architecture so that we don't bloat other architectures\n > with dead code that will never run.\n\nI agree with limiting this to x86, and I changed the current branch in that\ndirection.\n\nOne detail I would like to double-check is whether CPU_SUP_AMD should \nalso be\npart of the dependency, or whether X86 alone would be more accurate for the\nPCI glue.\n\nThe PROM21 xHCI function is still a PCI device. I found one public \nexample of\na B650/PROM21-based PCIe add-in card design which is reported to work in \nboth\nAMD and Intel systems:\n\nhttps://www.tomshardware.com/pc-components/chipsets/pcie-card-unlocks-amd-chipset-power-on-intel-motherboards-or-you-can-turn-any-b650-motherboard-into-an-x670-one\n\nThat is clearly a niche/community hardware case, not a normal AMD platform,\nand I do not want to over-weight it. But it made me wonder if:\n\n   depends on X86\n\nwould be the more accurate dependency than:\n\n   depends on X86 && CPU_SUP_AMD\n\nfor a PCI-attached PROM21 xHCI controller. The option would still use:\n\n   default USB_XHCI_PCI\n\nand the hwmon sensor driver would still stay behind its own\nSENSORS_PROM21_XHCI option.\n\nI am fine keeping CPU_SUP_AMD if you prefer; I just wanted to check before\nlocking that part in for v5.\n\nSincerely,\nJihong Min","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=icloud.com header.i=@icloud.com header.a=rsa-sha256\n header.s=1a1hai header.b=Fpwx5TJn;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-54311-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=icloud.com header.i=@icloud.com\n header.b=\"Fpwx5TJn\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=57.103.74.209","smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=icloud.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=icloud.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4gCF7G2hqXz1yCg\n\tfor ; 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I found one public \n> example of\n> a B650/PROM21-based PCIe add-in card design which is reported to work in \n> both\n> AMD and Intel systems:\n> \n> https://www.tomshardware.com/pc-components/chipsets/pcie-card-unlocks- \n> amd-chipset-power-on-intel-motherboards-or-you-can-turn-any-b650- \n> motherboard-into-an-x670-one\n> \n> That is clearly a niche/community hardware case, not a normal AMD platform,\n> and I do not want to over-weight it. But it made me wonder if:\n> \n>   depends on X86\n> \n> would be the more accurate dependency than:\n> \n>   depends on X86 && CPU_SUP_AMD\n> \n> for a PCI-attached PROM21 xHCI controller. The option would still use:\n> \n>   default USB_XHCI_PCI\n> \n> and the hwmon sensor driver would still stay behind its own\n> SENSORS_PROM21_XHCI option.\n> \n> I am fine keeping CPU_SUP_AMD if you prefer; I just wanted to check before\n> locking that part in for v5.\n> \n> Sincerely,\n> Jihong Min\n> \n\nFine by me either way.","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256\n header.s=selector1 header.b=Lt9N64U9;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-54312-incoming=patchwork.ozlabs.org@vger.kernel.org;\n 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Min","email":"hurryman2212@icloud.com"},"content":"On 5/9/26 14:52, Mario Limonciello wrote:\n>\n> Fine by me either way.\n>\nThanks. I changed the current branch to:\n\n   depends on X86\n   default USB_XHCI_PCI\n\nand removed the CPU_SUP_AMD-specific help text.\n\nSincerely,\nJihong Min","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=icloud.com header.i=@icloud.com header.a=rsa-sha256\n header.s=1a1hai header.b=OsJDSYoq;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; helo=sto.lore.kernel.org;\n envelope-from=linux-pci+bounces-54313-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=icloud.com header.i=@icloud.com\n header.b=\"OsJDSYoq\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=57.103.78.235","smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=icloud.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=icloud.com"],"Received":["from sto.lore.kernel.org (sto.lore.kernel.org\n [IPv6:2600:3c09:e001:a7::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4gCGvC5cgHz1yCg\n\tfor ; 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