[{"id":3688113,"web_url":"http://patchwork.ozlabs.org/comment/3688113/","msgid":"<20260508012135.76B34C2BCB2@smtp.kernel.org>","list_archive_url":null,"date":"2026-05-08T01:21:34","subject":"Re: [PATCH 1/2] dt-bindings: PCI: qcom: Document the Hawi PCIe\n Controller","submitter":{"id":93311,"url":"http://patchwork.ozlabs.org/api/people/93311/","name":null,"email":"sashiko-bot@kernel.org"},"content":"Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:\n- [Low] The compatible string and filename violate the established Qualcomm PCIe naming pattern.\n--\n\ncommit 332996956780b2d8736ee1fcd6b38c1627f71689\nAuthor: Matthew Leung \n\ndt-bindings: PCI: qcom: Document the Hawi PCIe Controller\n\nAdd a dedicated schema for the PCIe controllers found on the Hawi\nplatform.\n\n> diff --git a/Documentation/devicetree/bindings/pci/qcom,hawi-pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,hawi-pcie.yaml\n> new file mode 100644\n> index 0000000000000..154bc88e59694\n> --- /dev/null\n> +++ b/Documentation/devicetree/bindings/pci/qcom,hawi-pcie.yaml\n\nThis isn't a bug, but is there a reason this file isn't named\nqcom,pcie-hawi.yaml? The rest of the Qualcomm PCIe Root Complex bindings\nstrictly follow the qcom,pcie- naming pattern, such as\nqcom,pcie-sc7280.yaml and qcom,pcie-sm8550.yaml.\n\n[ ... ]\n\n> +properties:\n> + compatible:\n> + const: qcom,hawi-pcie\n\nShould this compatible string also be changed to qcom,pcie-hawi to maintain\nconsistency with the other Qualcomm Root Complex definitions across the\nsubsystem?","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=MkDm12GS;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=104.64.211.4; helo=sin.lore.kernel.org;\n envelope-from=linux-pci+bounces-54147-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"MkDm12GS\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"],"Received":["from sin.lore.kernel.org (sin.lore.kernel.org [104.64.211.4])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4gBWYJ5DhDz1yK7\n\tfor ; Fri, 08 May 2026 11:21:40 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sin.lore.kernel.org (Postfix) with ESMTP id 9C9DC300D77E\n\tfor ; Fri, 8 May 2026 01:21:37 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 1B7DF175A93;\n\tFri, 8 May 2026 01:21:36 +0000 (UTC)","from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id EC81F175A77\n\tfor ; Fri, 8 May 2026 01:21:35 +0000 (UTC)","by smtp.kernel.org (Postfix) with ESMTPSA id 76B34C2BCB2;\n\tFri, 8 May 2026 01:21:35 +0000 (UTC)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1778203296; cv=none;\n b=Ozanya36ufp6jRhTrj2umgZE+I8gvHbvDFNlPcNV+Lw0shSBGszChhSddx48uevh0xGH60UgA7bXBJTckLItnNkNVLks9IHSJZZEZJJpCRV7BKB4/zik3TO1qPyPzaihaZyjgySGsQil5nL9JuJRSKLje/gWJK2x2p0H45OWisA=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1778203296; c=relaxed/simple;\n\tbh=JvADbxKuWFwpx3Dol+y7xkplrW6iqAs6vzsBYJ437Kk=;\n\th=From:Subject:To:Cc:In-Reply-To:References:Content-Type:Date:\n\t Message-Id;\n b=VdSTCV3hhtoNk+XO1BYrFxgCcxkc84XiuLpnFEfhbDPUFzePs+nzbekM5CXUg56XxUAzN19OmVPeV82voHRqYXhqVfkd2B4UoHtuAWdDk6XwnPUubadLVCaPzRNbRS8OcjifiQSmeGnjuGuvuYRAohQai/eXjzhyVrAz1SSbb60=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=MkDm12GS; arc=none smtp.client-ip=10.30.226.201","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1778203295;\n\tbh=JvADbxKuWFwpx3Dol+y7xkplrW6iqAs6vzsBYJ437Kk=;\n\th=From:Subject:Reply-To:To:Cc:In-Reply-To:References:Date:From;\n\tb=MkDm12GSMGhh/buKXL8p4nPfS07qkkn9gVt3+X8Mk1PeRf1fKOV7ODKfEhhb9xz+M\n\t hx7fJqK3nJcPdVO3MSro6ZhkgF8FgJRk8cGo/QVYJ829MoxZOpiTaq8C9AMJ0orrMa\n\t 181nCi7OUPLubhXPmd0axPt6K9p81C3LCZfGTuclmJAZujDTrDC2TPmLyZKQRAzKzJ\n\t MjrL1cf7JpB3ssQl5pRf6bmMAlHflVeK5hLZTxueHuPxbMlCvyxONFig2AJOMw1Org\n\t qjVgp43OgkVxjcA4w1yXmSZ/dC4n3WmwnbcX3kR+6Fs5XQjtBQ7zWzUwiySaIvRS5G\n\t P3aHbB9wPtyZw==","From":"sashiko-bot@kernel.org","Subject":"Re: [PATCH 1/2] dt-bindings: PCI: qcom: Document the Hawi PCIe\n Controller","Reply-To":"sashiko@lists.linux.dev","To":"\"Matthew Leung\" ","Cc":"linux-pci@vger.kernel.org","In-Reply-To":"<20260508-hawi-pcie-v1-1-0c910906f7e5@oss.qualcomm.com>","References":"<20260508-hawi-pcie-v1-1-0c910906f7e5@oss.qualcomm.com>","Content-Type":"text/plain; charset=utf-8","Content-Transfer-Encoding":"quoted-printable","Date":"Fri, 08 May 2026 01:21:34 +0000","Message-Id":"<20260508012135.76B34C2BCB2@smtp.kernel.org>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":""}}]