[{"id":3686939,"web_url":"http://patchwork.ozlabs.org/comment/3686939/","msgid":"<875x50vrp3.fsf@googlemail.com>","list_archive_url":null,"date":"2026-05-06T08:59:52","subject":"Re: [to-be-committed][RISC-V][PR rtl-optimization/80770] Simplify\n bit flipping operations down to xor","submitter":{"id":4363,"url":"http://patchwork.ozlabs.org/api/people/4363/","name":"Richard Sandiford","email":"rdsandiford@googlemail.com"},"content":"Jeffrey Law <jeffrey.law@oss.qualcomm.com> writes:\n> diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc\n> index bf625cdaf608..365bb9db1930 100644\n> --- a/gcc/simplify-rtx.cc\n> +++ b/gcc/simplify-rtx.cc\n> @@ -3897,6 +3897,101 @@ simplify_context::simplify_binary_operation_1 (rtx_code code,\n>  \t  && negated_ops_p (XEXP (op0, 0), op1))\n>  \treturn simplify_gen_binary (IOR, mode, XEXP (op0, 1), op1);\n>  \n> +      /* (ior (and (A C1) (and (not (A) C2))) can be converted\n\nBracketing typo: (not A) rather than (not (A))\n\n> +\t into (and (xor (A C2) (C1 + C2))) when there are no bits\n\nand here: (and (xor A C2) (C1 + C2))\n\n> +\t in common between C1 and C2.  */\n> +      if (GET_CODE (op0) == AND\n> +\t  && GET_CODE (op1) == AND\n> +\t  && GET_CODE (XEXP (op1, 0)) == NOT\n> +\t  && rtx_equal_p (XEXP (op0, 0), XEXP (XEXP (op1, 0), 0))\n> +\t  && CONST_INT_P (XEXP (op0, 1))\n> +\t  && CONST_INT_P (XEXP (op1, 1))\n> +\t  && (INTVAL (XEXP (op0, 1)) & INTVAL (XEXP (op1, 1))) == 0)\n> +\t{\n> +\t  rtx c = GEN_INT (INTVAL (XEXP (op0, 1)) + INTVAL (XEXP (op1, 1)));\n> +\n> +\t  tem = simplify_gen_binary (XOR, mode, XEXP (op0, 0), XEXP (op1, 1));\n> +\t  if (tem)\n> +\t    {\n> +\t      tem = simplify_gen_binary (AND, mode, tem, c);\n> +\t      if (tem)\n> +\t\treturn tem;\n> +\t    }\n> +\t}\n> +\n> +      /* Same thing, but operand order is reversed for the outer IOR.  */\n> +      if (GET_CODE (op0) == AND\n> +\t  && GET_CODE (op1) == AND\n> +\t  && GET_CODE (XEXP (op0, 0)) == NOT\n> +\t  && rtx_equal_p (XEXP (op1, 0), XEXP (XEXP (op0, 0), 0))\n> +\t  && CONST_INT_P (XEXP (op0, 1))\n> +\t  && CONST_INT_P (XEXP (op1, 1))\n> +\t  && (INTVAL (XEXP (op0, 1)) & INTVAL (XEXP (op1, 1))) == 0)\n> +\t{\n> +\t  rtx c = GEN_INT (INTVAL (XEXP (op0, 1)) + INTVAL (XEXP (op1, 1)));\n> +\n> +\t  tem = simplify_gen_binary (XOR, mode, XEXP (op1, 0), XEXP (op0, 1));\n> +\t  if (tem)\n> +\t    {\n> +\t      tem = simplify_gen_binary (AND, mode, tem, c);\n> +\t      if (tem)\n> +\t\treturn tem;\n> +\t    }\n> +\t}\n> +\n> +      /* Another variant seen on some backends, particularly those with\n> +\t sub-word operations.  For these cases we have to know there is no\n> +\t carry from the PLUS into relevant bits.  In practice that means\n> +\t it's only valid for the uppermost bit.  */\n\nI think this is different enough that it's worth giving the expression\nin the comment, i.e.\n\n   (ior (and A C1) (plus (and A C1) C2))\n\nIt took me a while to work that out from the condition :)\n\nI wondered whether this one could/should be generalised to use\nnonzero_bits, rather than checking specifically for (and A C1).\nThat is,\n\n   (ior X (plus X C))\n\n(or the reverse, for simple X) is equivalent to (ior X C)\nif the low bit of C is above the highest nonzero bit of X.\nIn the above example, that would give us:\n\n   (ior (and A C1) C2)\n\nwhich admittedly is different from the expansion in the patch,\nbut is equally simple.  This is one of those unfortunate cases where\nthere are many ways of writing the same thing...\n\nThe (ior X (plus X C)) with nonzero_bits thing works for xor or ior in\nplace of plus.\n\n> +      if (GET_CODE (op0) == AND\n> +\t  && GET_CODE (op1) == PLUS\n> +\t  && GET_CODE (XEXP (op1, 0)) == AND\n> +\t  && rtx_equal_p (XEXP (op0, 0), XEXP (XEXP (op1, 0), 0))\n> +\t  && CONST_INT_P (XEXP (op0, 1))\n> +\t  && CONST_INT_P (XEXP (op1, 1))\n> +\t  && CONST_INT_P (XEXP (XEXP (op1, 0), 1))\n> +\t  && INTVAL (XEXP (op1, 1)) == INTVAL (XEXP (XEXP (op1, 0), 1))\n> +\t  && GET_MODE_BITSIZE (GET_MODE (op1)).is_constant ()\n> +\t  && ((INTVAL (XEXP (op1, 1)) & GET_MODE_MASK (GET_MODE (op1)))\n> +\t      == HOST_WIDE_INT_1U << (GET_MODE_BITSIZE (GET_MODE (op1)).to_constant () - 1))\n> +\t  && (INTVAL (XEXP (op0, 1)) & INTVAL (XEXP (op1, 1))) == 0)\n> +\t{\n> +\t  rtx c = GEN_INT (INTVAL (XEXP (op0, 1)) + INTVAL (XEXP (op1, 1)));\n> +\n> +\t  tem = simplify_gen_binary (XOR, mode, XEXP (op0, 0), XEXP (op1, 1));\n> +\t  if (tem)\n> +\t    {\n> +\t      tem = simplify_gen_binary (AND, mode, tem, c);\n> +\t      if (tem)\n> +\t\treturn tem;\n> +\t    }\n> +\t}\n> +\n> +      /* And its variant with the operands of the outer AND reversed.  */\n> +      if (GET_CODE (op1) == AND\n> +\t  && GET_CODE (op0) == PLUS\n> +\t  && GET_CODE (XEXP (op0, 0)) == AND\n> +\t  && rtx_equal_p (XEXP (op1, 0), XEXP (XEXP (op0, 0), 0))\n> +\t  && CONST_INT_P (XEXP (op1, 1))\n> +\t  && CONST_INT_P (XEXP (op0, 1))\n> +\t  && CONST_INT_P (XEXP (XEXP (op0, 0), 1))\n> +\t  && INTVAL (XEXP (op0, 1)) == INTVAL (XEXP (XEXP (op0, 0), 1))\n> +\t  && GET_MODE_BITSIZE (GET_MODE (op0)).is_constant ()\n> +\t  && ((INTVAL (XEXP (op0, 1)) & GET_MODE_MASK (GET_MODE (op0)))\n> +\t      == HOST_WIDE_INT_1U << (GET_MODE_BITSIZE (GET_MODE (op0)).to_constant () - 1))\n> +\t  && (INTVAL (XEXP (op1, 1)) & INTVAL (XEXP (op0, 1))) == 0)\n> +\t{\n> +\t  rtx c = GEN_INT (INTVAL (XEXP (op1, 1)) + INTVAL (XEXP (op0, 1)));\n> +\n> +\t  tem = simplify_gen_binary (XOR, mode, XEXP (op1, 0), XEXP (op0, 1));\n> +\t  if (tem)\n> +\t    {\n> +\t      tem = simplify_gen_binary (AND, mode, tem, c);\n> +\t      if (tem)\n> +\t\treturn tem;\n> +\t    }\n> +\t}\n> +\n\nHow about putting this in a for loop:\n\n    for (int i = 0; i < 2; ++i)\n      {\n\n      }\n\nso that each transform needs to be written once?  This seems like a\nreally large amount of code to cut-&-paste, and it would be easy for\nmistakes to be made when editing in future.\n\nSorry for being awkward :)\n\nRichard\n\n>        tem = simplify_with_subreg_not (code, mode, op0, op1);\n>        if (tem)\n>  \treturn tem;\n> diff --git a/gcc/testsuite/gcc.target/riscv/pr80770.c b/gcc/testsuite/gcc.target/riscv/pr80770.c\n> new file mode 100644\n> index 000000000000..4dafe3955f05\n> --- /dev/null\n> +++ b/gcc/testsuite/gcc.target/riscv/pr80770.c\n> @@ -0,0 +1,150 @@\n> +/* { dg-do compile } */\n> +/* { dg-additional-options \"-std=gnu99\" } */\n> +/* { dg-skip-if \"\" { *-*-* } { \"-O0\" \"-O1\" } } */\n> +\n> +\n> +struct S {\n> +  _Bool b0: 1;\n> +  _Bool b1: 1;\n> +  _Bool b2: 1;\n> +  _Bool b3: 1;\n> +  _Bool b4: 1;\n> +  _Bool b5: 1;\n> +  _Bool b6: 1;\n> +  _Bool b7: 1;\n> +  _Bool b8: 1;\n> +  _Bool b9: 1;\n> +  _Bool b10: 1;\n> +  _Bool b11: 1;\n> +  _Bool b12: 1;\n> +  _Bool b13: 1;\n> +  _Bool b14: 1;\n> +  _Bool b15: 1;\n> +  _Bool b16: 1;\n> +  _Bool b17: 1;\n> +  _Bool b18: 1;\n> +  _Bool b19: 1;\n> +  _Bool b20: 1;\n> +  _Bool b21: 1;\n> +  _Bool b22: 1;\n> +  _Bool b23: 1;\n> +  _Bool b24: 1;\n> +  _Bool b25: 1;\n> +  _Bool b26: 1;\n> +  _Bool b27: 1;\n> +  _Bool b28: 1;\n> +  _Bool b29: 1;\n> +  _Bool b30: 1;\n> +  _Bool b31: 1;\n> +  _Bool b32: 1;\n> +  _Bool b33: 1;\n> +  _Bool b34: 1;\n> +  _Bool b35: 1;\n> +  _Bool b36: 1;\n> +  _Bool b37: 1;\n> +  _Bool b38: 1;\n> +  _Bool b39: 1;\n> +  _Bool b40: 1;\n> +  _Bool b41: 1;\n> +  _Bool b42: 1;\n> +  _Bool b43: 1;\n> +  _Bool b44: 1;\n> +  _Bool b45: 1;\n> +  _Bool b46: 1;\n> +  _Bool b47: 1;\n> +  _Bool b48: 1;\n> +  _Bool b49: 1;\n> +  _Bool b50: 1;\n> +  _Bool b51: 1;\n> +  _Bool b52: 1;\n> +  _Bool b53: 1;\n> +  _Bool b54: 1;\n> +  _Bool b55: 1;\n> +  _Bool b56: 1;\n> +  _Bool b57: 1;\n> +  _Bool b58: 1;\n> +  _Bool b59: 1;\n> +  _Bool b60: 1;\n> +  _Bool b61: 1;\n> +  _Bool b62: 1;\n> +  _Bool b63: 1;\n> +};\n> +\n> +#define T(N) void fb##N (struct S *s) { s->b##N = !s->b##N; }\n> +\n> +T(0)\n> +T(1)\n> +T(2)\n> +T(3)\n> +T(4)\n> +T(5)\n> +T(6)\n> +T(7)\n> +T(8)\n> +T(9)\n> +T(10)\n> +T(11)\n> +T(12)\n> +T(13)\n> +T(14)\n> +T(15)\n> +T(16)\n> +T(17)\n> +T(18)\n> +T(19)\n> +T(20)\n> +T(21)\n> +T(22)\n> +T(23)\n> +T(24)\n> +T(25)\n> +T(26)\n> +T(27)\n> +T(28)\n> +T(29)\n> +T(30)\n> +T(31)\n> +#if __riscv_xlen == 64\n> +T(32)\n> +T(33)\n> +T(34)\n> +T(35)\n> +T(36)\n> +T(37)\n> +T(38)\n> +T(39)\n> +T(40)\n> +T(41)\n> +T(42)\n> +T(43)\n> +T(44)\n> +T(45)\n> +T(46)\n> +T(47)\n> +T(48)\n> +T(49)\n> +T(50)\n> +T(51)\n> +T(52)\n> +T(53)\n> +T(54)\n> +T(55)\n> +T(56)\n> +T(57)\n> +T(58)\n> +T(59)\n> +T(60)\n> +T(61)\n> +T(62)\n> +T(63)\n> +#endif\n> +\n> +/* { dg-final { scan-assembler-times \"lbu\\t\" 64 { target rv64 } } } */\n> +/* { dg-final { scan-assembler-times \"lbu\\t\" 32 { target rv32 } } } */\n> +\n> +/* { dg-final { scan-assembler-times \"xori\\t\" 64 { target rv64 } } } */\n> +/* { dg-final { scan-assembler-times \"xori\\t\" 32 { target rv32 } } } */\n> +\n> +\n> +/* { dg-final { scan-assembler-times \"sb\\t\" 64 { target rv64 } } } */\n> +/* { dg-final { scan-assembler-times \"sb\\t\" 32 { target rv32 } } } */","headers":{"Return-Path":"<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=googlemail.com header.i=@googlemail.com\n header.a=rsa-sha256 header.s=20251104 header.b=YOQ3Eq1B;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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For these cases we have to know there is no\n>> +\t carry from the PLUS into relevant bits.  In practice that means\n>> +\t it's only valid for the uppermost bit.  */\n> I think this is different enough that it's worth giving the expression\n> in the comment, i.e.\n>\n>     (ior (and A C1) (plus (and A C1) C2))\n>\n> It took me a while to work that out from the condition :)\nQuite fair.  I actually had to remind myself how it worked after I'd \nbeen away from it for a few months.  Both are a good sign that a fresh \ncomment is warranted.\n\n>\n> I wondered whether this one could/should be generalised to use\n> nonzero_bits, rather than checking specifically for (and A C1).\n> That is,\n>\n>     (ior X (plus X C))\n>\n> (or the reverse, for simple X) is equivalent to (ior X C)\n> if the low bit of C is above the highest nonzero bit of X.\n> In the above example, that would give us:\n>\n>     (ior (and A C1) C2)\n>\n> which admittedly is different from the expansion in the patch,\n> but is equally simple.  This is one of those unfortunate cases where\n> there are many ways of writing the same thing...\n>\n> The (ior X (plus X C)) with nonzero_bits thing works for xor or ior in\n> place of plus.\nSeems like it's worth at least exploring to see if it's likely to trigger.\n> How about putting this in a for loop:\n>\n>      for (int i = 0; i < 2; ++i)\n>        {\n>\n>        }\n>\n> so that each transform needs to be written once?  This seems like a\n> really large amount of code to cut-&-paste, and it would be easy for\n> mistakes to be made when editing in future.\nYea, I'd pondered creating a couple local variables and doing a \nstd::swap based on some initial shape queries to reduce duplication.  In \nthis form I wouldn't even need to do form testing. Just std::swap on the \n2nd iteration and be done with it.\n\n>\n> Sorry for being awkward :)\nNothing to apologize for.  I'm always happy to get your feedback.\n\nJeff","headers":{"Return-Path":"<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=lt+tu7hH;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=J2L0NB8g;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)","sourceware.org;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=lt+tu7hH;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=J2L0NB8g","sourceware.org; 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charset=UTF-8; format=flowed","Content-Transfer-Encoding":"8bit","X-Authority-Analysis":"v=2.4 cv=Lc8MLDfi c=1 sm=1 tr=0 ts=69fbc1c2 cx=c_pps\n a=cFYjgdjTJScbgFmBucgdfQ==:117 a=asGLMfRmzhnGNxaIYohjRg==:17\n a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22\n a=FuKHZQuQQaJsy-6BgiwA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10\n a=scEy_gLbYbu1JhEsrz4S:22","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNTA2MDIyMCBTYWx0ZWRfX/VdC29dabNtd\n mRa3YXf8wZqnlKGVNuhd9N+JUNwd5QqzJkLbarlesUHRy7f51ykcsgpJs5JbWV0CmZ8XrQ7ktf8\n gTv0Bm2PQuVp/vfEjMG5ZsjiZJzKxZv/zCcQExRYmSexGg4hyhqKI25D7A7fTlvc8HRwpmAjPyW\n A5J5+Uim8cRKnziug1IHXOu44TEQR9UAafZAtw85TsQrhrE5BU4wii5FJP2s4+ywyxbK+GPxefC\n SXVau8slF2Aq7wpvIgQeGYnhBzBs+ubfb52EriyEEFIE9N4boTGDDJBAXO2oS1JAaMtmvNyfJvR\n AlsPAQJ9EPlc/4XwKqC3fw+E6Bwl+ayS+Qpr4HhKOR3/SCZafWVXeaCf4AgiHC4KNVITFCUy5oE\n KBdn4Zjwf68li4UKWUafHAVSfZ2TjmZFPES9vL9rCJU6sejeh7jP5BrzuGSt6LcmUPqROgiHxpG\n NEw7/yl5V03ydKL1Y0g==","X-Proofpoint-ORIG-GUID":"Fzk8I4BlUvztI--cdzhxslXOqoaJR52i","X-Proofpoint-GUID":"Fzk8I4BlUvztI--cdzhxslXOqoaJR52i","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-05-06_02,2026-05-06_01,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n lowpriorityscore=0 adultscore=0 priorityscore=1501 clxscore=1015\n impostorscore=0 bulkscore=0 suspectscore=0 malwarescore=0 phishscore=0\n spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound\n adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000\n definitions=main-2605060220","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list <gcc-patches.gcc.gnu.org>","List-Unsubscribe":"<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>","List-Archive":"<https://gcc.gnu.org/pipermail/gcc-patches/>","List-Post":"<mailto:gcc-patches@gcc.gnu.org>","List-Help":"<mailto:gcc-patches-request@gcc.gnu.org?subject=help>","List-Subscribe":"<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"}},{"id":3688897,"web_url":"http://patchwork.ozlabs.org/comment/3688897/","msgid":"<a906feee-830e-410e-9072-54297aa1e16d@oss.qualcomm.com>","list_archive_url":null,"date":"2026-05-09T16:42:14","subject":"Re: [to-be-committed][RISC-V][PR rtl-optimization/80770] Simplify bit\n flipping operations down to xor","submitter":{"id":92310,"url":"http://patchwork.ozlabs.org/api/people/92310/","name":"Jeffrey Law","email":"jeffrey.law@oss.qualcomm.com"},"content":"On 5/6/2026 2:59 AM, Richard Sandiford wrote:\n> I think this is different enough that it's worth giving the expression\n> in the comment, i.e.\n>\n>     (ior (and A C1) (plus (and A C1) C2))\n>\n> It took me a while to work that out from the condition :)\nSo I fixed the two paren typos, adjusted the comment for the second pair \nof cases, then collapsed from 4 cases down to 2 using a loop and \nswapping of local variables.\n\n\n>\n> I wondered whether this one could/should be generalised to use\n> nonzero_bits, rather than checking specifically for (and A C1).\n> That is,\n>\n>     (ior X (plus X C))\n>\n> (or the reverse, for simple X) is equivalent to (ior X C)\n> if the low bit of C is above the highest nonzero bit of X.\n> In the above example, that would give us:\n>\n>     (ior (and A C1) C2)\n>\n> which admittedly is different from the expansion in the patch,\n> but is equally simple.  This is one of those unfortunate cases where\n> there are many ways of writing the same thing...\n>\n> The (ior X (plus X C)) with nonzero_bits thing works for xor or ior in\n> place of plus.\nYea, this can be shown with a trivial test:\n>\n> int\n> foo(int x)\n> {\n>   x &= 0xf;\n>   x |= (x + 0x80);\n>   return x;\n> }\n>\n> int\n> foo2(int x)\n> {\n>   x &= 0xf;\n>   x |= (x | 0x80);\n>   return x;\n> }\n\nWhich generates this on rv64:\n\n> foo:\n>         andi    a0,a0,15\n>         addi    a5,a0,128\n>         or      a0,a5,a0\n>         ret\n>         .size   foo, .-foo\n>         .align  2\n>         .globl  foo2\n>         .type   foo2, @function\n> foo2:\n>         andi    a0,a0,15\n>         ori     a0,a0,128\n>         ret\n\nI think the transform you're looking for really just requires that there \nbe no bits in common between the nonzero bits in X and the constant.  \n  If there's no common bits, then the PLUS or XOR can turn into an IOR.  \n  That's trivial to include.\n\nHere's the net.  I also added a test for the H8 for giggles.  H8 isn't \noptimal as it's not using \"bnot\", but that's an independent target issue.\n\nI've spot checked on x86 which looks good as well.  For the main \ntestcase we're typically squashing 7 instructions down to a single xor \nor addb RMW operation.\n\nFurther suggestions?\n\nJeff\ndiff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc\nindex ee3d9ec32082..08ae224847b1 100644\n--- a/gcc/simplify-rtx.cc\n+++ b/gcc/simplify-rtx.cc\n@@ -3900,6 +3900,83 @@ simplify_context::simplify_binary_operation_1 (rtx_code code,\n \t  && negated_ops_p (XEXP (op0, 0), op1))\n \treturn simplify_gen_binary (IOR, mode, XEXP (op0, 1), op1);\n \n+      {\n+\trtx top0 = op0;\n+\trtx top1 = op1;\n+\tfor (int i = 0; i < 2; i++)\n+\t  {\n+\t    /* The outer IOR is commutative so try op0/op1 in their\n+\t       original position and reversed.  */\n+\t    if (i == 1)\n+\t      std::swap (top0, top1);\n+\n+\t    /* (ior X (plus/xor X C)) can be simplified into (ior X C) when\n+\t       X and C have no bits in common.  */\n+\t    if ((GET_CODE (top1) == PLUS || GET_CODE (top1) == XOR)\n+\t\t&& rtx_equal_p (top0, XEXP (top1, 0))\n+\t\t&& ((nonzero_bits (top0, GET_MODE (top0))\n+\t\t    & nonzero_bits (XEXP (top1, 1), GET_MODE (top1))) == 0)\n+\t\t&& !side_effects_p (top1))\n+\t      return simplify_gen_binary (IOR, mode, top0, XEXP (top1, 1));\n+\n+\t    /* (ior (and A C1) (and (not A) C2)) can be converted\n+\t       into (and (xor A C2) (C1 + C2)) when there are no bits\n+\t       in common between C1 and C2.  */\n+\t    if (GET_CODE (top0) == AND\n+\t\t&& GET_CODE (top1) == AND\n+\t\t&& GET_CODE (XEXP (top1, 0)) == NOT\n+\t\t&& rtx_equal_p (XEXP (top0, 0), XEXP (XEXP (top1, 0), 0))\n+\t\t&& CONST_INT_P (XEXP (top0, 1))\n+\t\t&& CONST_INT_P (XEXP (top1, 1))\n+\t\t&& (INTVAL (XEXP (top0, 1)) & INTVAL (XEXP (top1, 1))) == 0)\n+\t      {\n+\t\trtx c = GEN_INT (INTVAL (XEXP (top0, 1)) + INTVAL (XEXP (top1, 1)));\n+\n+\t\ttem = simplify_gen_binary (XOR, mode, XEXP (top0, 0), XEXP (top1, 1));\n+\t\tif (tem)\n+\t\t  {\n+\t\t    tem = simplify_gen_binary (AND, mode, tem, c);\n+\n+\t\t    if (tem)\n+\t\t      return tem;\n+\t\t  }\n+\t      }\n+\n+\t    /* Another variant seen on some targets particularly those with\n+\t       sub-word operations.\n+\n+\t       (ior (and A C1) (plus (and A C2) C2)) can be simplified into\n+\t       (and (xor A C2) (C1 + C2)).\n+\n+\t       Where C2 is the sign bit for A's mode.  So 0x80 for QI,\n+\t       0x8000 for HI, etc.  In this case we know there is no carry\n+\t       from the PLUS into relevant bits of the output.  */\n+\t    if (GET_CODE (top0) == AND\n+\t\t&& GET_CODE (top1) == PLUS\n+\t\t&& GET_CODE (XEXP (top1, 0)) == AND\n+\t\t&& rtx_equal_p (XEXP (top0, 0), XEXP (XEXP (top1, 0), 0))\n+\t\t&& CONST_INT_P (XEXP (top0, 1))\n+\t\t&& CONST_INT_P (XEXP (top1, 1))\n+\t\t&& CONST_INT_P (XEXP (XEXP (top1, 0), 1))\n+\t\t&& INTVAL (XEXP (top1, 1)) == INTVAL (XEXP (XEXP (top1, 0), 1))\n+\t\t&& GET_MODE_BITSIZE (GET_MODE (top1)).is_constant ()\n+\t\t&& ((INTVAL (XEXP (top1, 1)) & GET_MODE_MASK (GET_MODE (top1)))\n+\t\t    == HOST_WIDE_INT_1U << (GET_MODE_BITSIZE (GET_MODE (top1)).to_constant () - 1))\n+\t\t&& (INTVAL (XEXP (top0, 1)) & INTVAL (XEXP (top1, 1))) == 0)\n+\t      {\n+\t\trtx c = GEN_INT (INTVAL (XEXP (top0, 1)) + INTVAL (XEXP (top1, 1)));\n+\n+\t\ttem = simplify_gen_binary (XOR, mode, XEXP (top0, 0), XEXP (top1, 1));\n+\t\tif (tem)\n+\t\t  {\n+\t\t    tem = simplify_gen_binary (AND, mode, tem, c);\n+\t\t    if (tem)\n+\t\t      return tem;\n+\t\t  }\n+\t      }\n+\t  }\n+      }\n+\n       tem = simplify_with_subreg_not (code, mode, op0, op1);\n       if (tem)\n \treturn tem;\ndiff --git a/gcc/testsuite/gcc.target/h8300/pr80770-2.c b/gcc/testsuite/gcc.target/h8300/pr80770-2.c\nnew file mode 100644\nindex 000000000000..d2b491ed24e3\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/h8300/pr80770-2.c\n@@ -0,0 +1,11 @@\n+/* { dg-do compile } */\n+/* { dg-additional-options \"-O2 -std=gnu99 -mint32\" } */\n+\n+\n+int foop(int x) { x &= 0xf; x |= (x + 0x80); return x; }\n+int foox(int x) { x &= 0xf; x |= (x ^ 0x80); return x; }\n+\n+/* { dg-final { scan-assembler-not \"add\" } } */\n+/* { dg-final { scan-assembler-not \"xor\" } } */\n+/* { dg-final { scan-assembler-times \"and\" 2 } } */\n+/* { dg-final { scan-assembler-times \"or\" 2 } } */\ndiff --git a/gcc/testsuite/gcc.target/h8300/pr80770.c b/gcc/testsuite/gcc.target/h8300/pr80770.c\nnew file mode 100644\nindex 000000000000..bccf2ff66c66\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/h8300/pr80770.c\n@@ -0,0 +1,75 @@\n+/* { dg-do compile } */\n+/* { dg-additional-options \"-O2 -std=gnu99 -mint32\" } */\n+\n+\n+struct S {\n+  _Bool b0: 1;\n+  _Bool b1: 1;\n+  _Bool b2: 1;\n+  _Bool b3: 1;\n+  _Bool b4: 1;\n+  _Bool b5: 1;\n+  _Bool b6: 1;\n+  _Bool b7: 1;\n+  _Bool b8: 1;\n+  _Bool b9: 1;\n+  _Bool b10: 1;\n+  _Bool b11: 1;\n+  _Bool b12: 1;\n+  _Bool b13: 1;\n+  _Bool b14: 1;\n+  _Bool b15: 1;\n+  _Bool b16: 1;\n+  _Bool b17: 1;\n+  _Bool b18: 1;\n+  _Bool b19: 1;\n+  _Bool b20: 1;\n+  _Bool b21: 1;\n+  _Bool b22: 1;\n+  _Bool b23: 1;\n+  _Bool b24: 1;\n+  _Bool b25: 1;\n+  _Bool b26: 1;\n+  _Bool b27: 1;\n+  _Bool b28: 1;\n+  _Bool b29: 1;\n+  _Bool b30: 1;\n+  _Bool b31: 1;\n+};\n+\n+#define T(N) void fb##N (struct S *s) { s->b##N = !s->b##N; }\n+\n+T(0)\n+T(1)\n+T(2)\n+T(3)\n+T(4)\n+T(5)\n+T(6)\n+T(7)\n+T(8)\n+T(9)\n+T(10)\n+T(11)\n+T(12)\n+T(13)\n+T(14)\n+T(15)\n+T(16)\n+T(17)\n+T(18)\n+T(19)\n+T(20)\n+T(21)\n+T(22)\n+T(23)\n+T(24)\n+T(25)\n+T(26)\n+T(27)\n+T(28)\n+T(29)\n+T(30)\n+T(31)\n+\n+/* { dg-final { scan-assembler-times \"xor\\t|add.b\\t|bnot\\t\" 32 } } */\ndiff --git a/gcc/testsuite/gcc.target/riscv/pr80770-2.c b/gcc/testsuite/gcc.target/riscv/pr80770-2.c\nnew file mode 100644\nindex 000000000000..1514a49c5605\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/riscv/pr80770-2.c\n@@ -0,0 +1,11 @@\n+/* { dg-do compile } */\n+/* { dg-additional-options \"-O2 -std=gnu99\" } */\n+\n+\n+int foop(int x) { x &= 0xf; x |= (x + 0x80); return x; }\n+int foox(int x) { x &= 0xf; x |= (x ^ 0x80); return x; }\n+\n+/* { dg-final { scan-assembler-not \"add\" } } */\n+/* { dg-final { scan-assembler-not \"xor\" } } */\n+/* { dg-final { scan-assembler-times \"andi\\t\" 2 } } */\n+/* { dg-final { scan-assembler-times \"ori\\t\" 2 } } */\ndiff --git a/gcc/testsuite/gcc.target/riscv/pr80770.c b/gcc/testsuite/gcc.target/riscv/pr80770.c\nnew file mode 100644\nindex 000000000000..4dafe3955f05\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/riscv/pr80770.c\n@@ -0,0 +1,150 @@\n+/* { dg-do compile } */\n+/* { dg-additional-options \"-std=gnu99\" } */\n+/* { dg-skip-if \"\" { *-*-* } { \"-O0\" \"-O1\" } } */\n+\n+\n+struct S {\n+  _Bool b0: 1;\n+  _Bool b1: 1;\n+  _Bool b2: 1;\n+  _Bool b3: 1;\n+  _Bool b4: 1;\n+  _Bool b5: 1;\n+  _Bool b6: 1;\n+  _Bool b7: 1;\n+  _Bool b8: 1;\n+  _Bool b9: 1;\n+  _Bool b10: 1;\n+  _Bool b11: 1;\n+  _Bool b12: 1;\n+  _Bool b13: 1;\n+  _Bool b14: 1;\n+  _Bool b15: 1;\n+  _Bool b16: 1;\n+  _Bool b17: 1;\n+  _Bool b18: 1;\n+  _Bool b19: 1;\n+  _Bool b20: 1;\n+  _Bool b21: 1;\n+  _Bool b22: 1;\n+  _Bool b23: 1;\n+  _Bool b24: 1;\n+  _Bool b25: 1;\n+  _Bool b26: 1;\n+  _Bool b27: 1;\n+  _Bool b28: 1;\n+  _Bool b29: 1;\n+  _Bool b30: 1;\n+  _Bool b31: 1;\n+  _Bool b32: 1;\n+  _Bool b33: 1;\n+  _Bool b34: 1;\n+  _Bool b35: 1;\n+  _Bool b36: 1;\n+  _Bool b37: 1;\n+  _Bool b38: 1;\n+  _Bool b39: 1;\n+  _Bool b40: 1;\n+  _Bool b41: 1;\n+  _Bool b42: 1;\n+  _Bool b43: 1;\n+  _Bool b44: 1;\n+  _Bool b45: 1;\n+  _Bool b46: 1;\n+  _Bool b47: 1;\n+  _Bool b48: 1;\n+  _Bool b49: 1;\n+  _Bool b50: 1;\n+  _Bool b51: 1;\n+  _Bool b52: 1;\n+  _Bool b53: 1;\n+  _Bool b54: 1;\n+  _Bool b55: 1;\n+  _Bool b56: 1;\n+  _Bool b57: 1;\n+  _Bool b58: 1;\n+  _Bool b59: 1;\n+  _Bool b60: 1;\n+  _Bool b61: 1;\n+  _Bool b62: 1;\n+  _Bool b63: 1;\n+};\n+\n+#define T(N) void fb##N (struct S *s) { s->b##N = !s->b##N; }\n+\n+T(0)\n+T(1)\n+T(2)\n+T(3)\n+T(4)\n+T(5)\n+T(6)\n+T(7)\n+T(8)\n+T(9)\n+T(10)\n+T(11)\n+T(12)\n+T(13)\n+T(14)\n+T(15)\n+T(16)\n+T(17)\n+T(18)\n+T(19)\n+T(20)\n+T(21)\n+T(22)\n+T(23)\n+T(24)\n+T(25)\n+T(26)\n+T(27)\n+T(28)\n+T(29)\n+T(30)\n+T(31)\n+#if __riscv_xlen == 64\n+T(32)\n+T(33)\n+T(34)\n+T(35)\n+T(36)\n+T(37)\n+T(38)\n+T(39)\n+T(40)\n+T(41)\n+T(42)\n+T(43)\n+T(44)\n+T(45)\n+T(46)\n+T(47)\n+T(48)\n+T(49)\n+T(50)\n+T(51)\n+T(52)\n+T(53)\n+T(54)\n+T(55)\n+T(56)\n+T(57)\n+T(58)\n+T(59)\n+T(60)\n+T(61)\n+T(62)\n+T(63)\n+#endif\n+\n+/* { dg-final { scan-assembler-times \"lbu\\t\" 64 { target rv64 } } } */\n+/* { dg-final { scan-assembler-times \"lbu\\t\" 32 { target rv32 } } } */\n+\n+/* { dg-final { scan-assembler-times \"xori\\t\" 64 { target rv64 } } } */\n+/* { dg-final { scan-assembler-times \"xori\\t\" 32 { target rv32 } } } */\n+\n+\n+/* { dg-final { scan-assembler-times \"sb\\t\" 64 { target rv64 } } } */\n+/* { dg-final { scan-assembler-times \"sb\\t\" 32 { target rv32 } } } */","headers":{"Return-Path":"<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=alSEU77a;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=GpJ/i93e;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=38.145.34.32; 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boundary=\"------------rW9f2QaxDvD1A0FQiHt0XQ08\"","Message-ID":"<a906feee-830e-410e-9072-54297aa1e16d@oss.qualcomm.com>","Date":"Sat, 9 May 2026 10:42:14 -0600","MIME-Version":"1.0","User-Agent":"Mozilla Thunderbird","Subject":"Re: [to-be-committed][RISC-V][PR rtl-optimization/80770] Simplify bit\n flipping operations down to xor","To":"'GCC Patches' <gcc-patches@gcc.gnu.org>,\n Shreya Munnangi <smunnang@qti.qualcomm.com>, rdsandiford@googlemail.com","References":"<8a6698e2-4e65-4611-9e93-25ed121d9092@oss.qualcomm.com>\n <875x50vrp3.fsf@googlemail.com>","Content-Language":"en-US","From":"Jeffrey Law <jeffrey.law@oss.qualcomm.com>","In-Reply-To":"<875x50vrp3.fsf@googlemail.com>","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNTA5MDE4MSBTYWx0ZWRfXwS/7qu2drAQx\n nC5v19yJLUSPzg5YSih79OliMJeEH97Sg5I+j+pOkNihhLAFnANbMVVUvyazFFXjx0K9RdVI3zH\n s5FaBAbozlYS4CF6l1PYL10fwBfH6sFTe55AB/YJkPjZhEd1eeUlJe91J1Fe5CReHwcgJT4ssNX\n WwrfHScAH0DVyXMFFYBeP/HD26kwT+lsMnZp1F73ofVTfsvSPPY5zlOHGj6EsOUvdY6rkbPZZbe\n 3kBg2gfZntdDSQBAjTdAXQtrQBXx5vxBCSESSmkxPjh4zIgXDHmp3uFDxSUklEjbReE0VDI9Grv\n HWCNg4F6qAOo9Bam/7KslfwdDk5y0Iu9HXh31EoeYGUQc8ElV4boAwz++RZyegtEbzzXtjgSWBa\n wV+bL9mhqvU4svSU5ltWMqacjqC8gDnudGjJCP7yNo786E413IZx8k8YfAUTjltbuN1SsyG5jO2\n srIEdpG4WmfjnRepE3Q==","X-Authority-Analysis":"v=2.4 cv=dujrzVg4 c=1 sm=1 tr=0 ts=69ff63ea cx=c_pps\n a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=+VsRoAXgl/BGozSyXcsFeQ==:17\n a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=r77TgQKjGQsHNAKrUKIA:9\n a=FuKHZQuQQaJsy-6BgiwA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10\n a=9fb6EqZ83qXYLML6XVIA:9 a=B2y7HmGcmWMA:10 a=bBxd6f-gb0O0v-kibOvt:22","X-Proofpoint-ORIG-GUID":"Qmf_sNa-eUoqJsmiUx_1h7EhhM0iMR3j","X-Proofpoint-GUID":"Qmf_sNa-eUoqJsmiUx_1h7EhhM0iMR3j","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-05-09_05,2026-05-08_02,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n priorityscore=1501 bulkscore=0 adultscore=0 malwarescore=0 impostorscore=0\n lowpriorityscore=0 clxscore=1015 suspectscore=0 phishscore=0 spamscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605090181","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list <gcc-patches.gcc.gnu.org>","List-Unsubscribe":"<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>","List-Archive":"<https://gcc.gnu.org/pipermail/gcc-patches/>","List-Post":"<mailto:gcc-patches@gcc.gnu.org>","List-Help":"<mailto:gcc-patches-request@gcc.gnu.org?subject=help>","List-Subscribe":"<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"}},{"id":3688922,"web_url":"http://patchwork.ozlabs.org/comment/3688922/","msgid":"<87bjeomg32.fsf@googlemail.com>","list_archive_url":null,"date":"2026-05-09T21:24:33","subject":"Re: [to-be-committed][RISC-V][PR rtl-optimization/80770] Simplify\n bit flipping operations down to xor","submitter":{"id":4363,"url":"http://patchwork.ozlabs.org/api/people/4363/","name":"Richard Sandiford","email":"rdsandiford@googlemail.com"},"content":"Jeffrey Law <jeffrey.law@oss.qualcomm.com> writes:\n> On 5/6/2026 2:59 AM, Richard Sandiford wrote:\n>> I think this is different enough that it's worth giving the expression\n>> in the comment, i.e.\n>>\n>>     (ior (and A C1) (plus (and A C1) C2))\n>>\n>> It took me a while to work that out from the condition :)\n> So I fixed the two paren typos, adjusted the comment for the second pair \n> of cases, then collapsed from 4 cases down to 2 using a loop and \n> swapping of local variables.\n>\n>\n>>\n>> I wondered whether this one could/should be generalised to use\n>> nonzero_bits, rather than checking specifically for (and A C1).\n>> That is,\n>>\n>>     (ior X (plus X C))\n>>\n>> (or the reverse, for simple X) is equivalent to (ior X C)\n>> if the low bit of C is above the highest nonzero bit of X.\n>> In the above example, that would give us:\n>>\n>>     (ior (and A C1) C2)\n>>\n>> which admittedly is different from the expansion in the patch,\n>> but is equally simple.  This is one of those unfortunate cases where\n>> there are many ways of writing the same thing...\n>>\n>> The (ior X (plus X C)) with nonzero_bits thing works for xor or ior in\n>> place of plus.\n> Yea, this can be shown with a trivial test:\n>>\n>> int\n>> foo(int x)\n>> {\n>>   x &= 0xf;\n>>   x |= (x + 0x80);\n>>   return x;\n>> }\n>>\n>> int\n>> foo2(int x)\n>> {\n>>   x &= 0xf;\n>>   x |= (x | 0x80);\n>>   return x;\n>> }\n>\n> Which generates this on rv64:\n>\n>> foo:\n>>         andi    a0,a0,15\n>>         addi    a5,a0,128\n>>         or      a0,a5,a0\n>>         ret\n>>         .size   foo, .-foo\n>>         .align  2\n>>         .globl  foo2\n>>         .type   foo2, @function\n>> foo2:\n>>         andi    a0,a0,15\n>>         ori     a0,a0,128\n>>         ret\n>\n> I think the transform you're looking for really just requires that there \n> be no bits in common between the nonzero bits in X and the constant.  \n>   If there's no common bits, then the PLUS or XOR can turn into an IOR.  \n>   That's trivial to include.\n\nAh, yeah.\n\n> Here's the net.  I also added a test for the H8 for giggles.  H8 isn't \n> optimal as it's not using \"bnot\", but that's an independent target issue.\n>\n> I've spot checked on x86 which looks good as well.  For the main \n> testcase we're typically squashing 7 instructions down to a single xor \n> or addb RMW operation.\n\nNice!\n\n> Further suggestions?\n>\n> Jeff\n>\n>\n>\n> diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc\n> index ee3d9ec32082..08ae224847b1 100644\n> --- a/gcc/simplify-rtx.cc\n> +++ b/gcc/simplify-rtx.cc\n> @@ -3900,6 +3900,83 @@ simplify_context::simplify_binary_operation_1 (rtx_code code,\n>  \t  && negated_ops_p (XEXP (op0, 0), op1))\n>  \treturn simplify_gen_binary (IOR, mode, XEXP (op0, 1), op1);\n>  \n> +      {\n> +\trtx top0 = op0;\n> +\trtx top1 = op1;\n> +\tfor (int i = 0; i < 2; i++)\n> +\t  {\n> +\t    /* The outer IOR is commutative so try op0/op1 in their\n> +\t       original position and reversed.  */\n> +\t    if (i == 1)\n> +\t      std::swap (top0, top1);\n\nFWIW, it would also work to keep op0 and op1 and do the std::swap\nat the end of the loop body.  Maybe that would be less error prone\nwrt top vs op.\n\n> +\n> +\t    /* (ior X (plus/xor X C)) can be simplified into (ior X C) when\n> +\t       X and C have no bits in common.  */\n\nMaybe s/C/Y/ now that we're not requiring a constant.\n\n> +\t    if ((GET_CODE (top1) == PLUS || GET_CODE (top1) == XOR)\n> +\t\t&& rtx_equal_p (top0, XEXP (top1, 0))\n> +\t\t&& ((nonzero_bits (top0, GET_MODE (top0))\n> +\t\t    & nonzero_bits (XEXP (top1, 1), GET_MODE (top1))) == 0)\n> +\t\t&& !side_effects_p (top1))\n> +\t      return simplify_gen_binary (IOR, mode, top0, XEXP (top1, 1));\n> +\n> +\t    /* (ior (and A C1) (and (not A) C2)) can be converted\n> +\t       into (and (xor A C2) (C1 + C2)) when there are no bits\n> +\t       in common between C1 and C2.  */\n> +\t    if (GET_CODE (top0) == AND\n> +\t\t&& GET_CODE (top1) == AND\n> +\t\t&& GET_CODE (XEXP (top1, 0)) == NOT\n> +\t\t&& rtx_equal_p (XEXP (top0, 0), XEXP (XEXP (top1, 0), 0))\n> +\t\t&& CONST_INT_P (XEXP (top0, 1))\n> +\t\t&& CONST_INT_P (XEXP (top1, 1))\n> +\t\t&& (INTVAL (XEXP (top0, 1)) & INTVAL (XEXP (top1, 1))) == 0)\n> +\t      {\n> +\t\trtx c = GEN_INT (INTVAL (XEXP (top0, 1)) + INTVAL (XEXP (top1, 1)));\n> +\n> +\t\ttem = simplify_gen_binary (XOR, mode, XEXP (top0, 0), XEXP (top1, 1));\n> +\t\tif (tem)\n> +\t\t  {\n> +\t\t    tem = simplify_gen_binary (AND, mode, tem, c);\n> +\n> +\t\t    if (tem)\n> +\t\t      return tem;\n> +\t\t  }\n> +\t      }\n> +\n> +\t    /* Another variant seen on some targets particularly those with\n> +\t       sub-word operations.\n> +\n> +\t       (ior (and A C1) (plus (and A C2) C2)) can be simplified into\n> +\t       (and (xor A C2) (C1 + C2)).\n> +\n> +\t       Where C2 is the sign bit for A's mode.  So 0x80 for QI,\n> +\t       0x8000 for HI, etc.  In this case we know there is no carry\n> +\t       from the PLUS into relevant bits of the output.  */\n> +\t    if (GET_CODE (top0) == AND\n> +\t\t&& GET_CODE (top1) == PLUS\n> +\t\t&& GET_CODE (XEXP (top1, 0)) == AND\n> +\t\t&& rtx_equal_p (XEXP (top0, 0), XEXP (XEXP (top1, 0), 0))\n> +\t\t&& CONST_INT_P (XEXP (top0, 1))\n> +\t\t&& CONST_INT_P (XEXP (top1, 1))\n> +\t\t&& CONST_INT_P (XEXP (XEXP (top1, 0), 1))\n> +\t\t&& INTVAL (XEXP (top1, 1)) == INTVAL (XEXP (XEXP (top1, 0), 1))\n> +\t\t&& GET_MODE_BITSIZE (GET_MODE (top1)).is_constant ()\n> +\t\t&& ((INTVAL (XEXP (top1, 1)) & GET_MODE_MASK (GET_MODE (top1)))\n> +\t\t    == HOST_WIDE_INT_1U << (GET_MODE_BITSIZE (GET_MODE (top1)).to_constant () - 1))\n> +\t\t&& (INTVAL (XEXP (top0, 1)) & INTVAL (XEXP (top1, 1))) == 0)\n> +\t      {\n> +\t\trtx c = GEN_INT (INTVAL (XEXP (top0, 1)) + INTVAL (XEXP (top1, 1)));\n> +\n> +\t\ttem = simplify_gen_binary (XOR, mode, XEXP (top0, 0), XEXP (top1, 1));\n> +\t\tif (tem)\n> +\t\t  {\n> +\t\t    tem = simplify_gen_binary (AND, mode, tem, c);\n> +\t\t    if (tem)\n> +\t\t      return tem;\n> +\t\t  }\n> +\t      }\n\nDo you still need the last transformation?  I was hoping that\nnonzero_bits would return C1 for (and A C1), and so the first test\nabove would handle it.\n\nOtherwise LGTM FWIW.\n\nThanks,\nRichard\n\n> +\t  }\n> +      }\n> +\n>        tem = simplify_with_subreg_not (code, mode, op0, op1);\n>        if (tem)\n>  \treturn tem;\n> diff --git a/gcc/testsuite/gcc.target/h8300/pr80770-2.c b/gcc/testsuite/gcc.target/h8300/pr80770-2.c\n> new file mode 100644\n> index 000000000000..d2b491ed24e3\n> --- /dev/null\n> +++ b/gcc/testsuite/gcc.target/h8300/pr80770-2.c\n> @@ -0,0 +1,11 @@\n> +/* { dg-do compile } */\n> +/* { dg-additional-options \"-O2 -std=gnu99 -mint32\" } */\n> +\n> +\n> +int foop(int x) { x &= 0xf; x |= (x + 0x80); return x; }\n> +int foox(int x) { x &= 0xf; x |= (x ^ 0x80); return x; }\n> +\n> +/* { dg-final { scan-assembler-not \"add\" } } */\n> +/* { dg-final { scan-assembler-not \"xor\" } } */\n> +/* { dg-final { scan-assembler-times \"and\" 2 } } */\n> +/* { dg-final { scan-assembler-times \"or\" 2 } } */\n> diff --git a/gcc/testsuite/gcc.target/h8300/pr80770.c b/gcc/testsuite/gcc.target/h8300/pr80770.c\n> new file mode 100644\n> index 000000000000..bccf2ff66c66\n> --- /dev/null\n> +++ b/gcc/testsuite/gcc.target/h8300/pr80770.c\n> @@ -0,0 +1,75 @@\n> +/* { dg-do compile } */\n> +/* { dg-additional-options \"-O2 -std=gnu99 -mint32\" } */\n> +\n> +\n> +struct S {\n> +  _Bool b0: 1;\n> +  _Bool b1: 1;\n> +  _Bool b2: 1;\n> +  _Bool b3: 1;\n> +  _Bool b4: 1;\n> +  _Bool b5: 1;\n> +  _Bool b6: 1;\n> +  _Bool b7: 1;\n> +  _Bool b8: 1;\n> +  _Bool b9: 1;\n> +  _Bool b10: 1;\n> +  _Bool b11: 1;\n> +  _Bool b12: 1;\n> +  _Bool b13: 1;\n> +  _Bool b14: 1;\n> +  _Bool b15: 1;\n> +  _Bool b16: 1;\n> +  _Bool b17: 1;\n> +  _Bool b18: 1;\n> +  _Bool b19: 1;\n> +  _Bool b20: 1;\n> +  _Bool b21: 1;\n> +  _Bool b22: 1;\n> +  _Bool b23: 1;\n> +  _Bool b24: 1;\n> +  _Bool b25: 1;\n> +  _Bool b26: 1;\n> +  _Bool b27: 1;\n> +  _Bool b28: 1;\n> +  _Bool b29: 1;\n> +  _Bool b30: 1;\n> +  _Bool b31: 1;\n> +};\n> +\n> +#define T(N) void fb##N (struct S *s) { s->b##N = !s->b##N; }\n> +\n> +T(0)\n> +T(1)\n> +T(2)\n> +T(3)\n> +T(4)\n> +T(5)\n> +T(6)\n> +T(7)\n> +T(8)\n> +T(9)\n> +T(10)\n> +T(11)\n> +T(12)\n> +T(13)\n> +T(14)\n> +T(15)\n> +T(16)\n> +T(17)\n> +T(18)\n> +T(19)\n> +T(20)\n> +T(21)\n> +T(22)\n> +T(23)\n> +T(24)\n> +T(25)\n> +T(26)\n> +T(27)\n> +T(28)\n> +T(29)\n> +T(30)\n> +T(31)\n> +\n> +/* { dg-final { scan-assembler-times \"xor\\t|add.b\\t|bnot\\t\" 32 } } */\n> diff --git a/gcc/testsuite/gcc.target/riscv/pr80770-2.c b/gcc/testsuite/gcc.target/riscv/pr80770-2.c\n> new file mode 100644\n> index 000000000000..1514a49c5605\n> --- /dev/null\n> +++ b/gcc/testsuite/gcc.target/riscv/pr80770-2.c\n> @@ -0,0 +1,11 @@\n> +/* { dg-do compile } */\n> +/* { dg-additional-options \"-O2 -std=gnu99\" } */\n> +\n> +\n> +int foop(int x) { x &= 0xf; x |= (x + 0x80); return x; }\n> +int foox(int x) { x &= 0xf; x |= (x ^ 0x80); return x; }\n> +\n> +/* { dg-final { scan-assembler-not \"add\" } } */\n> +/* { dg-final { scan-assembler-not \"xor\" } } */\n> +/* { dg-final { scan-assembler-times \"andi\\t\" 2 } } */\n> +/* { dg-final { scan-assembler-times \"ori\\t\" 2 } } */\n> diff --git a/gcc/testsuite/gcc.target/riscv/pr80770.c b/gcc/testsuite/gcc.target/riscv/pr80770.c\n> new file mode 100644\n> index 000000000000..4dafe3955f05\n> --- /dev/null\n> +++ b/gcc/testsuite/gcc.target/riscv/pr80770.c\n> @@ -0,0 +1,150 @@\n> +/* { dg-do compile } */\n> +/* { dg-additional-options \"-std=gnu99\" } */\n> +/* { dg-skip-if \"\" { *-*-* } { \"-O0\" \"-O1\" } } */\n> +\n> +\n> +struct S {\n> +  _Bool b0: 1;\n> +  _Bool b1: 1;\n> +  _Bool b2: 1;\n> +  _Bool b3: 1;\n> +  _Bool b4: 1;\n> +  _Bool b5: 1;\n> +  _Bool b6: 1;\n> +  _Bool b7: 1;\n> +  _Bool b8: 1;\n> +  _Bool b9: 1;\n> +  _Bool b10: 1;\n> +  _Bool b11: 1;\n> +  _Bool b12: 1;\n> +  _Bool b13: 1;\n> +  _Bool b14: 1;\n> +  _Bool b15: 1;\n> +  _Bool b16: 1;\n> +  _Bool b17: 1;\n> +  _Bool b18: 1;\n> +  _Bool b19: 1;\n> +  _Bool b20: 1;\n> +  _Bool b21: 1;\n> +  _Bool b22: 1;\n> +  _Bool b23: 1;\n> +  _Bool b24: 1;\n> +  _Bool b25: 1;\n> +  _Bool b26: 1;\n> +  _Bool b27: 1;\n> +  _Bool b28: 1;\n> +  _Bool b29: 1;\n> +  _Bool b30: 1;\n> +  _Bool b31: 1;\n> +  _Bool b32: 1;\n> +  _Bool b33: 1;\n> +  _Bool b34: 1;\n> +  _Bool b35: 1;\n> +  _Bool b36: 1;\n> +  _Bool b37: 1;\n> +  _Bool b38: 1;\n> +  _Bool b39: 1;\n> +  _Bool b40: 1;\n> +  _Bool b41: 1;\n> +  _Bool b42: 1;\n> +  _Bool b43: 1;\n> +  _Bool b44: 1;\n> +  _Bool b45: 1;\n> +  _Bool b46: 1;\n> +  _Bool b47: 1;\n> +  _Bool b48: 1;\n> +  _Bool b49: 1;\n> +  _Bool b50: 1;\n> +  _Bool b51: 1;\n> +  _Bool b52: 1;\n> +  _Bool b53: 1;\n> +  _Bool b54: 1;\n> +  _Bool b55: 1;\n> +  _Bool b56: 1;\n> +  _Bool b57: 1;\n> +  _Bool b58: 1;\n> +  _Bool b59: 1;\n> +  _Bool b60: 1;\n> +  _Bool b61: 1;\n> +  _Bool b62: 1;\n> +  _Bool b63: 1;\n> +};\n> +\n> +#define T(N) void fb##N (struct S *s) { s->b##N = !s->b##N; }\n> +\n> +T(0)\n> +T(1)\n> +T(2)\n> +T(3)\n> +T(4)\n> +T(5)\n> +T(6)\n> +T(7)\n> +T(8)\n> +T(9)\n> +T(10)\n> +T(11)\n> +T(12)\n> +T(13)\n> +T(14)\n> +T(15)\n> +T(16)\n> +T(17)\n> +T(18)\n> +T(19)\n> +T(20)\n> +T(21)\n> +T(22)\n> +T(23)\n> +T(24)\n> +T(25)\n> +T(26)\n> +T(27)\n> +T(28)\n> +T(29)\n> +T(30)\n> +T(31)\n> +#if __riscv_xlen == 64\n> +T(32)\n> +T(33)\n> +T(34)\n> +T(35)\n> +T(36)\n> +T(37)\n> +T(38)\n> +T(39)\n> +T(40)\n> +T(41)\n> +T(42)\n> +T(43)\n> +T(44)\n> +T(45)\n> +T(46)\n> +T(47)\n> +T(48)\n> +T(49)\n> +T(50)\n> +T(51)\n> +T(52)\n> +T(53)\n> +T(54)\n> +T(55)\n> +T(56)\n> +T(57)\n> +T(58)\n> +T(59)\n> +T(60)\n> +T(61)\n> +T(62)\n> +T(63)\n> +#endif\n> +\n> +/* { dg-final { scan-assembler-times \"lbu\\t\" 64 { target rv64 } } } */\n> +/* { dg-final { scan-assembler-times \"lbu\\t\" 32 { target rv32 } } } */\n> +\n> +/* { dg-final { scan-assembler-times \"xori\\t\" 64 { target rv64 } } } */\n> +/* { dg-final { scan-assembler-times \"xori\\t\" 32 { target rv32 } } } */\n> +\n> +\n> +/* { dg-final { scan-assembler-times \"sb\\t\" 64 { target rv64 } } } */\n> +/* { dg-final { scan-assembler-times \"sb\\t\" 32 { target rv32 } } } */","headers":{"Return-Path":"<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=googlemail.com header.i=@googlemail.com\n header.a=rsa-sha256 header.s=20251104 header.b=adT+j0I+;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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charset=utf-8","Content-Transfer-Encoding":"quoted-printable","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list <gcc-patches.gcc.gnu.org>","List-Unsubscribe":"<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>","List-Archive":"<https://gcc.gnu.org/pipermail/gcc-patches/>","List-Post":"<mailto:gcc-patches@gcc.gnu.org>","List-Help":"<mailto:gcc-patches-request@gcc.gnu.org?subject=help>","List-Subscribe":"<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"}},{"id":3688925,"web_url":"http://patchwork.ozlabs.org/comment/3688925/","msgid":"<9149150b-a38b-4179-896f-124eb72841f9@oss.qualcomm.com>","list_archive_url":null,"date":"2026-05-09T21:39:56","subject":"Re: [to-be-committed][RISC-V][PR rtl-optimization/80770] Simplify bit\n flipping operations down to xor","submitter":{"id":92310,"url":"http://patchwork.ozlabs.org/api/people/92310/","name":"Jeffrey Law","email":"jeffrey.law@oss.qualcomm.com"},"content":"On 5/9/2026 3:24 PM, Richard Sandiford wrote:\n>> Further suggestions?\n>>\n>> Jeff\n>>\n>>\n>>\n>> diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc\n>> index ee3d9ec32082..08ae224847b1 100644\n>> --- a/gcc/simplify-rtx.cc\n>> +++ b/gcc/simplify-rtx.cc\n>> @@ -3900,6 +3900,83 @@ simplify_context::simplify_binary_operation_1 (rtx_code code,\n>>   \t  && negated_ops_p (XEXP (op0, 0), op1))\n>>   \treturn simplify_gen_binary (IOR, mode, XEXP (op0, 1), op1);\n>>   \n>> +      {\n>> +\trtx top0 = op0;\n>> +\trtx top1 = op1;\n>> +\tfor (int i = 0; i < 2; i++)\n>> +\t  {\n>> +\t    /* The outer IOR is commutative so try op0/op1 in their\n>> +\t       original position and reversed.  */\n>> +\t    if (i == 1)\n>> +\t      std::swap (top0, top1);\n> FWIW, it would also work to keep op0 and op1 and do the std::swap\n> at the end of the loop body.  Maybe that would be less error prone\n> wrt top vs op.\nI was originally worried about early exits from the loop and thus I \nwanted to leave op0/op1 alone.  But the only early exits are returns, so \nthe state of op0/op1 doesn't matter.  I could probably make a case for \neither form.   I suspect we're more likely to inadvertently use op0/op1 \nrather than the temporaries than we are to introduce a break in the \nloop.  Or maybe just put all the stuff into a function to avoid these \nworries.  I don't offhand think of a strong reason why this all needs to \nbe inlined.\n\n>\n>> +\n>> +\t    /* (ior X (plus/xor X C)) can be simplified into (ior X C) when\n>> +\t       X and C have no bits in common.  */\n> Maybe s/C/Y/ now that we're not requiring a constant.\nAgreed.  I'll change that too.\n\n\n> Do you still need the last transformation?  I was hoping that\n> nonzero_bits would return C1 for (and A C1), and so the first test\n> above would handle it.\nI'd hoped for the same, but it was still necessary for some of the H8 \ncases.  Though I did introduce a transient bug while adjusting things.  \nit's possible I'd tested when I had that transient bug in my tree (which \nprevented the first transformation from firing). I'll retest just to be \nsure.\n>\n> Otherwise LGTM FWIW.\nIt's worth a lot to me.  I'll make the two additional adjustments sniff \ntest and commit.\n\nThanks!\n\njeff","headers":{"Return-Path":"<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=DkaKYI8H;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=Do4pqH98;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=38.145.34.32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)","sourceware.org;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=DkaKYI8H;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=Do4pqH98","sourceware.org; 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i < 2; i++)\n>>> +\t  {\n>>> +\t    /* The outer IOR is commutative so try op0/op1 in their\n>>> +\t       original position and reversed.  */\n>>> +\t    if (i == 1)\n>>> +\t      std::swap (top0, top1);\n>> FWIW, it would also work to keep op0 and op1 and do the std::swap\n>> at the end of the loop body.  Maybe that would be less error prone\n>> wrt top vs op.\n> I was originally worried about early exits from the loop and thus I \n> wanted to leave op0/op1 alone.  But the only early exits are returns, so \n> the state of op0/op1 doesn't matter.  I could probably make a case for \n> either form.   I suspect we're more likely to inadvertently use op0/op1 \n> rather than the temporaries than we are to introduce a break in the \n> loop.  Or maybe just put all the stuff into a function to avoid these \n> worries.  I don't offhand think of a strong reason why this all needs to \n> be inlined.\n\nYeah. I suppose a lambda would keep it just as localised, but make it\nharder for mistakes to creep in.\n\nRichard","headers":{"Return-Path":"<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=googlemail.com header.i=@googlemail.com\n header.a=rsa-sha256 header.s=20251104 header.b=fLUp8OIc;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)","sourceware.org;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=googlemail.com header.i=@googlemail.com\n header.a=rsa-sha256 header.s=20251104 header.b=fLUp8OIc","sourceware.org; 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