[{"id":3687570,"web_url":"http://patchwork.ozlabs.org/comment/3687570/","msgid":"<20260507080003.E8EB1C2BCC9@smtp.kernel.org>","list_archive_url":null,"date":"2026-05-07T08:00:03","subject":"Re: [PATCH v8 phy-next 15/31] drm/rockchip: dw_hdmi: avoid direct\n dereference of phy->dev.of_node","submitter":{"id":93311,"url":"http://patchwork.ozlabs.org/api/people/93311/","name":null,"email":"sashiko-bot@kernel.org"},"content":"Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:\n- [Low] A PHY specifier is parsed and passed directly to a Clock framework API, conflating two different DT domains.\n--\n\ncommit 6a42fe45756ea5f0b8615efd6d337d5e679b8587\nAuthor: Vladimir Oltean \n\ndrm/rockchip: dw_hdmi: avoid direct dereference of phy->dev.of_node\n\nThe commit refactors dw_hdmi_rockchip_bind() to perform a manual phandle\nlookup on the hdmi PHY index within the controller's DT node, avoiding a\ndirect dereference of hdmi->phy->dev.of_node.\n\n> diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c\n> index 0dc1eb5d2ae39..7abb42e486c02 100644\n> --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c\n> +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c\n\n[ ... ]\n\n> @@ -588,13 +589,17 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,\n> \t\treturn dev_err_probe(hdmi->dev, ret, \"failed to get phy\\n\");\n> \t}\n> \n> -\tif (hdmi->phy) {\n> +\tindex = of_property_match_string(np, \"phy-names\", \"hdmi\");\n> +\tif (index >= 0) {\n> \t\tstruct of_phandle_args clkspec;\n> \n> -\t\tclkspec.np = hdmi->phy->dev.of_node;\n> -\t\thdmi->hdmiphy_clk = of_clk_get_from_provider(&clkspec);\n> -\t\tif (IS_ERR(hdmi->hdmiphy_clk))\n> -\t\t\thdmi->hdmiphy_clk = NULL;\n> +\t\tif (!of_parse_phandle_with_args(np, \"phys\", \"#phy-cells\", index,\n> +\t\t\t\t\t\t&clkspec)) {\n> +\t\t\thdmi->hdmiphy_clk = of_clk_get_from_provider(&clkspec);\n\nThis isn't a bug, but does this pass a PHY specifier directly to a Clock\nframework API?\n\nof_parse_phandle_with_args() parses the phys property using #phy-cells,\npopulating clkspec as a PHY specifier. This is then passed to\nof_clk_get_from_provider() which expects a Clock specifier governed by\n#clock-cells.\n\nWhile this does not cause a runtime failure here because the Rockchip HDMI\nPHY clock provider uses of_clk_src_simple_get and ignores the specifier\narguments, it appears to conflate two different DT domains.\n\nWould it be better to retrieve the device node using of_parse_phandle()\nand explicitly synthesize a 0-cell clock specifier to maintain the API\nabstraction?\n\n> +\t\t\tof_node_put(clkspec.np);\n> +\t\t\tif (IS_ERR(hdmi->hdmiphy_clk))\n> +\t\t\t\thdmi->hdmiphy_clk = NULL;\n> +\t\t}\n> \t}","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=OwFkEzGO;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; helo=sto.lore.kernel.org;\n envelope-from=linux-pci+bounces-54054-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"OwFkEzGO\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"],"Received":["from sto.lore.kernel.org (sto.lore.kernel.org\n [IPv6:2600:3c09:e001:a7::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4gB4Rh0SY8z1yKd\n\tfor ; Thu, 07 May 2026 18:00:16 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sto.lore.kernel.org (Postfix) with ESMTP id 428A8300D1FB\n\tfor ; Thu, 7 May 2026 08:00:13 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 90B4037D105;\n\tThu, 7 May 2026 08:00:06 +0000 (UTC)","from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id EF77437EFE2\n\tfor ; Thu, 7 May 2026 08:00:04 +0000 (UTC)","by smtp.kernel.org (Postfix) with ESMTPSA id E8EB1C2BCC9;\n\tThu, 7 May 2026 08:00:03 +0000 (UTC)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1778140805; cv=none;\n b=Z/ST1gMe9vVPPjeX6oOpMtvzKZ2ejWKTE1Sjs7ORu3vIQTyq+gGlmBg6hlsTikdOOpAmvr+h/fi9nD94RTo6WS3l3YDM0+EXX6hA+MQTEsBalrcqardxK4pJpUZAjfMhrr0DMSnmtiTb5SvW47B+2cVYddQenyHC2jo6vwH8clc=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1778140805; c=relaxed/simple;\n\tbh=Y9z3Gag4RVPz5yJ68hMHVKmLAv3951NtoVNOMhr9gpY=;\n\th=From:Subject:To:Cc:In-Reply-To:References:Content-Type:Date:\n\t Message-Id;\n b=TtCL9R6QZ8jYpMtKRlL3PDj+SBbagQIYSiEvXipnbXwb4WAngKguCo9QJCvploxw95XVqUVQOKfeI308OZvEEkSm6ePIqGkspYKnUVyFY9Eu8kkupy4ucG019HurcHnDJb3LARSCklOYWfp8Fp9Q5cbuLWn9Lm24tio3CN8Xltg=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=OwFkEzGO; arc=none smtp.client-ip=10.30.226.201","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1778140804;\n\tbh=Y9z3Gag4RVPz5yJ68hMHVKmLAv3951NtoVNOMhr9gpY=;\n\th=From:Subject:Reply-To:To:Cc:In-Reply-To:References:Date:From;\n\tb=OwFkEzGOOwok1wwnf+opft4KtsNMFL+MhYoxp6ev5IFcJ9f5rZlIsMn6nUtCt6phq\n\t cNKJI3OeUTjTVB4JWu81rIsl+lRzar9NkhJ1OKAIkaYOlpHH2LvLQO6INmWyStq7Zy\n\t V6SVuC4Ob0SwNyM5KziISKJpK60uTG1sQPpiLFiJymi4xGSTKKYSgPMwWdQp7xIR/L\n\t qetKFnigHdvdzUDDNMAkDVEenf46SnV6dFYZyNZLf+MakcFTCLrgWdFTekwL6s0Z5M\n\t kfVdcm+5uvNpThSGWT55NYe9vxIRYC/CAvLTNAMKEQR4xOn7acugb+Sny5A54R5eab\n\t yv4MBjrXQSHeg==","From":"sashiko-bot@kernel.org","Subject":"Re: [PATCH v8 phy-next 15/31] drm/rockchip: dw_hdmi: avoid direct\n dereference of phy->dev.of_node","Reply-To":"sashiko@lists.linux.dev","To":"\"Vladimir Oltean\" ","Cc":"wsa+renesas@sang-engineering.com, linux-pci@vger.kernel.org","In-Reply-To":"<20260505100523.1922388-16-vladimir.oltean@nxp.com>","References":"<20260505100523.1922388-16-vladimir.oltean@nxp.com>","Content-Type":"text/plain; charset=utf-8","Content-Transfer-Encoding":"quoted-printable","Date":"Thu, 07 May 2026 08:00:03 +0000","Message-Id":"<20260507080003.E8EB1C2BCC9@smtp.kernel.org>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":""}}]