[{"id":3687099,"web_url":"http://patchwork.ozlabs.org/comment/3687099/","msgid":"","list_archive_url":null,"date":"2026-05-06T14:00:43","subject":"Re: [PATCH v5 09/15] target/arm: load on canonical tag loads ext bits","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"content":"On 5/4/26 10:50, Gabriel Brookman wrote:\n> @@ -304,7 +304,7 @@ int load_tag1(uint64_t ptr, uint8_t *mem)\n> return extract32(*mem, ofs, 4);\n> }\n> \n> -uint64_t HELPER(ldg)(CPUARMState *env, uint64_t ptr, uint64_t xt)\n> +uint64_t HELPER(ldg)(CPUARMState *env, uint64_t ptr, uint64_t xt, uint32_t mtx)\n> {\n> int mmu_idx = arm_env_mmu_index(env);\n> uint8_t *mem;\n> @@ -317,6 +317,11 @@ uint64_t HELPER(ldg)(CPUARMState *env, uint64_t ptr, uint64_t xt)\n> /* Load if page supports tags. */\n> if (mem) {\n> rtag = load_tag1(ptr, mem);\n> + } else {\n> + uint64_t bit55 = extract64(ptr, 55, 1);\n> + if (mtx) {\n> + rtag = 0xF * bit55;\n> + }\n> }\n\nBetter as\n\n } else if (mtx) {\n uint64_t bit55 = extract64(ptr, 55, 1);\n rtag = 0xF * bit55;\n }\n\n> \n> return address_with_allocation_tag(xt, rtag);\n> @@ -458,17 +463,19 @@ void HELPER(st2g_stub)(CPUARMState *env, uint64_t ptr)\n> }\n> }\n> \n> -uint64_t HELPER(ldgm)(CPUARMState *env, uint64_t ptr)\n> +uint64_t HELPER(ldgm)(CPUARMState *env, uint64_t ptr, uint32_t mtx)\n> {\n> int mmu_idx = arm_env_mmu_index(env);\n> uintptr_t ra = GETPC();\n> int gm_bs = env_archcpu(env)->gm_blocksize;\n> int gm_bs_bytes = 4 << gm_bs;\n> void *tag_mem;\n> - uint64_t ret;\n> + uint64_t ret, canonical_tag_val;\n> int shift;\n> + bool bit55;\n> \n> ptr = QEMU_ALIGN_DOWN(ptr, gm_bs_bytes);\n> + bit55 = extract64(ptr, 55, 1);\n\nSink all this...\n\n> \n> /* Trap if accessing an invalid page. */\n> tag_mem = allocation_tag_mem(env, mmu_idx, ptr, MMU_DATA_LOAD,\n> @@ -476,6 +483,35 @@ uint64_t HELPER(ldgm)(CPUARMState *env, uint64_t ptr)\n> \n> /* The tag is squashed to zero if the page does not support tags. */\n> if (!tag_mem) {\n> + /* Load canonical value if mtx is set (untagged memory region) */\n> + if (mtx) {\n> + canonical_tag_val = -(uint64_t)bit55;\n\nDown to this block:\n\n if (mtx) {\n bool bit55 = extract64(ptr, 55, 1);\n\n> + switch (gm_bs) {\n> + case 3:\n> + /* 32 bytes -> 2 tags -> 8 result bits */\n> + ret = (uint8_t)canonical_tag_val;\n> + break;\n> + case 4:\n> + /* 64 bytes -> 4 tags -> 16 result bits */\n> + ret = (uint16_t)canonical_tag_val;\n> + break;\n> + case 5:\n> + /* 128 bytes -> 8 tags -> 32 result bits */\n> + ret = (uint32_t)canonical_tag_val;\n> + break;\n> + case 6:\n> + /* 256 bytes -> 16 tags -> 64 result bits */\n> + return canonical_tag_val;\n> + default:\n> + /*\n> + * CPU configured with unsupported/invalid gm blocksize.\n> + * This is detected early in arm_cpu_realizefn.\n> + */\n> + g_assert_not_reached();\n> + }\n\nThis doesn't need a switch.\n\n ret = extract64(-bit55, 0, 1 << gm_bs);\n\n\nr~","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=P8YL5mMe;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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