[{"id":3685710,"web_url":"http://patchwork.ozlabs.org/comment/3685710/","msgid":"","list_archive_url":null,"date":"2026-05-04T12:21:36","subject":"Re: [Intel-wired-lan] [PATCH iwl-net] ice: fix missing priority\n callbacks for U.FL DPLL pins","submitter":{"id":70275,"url":"http://patchwork.ozlabs.org/api/people/70275/","name":"Paul Menzel","email":"pmenzel@molgen.mpg.de"},"content":"Dear Petr,\n\n\nThank you for your patch.\n\nAm 04.05.26 um 14:16 schrieb Petr Oros:\n> The U.FL2 input pin advertises DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE\n> in its capability mask, but ice_dpll_pin_ufl_ops does not provide\n> .prio_get and .prio_set callbacks. As a result the DPLL subsystem\n> cannot report or accept priority for U.FL pins: pin-get omits the prio\n> field on U.FL2 and pin-set with prio is rejected as invalid, even\n> though the capability is present. This prevents user space from using\n> priority to select or disable U.FL2 as a DPLL input source.\n> \n> Add the missing .prio_get and .prio_set callbacks to\n> ice_dpll_pin_ufl_ops, reusing ice_dpll_sw_input_prio_{get,set}. The\n> same ops struct is shared by U.FL1 and U.FL2: U.FL2 (input) delegates\n> to the backing hardware input pin, while U.FL1 (output) does not\n> advertise DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE so the dpll core\n> capability gate never invokes the callback for it. The reused helpers\n> also guard on p->direction != DPLL_PIN_DIRECTION_INPUT and !p->input\n> as defense in depth.\n\nShould you resend, it’d be great if you listed the user space commands \nto reproduce this.\n\n> Fixes: 2dd5d03c77e2 (\"ice: redesign dpll sma/u.fl pins control\")\n> Signed-off-by: Petr Oros \n> ---\n> drivers/net/ethernet/intel/ice/ice_dpll.c | 2 ++\n> 1 file changed, 2 insertions(+)\n> \n> diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c\n> index 27b460926baced..be72a076f7a15c 100644\n> --- a/drivers/net/ethernet/intel/ice/ice_dpll.c\n> +++ b/drivers/net/ethernet/intel/ice/ice_dpll.c\n> @@ -2628,6 +2628,8 @@ static const struct dpll_pin_ops ice_dpll_pin_ufl_ops = {\n> \t.state_on_dpll_set = ice_dpll_ufl_pin_state_set,\n> \t.state_on_dpll_get = ice_dpll_sw_pin_state_get,\n> \t.direction_get = ice_dpll_pin_sw_direction_get,\n> +\t.prio_get = ice_dpll_sw_input_prio_get,\n> +\t.prio_set = ice_dpll_sw_input_prio_set,\n> \t.frequency_get = ice_dpll_sw_pin_frequency_get,\n> \t.frequency_set = ice_dpll_sw_pin_frequency_set,\n> \t.esync_set = ice_dpll_sw_esync_set,\n\nReviewed-by: Paul Menzel \n\n\nKind regards,\n\nPaul","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=9DDwh1XJ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::138; 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Miller\" ,\n linux-kernel@vger.kernel.org","References":"<20260504121603.1702674-1-poros@redhat.com>","Content-Language":"en-US","From":"Paul Menzel ","In-Reply-To":"<20260504121603.1702674-1-poros@redhat.com>","Content-Type":"text/plain; charset=UTF-8; format=flowed","Content-Transfer-Encoding":"8bit","X-Mailman-Original-Authentication-Results":"smtp4.osuosl.org;\n dmarc=none (p=none dis=none)\n header.from=molgen.mpg.de","Subject":"Re: [Intel-wired-lan] [PATCH iwl-net] ice: fix missing priority\n callbacks for U.FL DPLL pins","X-BeenThere":"intel-wired-lan@osuosl.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Intel Wired Ethernet Linux Kernel Driver Development\n ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"intel-wired-lan-bounces@osuosl.org","Sender":"\"Intel-wired-lan\" "}},{"id":3685712,"web_url":"http://patchwork.ozlabs.org/comment/3685712/","msgid":"","list_archive_url":null,"date":"2026-05-04T12:23:10","subject":"Re: [Intel-wired-lan] [PATCH iwl-net] ice: fix missing priority\n callbacks for U.FL DPLL pins","submitter":{"id":75597,"url":"http://patchwork.ozlabs.org/api/people/75597/","name":"Loktionov, Aleksandr","email":"aleksandr.loktionov@intel.com"},"content":"> -----Original Message-----\n> From: Intel-wired-lan On Behalf\n> Of Petr Oros\n> Sent: Monday, May 4, 2026 2:16 PM\n> To: netdev@vger.kernel.org\n> Cc: Kitszel, Przemyslaw ; Eric Dumazet\n> ; Kubalewski, Arkadiusz\n> ; Andrew Lunn ;\n> Nguyen, Anthony L ; Simon Horman\n> ; intel-wired-lan@lists.osuosl.org; Jakub Kicinski\n> ; Paolo Abeni ; David S. Miller\n> ; linux-kernel@vger.kernel.org\n> Subject: [Intel-wired-lan] [PATCH iwl-net] ice: fix missing priority\n> callbacks for U.FL DPLL pins\n> \n> The U.FL2 input pin advertises\n> DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE\n> in its capability mask, but ice_dpll_pin_ufl_ops does not provide\n> .prio_get and .prio_set callbacks. As a result the DPLL subsystem\n> cannot report or accept priority for U.FL pins: pin-get omits the prio\n> field on U.FL2 and pin-set with prio is rejected as invalid, even\n> though the capability is present. This prevents user space from using\n> priority to select or disable U.FL2 as a DPLL input source.\n> \n> Add the missing .prio_get and .prio_set callbacks to\n> ice_dpll_pin_ufl_ops, reusing ice_dpll_sw_input_prio_{get,set}. The\n> same ops struct is shared by U.FL1 and U.FL2: U.FL2 (input) delegates\n> to the backing hardware input pin, while U.FL1 (output) does not\n> advertise DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE so the dpll core\n> capability gate never invokes the callback for it. The reused helpers\n> also guard on p->direction != DPLL_PIN_DIRECTION_INPUT and !p->input\n> as defense in depth.\n> \n> Fixes: 2dd5d03c77e2 (\"ice: redesign dpll sma/u.fl pins control\")\n> Signed-off-by: Petr Oros \n> ---\n> drivers/net/ethernet/intel/ice/ice_dpll.c | 2 ++\n> 1 file changed, 2 insertions(+)\n> \n> diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c\n> b/drivers/net/ethernet/intel/ice/ice_dpll.c\n> index 27b460926baced..be72a076f7a15c 100644\n> --- a/drivers/net/ethernet/intel/ice/ice_dpll.c\n> +++ b/drivers/net/ethernet/intel/ice/ice_dpll.c\n> @@ -2628,6 +2628,8 @@ static const struct dpll_pin_ops\n> ice_dpll_pin_ufl_ops = {\n> \t.state_on_dpll_set = ice_dpll_ufl_pin_state_set,\n> \t.state_on_dpll_get = ice_dpll_sw_pin_state_get,\n> \t.direction_get = ice_dpll_pin_sw_direction_get,\n> +\t.prio_get = ice_dpll_sw_input_prio_get,\n> +\t.prio_set = ice_dpll_sw_input_prio_set,\n> \t.frequency_get = ice_dpll_sw_pin_frequency_get,\n> \t.frequency_set = ice_dpll_sw_pin_frequency_set,\n> \t.esync_set = ice_dpll_sw_esync_set,\n> --\n> 2.53.0\n\nReviewed-by: Aleksandr Loktionov ","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=Mk2Cf2iu;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::137; 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