[{"id":3685652,"web_url":"http://patchwork.ozlabs.org/comment/3685652/","msgid":"<67a45038-e4bb-48f8-af08-af0d5c308ece@linaro.org>","list_archive_url":null,"date":"2026-05-04T11:18:55","subject":"Re: [PATCH v6 08/11] hw/usb/hcd-ehci: Add ctrldssegment-default\n property","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"content":"On 4/5/26 04:53, Jamin Lin wrote:\n> When 64-bit addressing is supported, the Linux EHCI driver programs the\n> segment register to zero. See ehci_run function:\n> https://github.com/torvalds/linux/blob/master/drivers/usb/host/ehci-hcd.c\n> \n> The driver comment also notes that descriptor structures allocated from\n> the DMA pool use segment zero semantics.\n> \n> Descriptor memory is allocated using the DMA API. The platform driver\n> configures a 64-bit DMA mask so memory can be allocated above 4GB.\n> See ehci_platform_probe function:\n> https://github.com/torvalds/linux/blob/master/drivers/usb/host/ehci-platform.c\n> \n> On AST2700 platforms, system DRAM is mapped above 4GB at 0x400000000.\n> As a result, descriptor addresses constructed directly from the guest\n> EHCI registers do not match the actual system address used by the\n> controller when fetching queue heads (QH) and queue element transfer\n> descriptors (qTD).\n> \n> Add a ctrldssegment-default property so platforms can provide a\n> descriptor address offset when constructing descriptor addresses.\n> This allows systems where DRAM resides above 4GB to access EHCI\n> descriptors correctly.\n> \n> The default value is zero, so existing machines are not affected.\n> \n> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>\n> Reviewed-by: Cédric Le Goater <clg@redhat.com>\n> ---\n>   hw/usb/hcd-ehci.h | 5 ++++-\n>   hw/usb/hcd-ehci.c | 1 +\n>   2 files changed, 5 insertions(+), 1 deletion(-)\n> \n> diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h\n> index 8e6a8cdfb0..3d57e1de5f 100644\n> --- a/hw/usb/hcd-ehci.h\n> +++ b/hw/usb/hcd-ehci.h\n> @@ -264,6 +264,7 @@ struct EHCIState {\n>       uint32_t maxframes;\n>       bool migrate_fetch_addr_64bit;\n>       bool caps_64bit_addr;\n> +    uint32_t ctrldssegment_default;\n>   \n>       /*\n>        *  EHCI spec version 1.0 Section 2.3\n> @@ -322,7 +323,9 @@ struct EHCIState {\n>       DEFINE_PROP_BOOL(\"x-migrate-fetch-addr-64bit\", _state, \\\n>                        ehci.migrate_fetch_addr_64bit, true), \\\n>       DEFINE_PROP_BOOL(\"caps-64bit-addr\", _state, \\\n> -                     ehci.caps_64bit_addr, false)\n> +                     ehci.caps_64bit_addr, false), \\\n> +    DEFINE_PROP_UINT32(\"ctrldssegment-default\", _state, \\\n> +                       ehci.ctrldssegment_default, 0)\n\nctrl-ds-segment-default and ctrl_ds_segment_default?\n\nOtherwise,\nReviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>","headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=sxqEk38D;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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