[{"id":3685227,"web_url":"http://patchwork.ozlabs.org/comment/3685227/","msgid":"<f9336d01-e2d1-4894-848a-17ab20976872@lunn.ch>","list_archive_url":null,"date":"2026-05-01T21:07:09","subject":"Re: [PATCH net-next 11/12] misc: tc956x_pci: add TC956x/QPS615\n support","submitter":{"id":13608,"url":"http://patchwork.ozlabs.org/api/people/13608/","name":"Andrew Lunn","email":"andrew@lunn.ch"},"content":"> diff --git a/drivers/misc/tc956x_pci.c b/drivers/misc/tc956x_pci.c\n\n> +static inline void chip_reset_assert(const struct tc956x_chip *chip,\n> +\t\t\t\t     enum reset_id id)\n> +{\n> +\ttc956x_reset_clock_set(chip, true, true, true, (u8)id);\n> +}\n\nThis is in drivers/misc, where the rules might be different. But in\nnetdev, we don't like inline functions in .c files. It is better to\nlet the compiler decide.\n\n> +static void chip_init_state(struct tc956x_chip *chip)\n> +{\n> +\t/* The only IP block we currently use is MSIGEN */\n> +\tchip_reset_assert(chip, RESET_MCU);\n> +\tchip_reset_assert(chip, RESET_MCU1);\n> +\tchip_reset_assert(chip, RESET_INTC);\n> +\tchip_reset_assert(chip, RESET_UART0);\n> +\tchip_clock_disable(chip, CLOCK_MCU);\n> +\tchip_clock_disable(chip, CLOCK_SRAM);\n> +\tchip_clock_disable(chip, CLOCK_PLL);\n> +\tchip_clock_disable(chip, CLOCK_SGMII);\n\nWith my networking hat on, this one standard out.\n\n> +\tchip_clock_disable(chip, CLOCK_REFCLK);\n\nThe name REFCLK is sometimes used as for the clock signals for RGMII?\n\n> +static int\n> +tc956x_function_probe(struct pci_dev *pdev, const struct pci_device_id *id)\n> +{\n> +\tstruct device *dev = &pdev->dev;\n> +\tstruct tc956x_chip *chip;\n> +\tunsigned int msigen_irq;\n> +\tint ret;\n> +\n> +\t/* Despite being a PCI device, we require devicetree */\n> +\tif (!dev->of_node)\n> +\t\treturn -EINVAL;\n\nMight be worth a dev_err(), since it is unusual.\n\n\tAndrew","headers":{"Return-Path":"\n <linux-gpio+bounces-35975-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=lunn.ch header.i=@lunn.ch header.a=rsa-sha256\n header.s=20171124 header.b=gXstL101;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; 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b=gXstL101nagcCiccTw5+p86AFI\n\tLCVmkJk5MzBQrdomImehrJrPQ5TcMdXkBKDpTrJH8Nzremn/xMQUc42PTv2HqdmW3k9TDYfeSQu6/\n\tNedeeZiflcknh8Jh9+gDnBe6QiG4b58NO6jTt4zCgB6LQI1eGJ8L39MQiugt3vvps6xo=;","Date":"Fri, 1 May 2026 23:07:09 +0200","From":"Andrew Lunn <andrew@lunn.ch>","To":"Alex Elder <elder@riscstar.com>","Cc":"andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com,\n\tkuba@kernel.org, pabeni@redhat.com, maxime.chevallier@bootlin.com,\n\trmk+kernel@armlinux.org.uk, andersson@kernel.org,\n\tkonradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org,\n\tconor+dt@kernel.org, linusw@kernel.org, brgl@kernel.org,\n\tarnd@arndb.de, gregkh@linuxfoundation.org, daniel@riscstar.com,\n\tmohd.anwar@oss.qualcomm.com, a0987203069@gmail.com,\n\talexandre.torgue@foss.st.com, ast@kernel.org,\n\tboon.khai.ng@altera.com, chenchuangyu@xiaomi.com,\n\tchenhuacai@kernel.org, daniel@iogearbox.net, hawk@kernel.org,\n\thkallweit1@gmail.com, inochiama@gmail.com, john.fastabend@gmail.com,\n\tjulianbraha@gmail.com, livelycarpet87@gmail.com,\n\tmatthew.gerlach@altera.com, mcoquelin.stm32@gmail.com, me@ziyao.cc,\n\tprabhakar.mahadev-lad.rj@bp.renesas.com, richardcochran@gmail.com,\n\trohan.g.thomas@altera.com, sdf@fomichev.me,\n\tsiyanteng@cqsoftware.com.cn, weishangjuan@eswincomputing.com,\n\twens@kernel.org, netdev@vger.kernel.org, bpf@vger.kernel.org,\n\tlinux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-gpio@vger.kernel.org,\n\tlinux-stm32@st-md-mailman.stormreply.com,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org","Subject":"Re: [PATCH net-next 11/12] misc: tc956x_pci: add TC956x/QPS615\n support","Message-ID":"<f9336d01-e2d1-4894-848a-17ab20976872@lunn.ch>","References":"<20260501155421.3329862-1-elder@riscstar.com>\n <20260501155421.3329862-12-elder@riscstar.com>","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"<linux-gpio.vger.kernel.org>","List-Subscribe":"<mailto:linux-gpio+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-gpio+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Type":"text/plain; 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