[{"id":3685187,"web_url":"http://patchwork.ozlabs.org/comment/3685187/","msgid":"","list_archive_url":null,"date":"2026-05-01T17:21:50","subject":"Re: [PATCH net-next 05/12] net: stmmac: dwxgmac2: Add multi MSI\n interrupt mode","submitter":{"id":13608,"url":"http://patchwork.ozlabs.org/api/people/13608/","name":"Andrew Lunn","email":"andrew@lunn.ch"},"content":"On Fri, May 01, 2026 at 10:54:13AM -0500, Alex Elder wrote:\n> From: Daniel Thompson \n> \n> Currently there are no XGMAC platforms integrated using the multi MSI\n> interrupt mode. In other words no existing driver sets both\n> DWMAC_CORE_XGMAC and STMMAC_FLAG_MULTI_MSI_EN.\n> \n> In order to support systems that do enable both options (such as the\n> Toshiba TC9564 whose driver is currently being developed) we need to\n> add logic to the XGMAC DMA callbacks. Happily we can simply\n> replicate similar code from GMAC4. Let's do that!\n\nThe word replicate made me think it has been cut/paste, rather than\nbeing refactored into a helper. However,\n\n> +#define XGMAC_INTM_MASK\t\t\tGENMASK(13, 12)\n\n#define DMA_BUS_MODE_INTM_MASK\t\tGENMASK(17, 16)\n\nDifferent bits in the register, so the code structure is the same, but\nthe code cannot be shared in a meaningful way. So this is O.K.\n\n Andrew","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=lunn.ch header.i=@lunn.ch header.a=rsa-sha256\n header.s=20171124 header.b=3ooCs7Vk;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35968-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch\n header.b=\"3ooCs7Vk\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=156.67.10.101","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=lunn.ch","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=lunn.ch"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g6dCL0VXCz1xvV\n\tfor ; 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b=3ooCs7Vkrx4fZwYWsBPIMUBZEs\n\tEEP0t6lZIJIZaJyPnnt5FPRYpVnMHEXpy7YBIDkRFBeoYWpS8m23bGDsyIQnJGOtkQj16pBU4G9oa\n\tJCai3Ie1xvAMoitw3cDAslP2FIT3HPzLOtxYimdxOlBS+143TO4PMiJ6Zn42eB3cNlkM=;","Date":"Fri, 1 May 2026 19:21:50 +0200","From":"Andrew Lunn ","To":"Alex Elder ","Cc":"andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com,\n\tkuba@kernel.org, pabeni@redhat.com, maxime.chevallier@bootlin.com,\n\trmk+kernel@armlinux.org.uk, andersson@kernel.org,\n\tkonradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org,\n\tconor+dt@kernel.org, linusw@kernel.org, brgl@kernel.org,\n\tarnd@arndb.de, gregkh@linuxfoundation.org,\n\tDaniel Thompson , mohd.anwar@oss.qualcomm.com,\n\ta0987203069@gmail.com, alexandre.torgue@foss.st.com, ast@kernel.org,\n\tboon.khai.ng@altera.com, chenchuangyu@xiaomi.com,\n\tchenhuacai@kernel.org, daniel@iogearbox.net, hawk@kernel.org,\n\thkallweit1@gmail.com, inochiama@gmail.com, john.fastabend@gmail.com,\n\tjulianbraha@gmail.com, livelycarpet87@gmail.com,\n\tmatthew.gerlach@altera.com, mcoquelin.stm32@gmail.com, me@ziyao.cc,\n\tprabhakar.mahadev-lad.rj@bp.renesas.com, richardcochran@gmail.com,\n\trohan.g.thomas@altera.com, sdf@fomichev.me,\n\tsiyanteng@cqsoftware.com.cn, weishangjuan@eswincomputing.com,\n\twens@kernel.org, netdev@vger.kernel.org, bpf@vger.kernel.org,\n\tlinux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-gpio@vger.kernel.org,\n\tlinux-stm32@st-md-mailman.stormreply.com,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org","Subject":"Re: [PATCH net-next 05/12] net: stmmac: dwxgmac2: Add multi MSI\n interrupt mode","Message-ID":"","References":"<20260501155421.3329862-1-elder@riscstar.com>\n <20260501155421.3329862-6-elder@riscstar.com>","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; 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