[{"id":3685102,"web_url":"http://patchwork.ozlabs.org/comment/3685102/","msgid":"","list_archive_url":null,"date":"2026-05-01T10:59:21","subject":"Re: [PULL 23/28] hvf: sync registers used at EL2","submitter":{"id":2747,"url":"http://patchwork.ozlabs.org/api/people/2747/","name":"Stefan Hajnoczi","email":"stefanha@gmail.com"},"content":"On Fri, May 1, 2026 at 6:18 AM Peter Maydell wrote:\n>\n> From: Mohamed Mediouni \n>\n> When starting up the VM at EL2, more sysregs are available. Sync the state of those.\n>\n> In addition, sync the state of the EL1 physical timer when the vGIC is used, even\n> if running at EL1. However, no OS running at EL1 is expected to use those registers.\n\nHi Mohamed and Peter,\nPlease take a look at the following CI failure:\n\nIn file included from ../target/arm/hvf/hvf.c:497:\n../target/arm/hvf/sysreg.c.inc:187:1: error: static assertion failed\ndue to requirement '!(HV_SYS_REG_MDCR_EL2 != (((((1 << 28) | (19 <<\n16) | ((3) << 14) | ((4) << 11) | ((1) << 7) | ((1) << 3) | ((1) <<\n0)) | 13510798882111488ULL)) & 65535))': not expecting:\nHV_SYS_REG_MDCR_EL2 != KVMID_TO_HVF(KVMID_AA64_SYS_REG64(3, 4, 1, 1,\n1))\n187 | DEF_SYSREG_EL2(HV_SYS_REG_MDCR_EL2, 3, 4, 1, 1, 1)\n| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n../target/arm/hvf/hvf.c:489:3: note: expanded from macro 'DEF_SYSREG_EL2'\n489 | QEMU_BUILD_BUG_ON(HVF_ID !=\nKVMID_TO_HVF(KVMID_AA64_SYS_REG64(__VA_ARGS__)));\n| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n/private/var/folders/q_/v_6k8zks62lb0q_8f10mvn8h0000gn/T/cirrus-ci-build/include/qemu/compiler.h:74:30:\nnote: expanded from macro 'QEMU_BUILD_BUG_ON'\n74 | #define QEMU_BUILD_BUG_ON(x) QEMU_BUILD_BUG_MSG(x, \"not expecting: \" #x)\n| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n/private/var/folders/q_/v_6k8zks62lb0q_8f10mvn8h0000gn/T/cirrus-ci-build/include/qemu/compiler.h:72:51:\nnote: expanded from macro 'QEMU_BUILD_BUG_MSG'\n72 | #define QEMU_BUILD_BUG_MSG(x, msg) _Static_assert(!(x), msg)\n| ^~~~\n1 error generated.\n\nhttps://gitlab.com/qemu-project/qemu/-/jobs/14176182142#L5618\n\nPeter: Please resend the pull request with fixed patches or this patch removed.\n\nThanks,\nStefan\n\n>\n> Signed-off-by: Mohamed Mediouni \n> Reviewed-by: Philippe Mathieu-Daudé \n> Message-id: 20260429190532.26538-11-mohamed@unpredictable.fr\n> Signed-off-by: Peter Maydell \n> ---\n> target/arm/hvf/hvf.c | 61 +++++++++++++++++++++++++++++++++----\n> target/arm/hvf/sysreg.c.inc | 44 ++++++++++++++++++++++++++\n> 2 files changed, 99 insertions(+), 6 deletions(-)\n>\n> diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c\n> index 38f88c1a80..ecfe06cd8c 100644\n> --- a/target/arm/hvf/hvf.c\n> +++ b/target/arm/hvf/hvf.c\n> @@ -467,37 +467,75 @@ static const struct hvf_reg_match hvf_sme2_preg_match[] = {\n> *\n> * SME2 registers are guarded by a runtime availability attribute instead of a\n> * compile-time def, so verify those at runtime in hvf_arch_init_vcpu() below.\n> + *\n> + * Nested virt registers are handled via a runtime check, so override the\n> + * guarded availability check done by Clang.\n> */\n>\n> +#pragma clang diagnostic push\n> +#pragma clang diagnostic ignored \"-Wunguarded-availability\"\n> +\n> #define DEF_SYSREG(HVF_ID, ...) \\\n> QEMU_BUILD_BUG_ON(HVF_ID != KVMID_TO_HVF(KVMID_AA64_SYS_REG64(__VA_ARGS__)));\n> #define DEF_SYSREG_15_02(...)\n>\n> +#define DEF_SYSREG_EL2(HVF_ID, ...) \\\n> + QEMU_BUILD_BUG_ON(HVF_ID != KVMID_TO_HVF(KVMID_AA64_SYS_REG64(__VA_ARGS__)));\n> +\n> +#define DEF_SYSREG_VGIC(HVF_ID, ...) \\\n> + QEMU_BUILD_BUG_ON(HVF_ID != KVMID_TO_HVF(KVMID_AA64_SYS_REG64(__VA_ARGS__)));\n> +\n> +#define DEF_SYSREG_VGIC_EL2(HVF_ID, ...) \\\n> + QEMU_BUILD_BUG_ON(HVF_ID != KVMID_TO_HVF(KVMID_AA64_SYS_REG64(__VA_ARGS__)));\n> +\n> #include \"sysreg.c.inc\"\n>\n> #undef DEF_SYSREG\n> #undef DEF_SYSREG_15_02\n> +#undef DEF_SYSREG_EL2\n> +#undef DEF_SYSREG_VGIC\n> +#undef DEF_SYSREG_VGIC_EL2\n>\n> -#define DEF_SYSREG(HVF_ID, op0, op1, crn, crm, op2) HVF_ID,\n> +#define DEF_SYSREG(HVF_ID, op0, op1, crn, crm, op2) {HVF_ID},\n> #define DEF_SYSREG_15_02(...)\n> +#define DEF_SYSREG_EL2(HVF_ID, op0, op1, crn, crm, op2) {HVF_ID, .el2 = true},\n> +#define DEF_SYSREG_VGIC(HVF_ID, op0, op1, crn, crm, op2) {HVF_ID, .vgic = true},\n> +#define DEF_SYSREG_VGIC_EL2(HVF_ID, op0, op1, crn, crm, op2) {HVF_ID, true, true},\n>\n> -static const hv_sys_reg_t hvf_sreg_list[] = {\n> +struct hvf_sreg {\n> + hv_sys_reg_t sreg;\n> + bool vgic;\n> + bool el2;\n> +};\n> +\n> +static struct hvf_sreg hvf_sreg_list[] = {\n> #include \"sysreg.c.inc\"\n> };\n>\n> #undef DEF_SYSREG\n> #undef DEF_SYSREG_15_02\n> +#undef DEF_SYSREG_EL2\n> +#undef DEF_SYSREG_VGIC\n> +#undef DEF_SYSREG_VGIC_EL2\n> +\n> +#pragma clang diagnostic pop\n>\n> #define DEF_SYSREG(...)\n> -#define DEF_SYSREG_15_02(HVF_ID, op0, op1, crn, crm, op2) HVF_ID,\n> +#define DEF_SYSREG_15_02(HVF_ID, op0, op1, crn, crm, op2) {HVF_ID},\n> +#define DEF_SYSREG_EL2(...)\n> +#define DEF_SYSREG_VGIC(...)\n> +#define DEF_SYSREG_VGIC_EL2(...)\n>\n> API_AVAILABLE(macos(15.2))\n> -static const hv_sys_reg_t hvf_sreg_list_sme2[] = {\n> +static struct hvf_sreg hvf_sreg_list_sme2[] = {\n> #include \"sysreg.c.inc\"\n> };\n>\n> #undef DEF_SYSREG\n> #undef DEF_SYSREG_15_02\n> +#undef DEF_SYSREG_EL2\n> +#undef DEF_SYSREG_VGIC\n> +#undef DEF_SYSREG_VGIC_EL2\n>\n> /*\n> * For FEAT_SME2 migration, we need to store PSTATE.{SM,ZA} bits which are\n> @@ -1335,6 +1373,9 @@ int hvf_arch_init_vcpu(CPUState *cpu)\n> #define DEF_SYSREG_15_02(HVF_ID, ...) \\\n> g_assert(HVF_ID == KVMID_TO_HVF(KVMID_AA64_SYS_REG64(__VA_ARGS__)));\n> #define DEF_SYSREG(...)\n> +#define DEF_SYSREG_EL2(...)\n> +#define DEF_SYSREG_VGIC(...)\n> +#define DEF_SYSREG_VGIC_EL2(...)\n>\n> #include \"sysreg.c.inc\"\n>\n> @@ -1362,11 +1403,19 @@ int hvf_arch_init_vcpu(CPUState *cpu)\n>\n> /* Populate cp list for all known sysregs */\n> for (i = 0; i < ARRAY_SIZE(hvf_sreg_list); i++) {\n> - hv_sys_reg_t hvf_id = hvf_sreg_list[i];\n> + hv_sys_reg_t hvf_id = hvf_sreg_list[i].sreg;\n> uint64_t kvm_id = HVF_TO_KVMID(hvf_id);\n> uint32_t key = kvm_to_cpreg_id(kvm_id);\n> const ARMCPRegInfo *ri = get_arm_cp_reginfo(arm_cpu->cp_regs, key);\n>\n> + if (hvf_sreg_list[i].vgic && !hvf_irqchip_in_kernel()) {\n> + continue;\n> + }\n> +\n> + if (hvf_sreg_list[i].el2 && !hvf_nested_virt_enabled()) {\n> + continue;\n> + }\n> +\n> if (ri) {\n> assert(!(ri->type & ARM_CP_NO_RAW));\n> arm_cpu->cpreg_indexes[sregs_cnt++] = kvm_id;\n> @@ -1375,7 +1424,7 @@ int hvf_arch_init_vcpu(CPUState *cpu)\n> if (__builtin_available(macOS 15.2, *)) {\n> if (hvf_arm_sme2_supported()) {\n> for (i = 0; i < ARRAY_SIZE(hvf_sreg_list_sme2); i++) {\n> - hv_sys_reg_t hvf_id = hvf_sreg_list_sme2[i];\n> + hv_sys_reg_t hvf_id = hvf_sreg_list_sme2[i].sreg;\n> uint64_t kvm_id = HVF_TO_KVMID(hvf_id);\n> uint32_t key = kvm_to_cpreg_id(kvm_id);\n> const ARMCPRegInfo *ri = get_arm_cp_reginfo(arm_cpu->cp_regs, key);\n> diff --git a/target/arm/hvf/sysreg.c.inc b/target/arm/hvf/sysreg.c.inc\n> index 7a2f880f78..c11dbf274e 100644\n> --- a/target/arm/hvf/sysreg.c.inc\n> +++ b/target/arm/hvf/sysreg.c.inc\n> @@ -153,3 +153,47 @@ DEF_SYSREG_15_02(HV_SYS_REG_ID_AA64ZFR0_EL1, 3, 0, 0, 4, 4)\n> DEF_SYSREG_15_02(HV_SYS_REG_ID_AA64SMFR0_EL1, 3, 0, 0, 4, 5)\n> DEF_SYSREG_15_02(HV_SYS_REG_SMPRI_EL1, 3, 0, 1, 2, 4)\n> DEF_SYSREG_15_02(HV_SYS_REG_SMCR_EL1, 3, 0, 1, 2, 6)\n> +/*\n> + * Block these because of the same issue as virtual counters in\n> + * that caused the revert in 28b0ed32b32c7e5094cf2f1ec9c0645c65fad2aa\n> + *\n> + * DEF_SYSREG_VGIC(HV_SYS_REG_CNTP_CTL_EL0, 3, 3, 14, 2, 1)\n> + * DEF_SYSREG_VGIC(HV_SYS_REG_CNTP_CVAL_EL0, 3, 3, 14, 2, 2)\n> + */\n> +#ifdef SYNC_NO_RAW_REGS\n> +DEF_SYSREG_VGIC(HV_SYS_REG_CNTP_TVAL_EL0, 3, 3, 14, 2, 0)\n> +#endif\n> +\n> +/*\n> + * Also block these because of the same issue as virtual counters in\n> + * that caused the revert in 28b0ed32b32c7e5094cf2f1ec9c0645c65fad2aa\n> + *\n> + * DEF_SYSREG_VGIC_EL2(HV_SYS_REG_CNTHP_CVAL_EL2, 3, 4, 14, 2, 2)\n> + * DEF_SYSREG_VGIC_EL2(HV_SYS_REG_CNTHP_CTL_EL2, 3, 4, 14, 2, 1)\n> + */\n> +DEF_SYSREG_VGIC_EL2(HV_SYS_REG_CNTHCTL_EL2, 3, 4, 14, 1, 0)\n> +#ifdef SYNC_NO_RAW_REGS\n> +DEF_SYSREG_VGIC_EL2(HV_SYS_REG_CNTHP_TVAL_EL2, 3, 4, 14, 2, 0)\n> +#endif\n> +DEF_SYSREG_VGIC_EL2(HV_SYS_REG_CNTVOFF_EL2, 3, 4, 14, 0, 3)\n> +\n> +DEF_SYSREG_EL2(HV_SYS_REG_CPTR_EL2, 3, 4, 1, 1, 2)\n> +DEF_SYSREG_EL2(HV_SYS_REG_ELR_EL2, 3, 4, 4, 0, 1)\n> +DEF_SYSREG_EL2(HV_SYS_REG_ESR_EL2, 3, 4, 5, 2, 0)\n> +DEF_SYSREG_EL2(HV_SYS_REG_FAR_EL2, 3, 4, 6, 0, 0)\n> +DEF_SYSREG_EL2(HV_SYS_REG_HCR_EL2, 3, 4, 1, 1, 0)\n> +DEF_SYSREG_EL2(HV_SYS_REG_HPFAR_EL2, 3, 4, 6, 0, 4)\n> +DEF_SYSREG_EL2(HV_SYS_REG_MAIR_EL2, 3, 4, 10, 2, 0)\n> +DEF_SYSREG_EL2(HV_SYS_REG_MDCR_EL2, 3, 4, 1, 1, 1)\n> +DEF_SYSREG_EL2(HV_SYS_REG_SCTLR_EL2, 3, 4, 1, 0, 0)\n> +DEF_SYSREG_EL2(HV_SYS_REG_SPSR_EL2, 3, 4, 4, 0, 0)\n> +DEF_SYSREG_EL2(HV_SYS_REG_SP_EL2, 3, 6, 4, 1, 0)\n> +DEF_SYSREG_EL2(HV_SYS_REG_TCR_EL2, 3, 4, 2, 0, 2)\n> +DEF_SYSREG_EL2(HV_SYS_REG_TPIDR_EL2, 3, 4, 13, 0, 2)\n> +DEF_SYSREG_EL2(HV_SYS_REG_TTBR0_EL2, 3, 4, 2, 0, 0)\n> +DEF_SYSREG_EL2(HV_SYS_REG_TTBR1_EL2, 3, 4, 2, 0, 1)\n> +DEF_SYSREG_EL2(HV_SYS_REG_VBAR_EL2, 3, 4, 12, 0, 0)\n> +DEF_SYSREG_EL2(HV_SYS_REG_VMPIDR_EL2, 3, 4, 0, 0, 5)\n> +DEF_SYSREG_EL2(HV_SYS_REG_VPIDR_EL2, 3, 4, 0, 0, 0)\n> +DEF_SYSREG_EL2(HV_SYS_REG_VTCR_EL2, 3, 4, 2, 1, 2)\n> +DEF_SYSREG_EL2(HV_SYS_REG_VTTBR_EL2, 3, 4, 2, 1, 0)\n> --\n> 2.43.0\n>\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=BRZREG6p;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g6Sjs35p8z1y04\n\tfor ; Fri, 01 May 2026 21:00:01 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 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a640c23a62f3a-bbad60212fbmr433226066b.42.1777633175117; Fri, 01 May 2026\n 03:59:35 -0700 (PDT)","MIME-Version":"1.0","References":"<20260501101505.3485916-1-peter.maydell@linaro.org>\n <20260501101505.3485916-24-peter.maydell@linaro.org>","In-Reply-To":"<20260501101505.3485916-24-peter.maydell@linaro.org>","From":"Stefan Hajnoczi ","Date":"Fri, 1 May 2026 06:59:21 -0400","X-Gm-Features":"AVHnY4IT8ijLJfKrtg3FopYSAh_fxCGAwbt5oeeTb-twJdcTxnHBan6Cs7mCgh8","Message-ID":"\n ","Subject":"Re: [PULL 23/28] hvf: sync registers used at EL2","To":"Peter Maydell , mohamed@unpredictable.fr","Cc":"qemu-devel@nongnu.org","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","Received-SPF":"pass client-ip=2a00:1450:4864:20::62d;\n envelope-from=stefanha@gmail.com; helo=mail-ej1-x62d.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3685242,"web_url":"http://patchwork.ozlabs.org/comment/3685242/","msgid":"<61CAE5C8-B9D5-467D-83CD-7BABEC366A5B@unpredictable.fr>","list_archive_url":null,"date":"2026-05-01T23:20:49","subject":"Re: [PULL 23/28] hvf: sync registers used at EL2","submitter":{"id":91318,"url":"http://patchwork.ozlabs.org/api/people/91318/","name":"Mohamed Mediouni","email":"mohamed@unpredictable.fr"},"content":"> On 1. May 2026, at 12:59, Stefan Hajnoczi wrote:\n> \n> On Fri, May 1, 2026 at 6:18 AM Peter Maydell wrote:\n>> \n>> From: Mohamed Mediouni \n>> \n>> When starting up the VM at EL2, more sysregs are available. Sync the state of those.\n>> \n>> In addition, sync the state of the EL1 physical timer when the vGIC is used, even\n>> if running at EL1. However, no OS running at EL1 is expected to use those registers.\n> \n> Hi Mohamed and Peter,\n> Please take a look at the following CI failure:\n> \n> In file included from ../target/arm/hvf/hvf.c:497:\n> ../target/arm/hvf/sysreg.c.inc:187:1: error: static assertion failed\n> due to requirement '!(HV_SYS_REG_MDCR_EL2 != (((((1 << 28) | (19 <<\n> 16) | ((3) << 14) | ((4) << 11) | ((1) << 7) | ((1) << 3) | ((1) <<\n> 0)) | 13510798882111488ULL)) & 65535))': not expecting:\n> HV_SYS_REG_MDCR_EL2 != KVMID_TO_HVF(KVMID_AA64_SYS_REG64(3, 4, 1, 1,\n> 1))\n> 187 | DEF_SYSREG_EL2(HV_SYS_REG_MDCR_EL2, 3, 4, 1, 1, 1)\n> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n> ../target/arm/hvf/hvf.c:489:3: note: expanded from macro 'DEF_SYSREG_EL2'\n> 489 | QEMU_BUILD_BUG_ON(HVF_ID !=\n> KVMID_TO_HVF(KVMID_AA64_SYS_REG64(__VA_ARGS__)));\n> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n> /private/var/folders/q_/v_6k8zks62lb0q_8f10mvn8h0000gn/T/cirrus-ci-build/include/qemu/compiler.h:74:30:\n> note: expanded from macro 'QEMU_BUILD_BUG_ON'\n> 74 | #define QEMU_BUILD_BUG_ON(x) QEMU_BUILD_BUG_MSG(x, \"not expecting: \" #x)\n> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n> /private/var/folders/q_/v_6k8zks62lb0q_8f10mvn8h0000gn/T/cirrus-ci-build/include/qemu/compiler.h:72:51:\n> note: expanded from macro 'QEMU_BUILD_BUG_MSG'\n> 72 | #define QEMU_BUILD_BUG_MSG(x, msg) _Static_assert(!(x), msg)\n> | ^~~~\n> 1 error generated.\n> \n> https://gitlab.com/qemu-project/qemu/-/jobs/14176182142#L5618\n\nThank you, it turned out to be an issue with older macOS SDKs\nthat macOS CI still uses. \n\nDid send a (standalone) patch: https://lore.kernel.org/qemu-devel/20260501231353.63184-1-mohamed@unpredictable.fr/T/#u (looks like patchew is down at time of writing)","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=fOVXv6t6;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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