[{"id":3684738,"web_url":"http://patchwork.ozlabs.org/comment/3684738/","msgid":"<CH3PR12MB754848E6244366B28A0784AAAB352@CH3PR12MB7548.namprd12.prod.outlook.com>","list_archive_url":null,"date":"2026-04-30T13:39:29","subject":"RE: [PATCH v4 03/15] vfio/iommufd: Create nesting parent hwpt with\n IOMMU_HWPT_ALLOC_PASID flag","submitter":{"id":91580,"url":"http://patchwork.ozlabs.org/api/people/91580/","name":"Shameer Kolothum Thodi","email":"skolothumtho@nvidia.com"},"content":"> -----Original Message-----\n> From: Zhenzhong Duan <zhenzhong.duan@intel.com>\n> Sent: 30 April 2026 08:13\n> To: qemu-devel@nongnu.org\n> Cc: alex@shazbot.org; clg@redhat.com; eric.auger@redhat.com;\n> mst@redhat.com; jasowang@redhat.com; Jason Gunthorpe\n> <jgg@nvidia.com>; Nicolin Chen <nicolinc@nvidia.com>; Shameer Kolothum\n> Thodi <skolothumtho@nvidia.com>; joao.m.martins@oracle.com;\n> clement.mathieu--drif@bull.com; kevin.tian@intel.com; yi.l.liu@intel.com;\n> xudong.hao@intel.com; Zhenzhong Duan <zhenzhong.duan@intel.com>\n> Subject: [PATCH v4 03/15] vfio/iommufd: Create nesting parent hwpt with\n> IOMMU_HWPT_ALLOC_PASID flag\n> \n> External email: Use caution opening links or attachments\n> \n> \n> When both device and vIOMMU have PASID enabled, then guest may setup\n> pasid attached translation.\n> \n> VFIO needs to be aware of potential pasid usage and should attach the\n> non-pasid part of pasid-capable device to hwpt flagged with\n> IOMMU_HWPT_ALLOC_PASID.\n> \n> ARM SMMU doesn't support IOMMU_HWPT_ALLOC_PASID, only VTD need it.\n> So\n> we can't check the existing vIOMMU flag VIOMMU_FLAG_PASID_SUPPORTED\n> to\n> determine if set flag IOMMU_HWPT_ALLOC_PASID. Instead, introduce a new\n> flag VIOMMU_FLAG_WANT_PASID_ATTACH which will only be exposed by\n> VTD.\n> \n> Opportunistically add documentation for VIOMMU_FLAG_PASID_SUPPORTED\n> and explain the difference with VIOMMU_FLAG_WANT_PASID_ATTACH.\n> \n> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>\n> Reviewed-by: Yi Liu <yi.l.liu@intel.com>\n> Tested-by: Xudong Hao <xudong.hao@intel.com>\n> ---\n>  include/hw/core/iommu.h       | 11 +++++++++++\n>  include/hw/vfio/vfio-device.h |  1 +\n>  hw/vfio/device.c              | 11 +++++++++++\n>  hw/vfio/iommufd.c             |  8 +++++++-\n>  4 files changed, 30 insertions(+), 1 deletion(-)\n> \n> diff --git a/include/hw/core/iommu.h b/include/hw/core/iommu.h\n> index 77739d4214..20d6d79062 100644\n> --- a/include/hw/core/iommu.h\n> +++ b/include/hw/core/iommu.h\n> @@ -20,9 +20,20 @@\n>  enum viommu_flags {\n>      /* vIOMMU needs nesting parent HWPT to create nested HWPT */\n>      VIOMMU_FLAG_WANT_NESTING_PARENT = BIT_ULL(0),\n> +    /*\n> +     * vIOMMU supports PASID capability, VFIO checks this flag and synthesize\n> +     * a PASID capability.\n> +     */\n>      VIOMMU_FLAG_PASID_SUPPORTED = BIT_ULL(1),\n>      /* vIOMMU needs dirty tracking on the nesting parent HWPT for nested use\n> */\n>      VIOMMU_FLAG_WANT_NESTING_DIRTY_TRACKING = BIT_ULL(2),\n> +    /*\n> +     * vIOMMU requests other sub-system like VFIO to create a HWPT that can\n> be\n> +     * used with PASID attachment. VIOMMU_FLAG_PASID_SUPPORTED can't\n> be used\n> +     * for this purpose as PASID attachment is needed by VTD IOMMU but not\n> ARM\n> +     * SMMU.\n> +     */\n> +    VIOMMU_FLAG_WANT_PASID_ATTACH = BIT_ULL(3),\n>  };\n> \n>  /* Host IOMMU quirks. Extracted from host IOMMU capabilities */\n> diff --git a/include/hw/vfio/vfio-device.h b/include/hw/vfio/vfio-device.h\n> index 380a55d6e5..8472420d3f 100644\n> --- a/include/hw/vfio/vfio-device.h\n> +++ b/include/hw/vfio/vfio-device.h\n> @@ -282,6 +282,7 @@ void vfio_device_unprepare(VFIODevice *vbasedev);\n> \n>  bool vfio_device_get_viommu_flags_want_nesting(VFIODevice *vbasedev);\n>  bool vfio_device_get_viommu_flags_want_nesting_dirty(VFIODevice\n> *vbasedev);\n> +bool vfio_device_get_viommu_flags_want_pasid_attach(VFIODevice\n> *vbasedev);\n>  bool vfio_device_get_host_iommu_quirk_bypass_ro(VFIODevice *vbasedev,\n>                                                  uint32_t type, void *caps,\n>                                                  uint32_t size);\n> diff --git a/hw/vfio/device.c b/hw/vfio/device.c\n> index 3ffd69a579..b954b44d31 100644\n> --- a/hw/vfio/device.c\n> +++ b/hw/vfio/device.c\n> @@ -544,6 +544,17 @@ bool\n> vfio_device_get_viommu_flags_want_nesting(VFIODevice *vbasedev)\n>      return false;\n>  }\n> \n> +bool vfio_device_get_viommu_flags_want_pasid_attach(VFIODevice\n> *vbasedev)\n> +{\n> +    VFIOPCIDevice *vdev = vfio_pci_from_vfio_device(vbasedev);\n> +\n> +    if (vdev) {\n> +        return !!(pci_device_get_viommu_flags(PCI_DEVICE(vdev)) &\n> +                  VIOMMU_FLAG_WANT_PASID_ATTACH);\n> +    }\n> +    return false;\n> +}\n> +\n>  bool vfio_device_get_host_iommu_quirk_bypass_ro(VFIODevice *vbasedev,\n>                                                  uint32_t type, void *caps,\n>                                                  uint32_t size)\n> diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c\n> index 78e7b6a045..0718f029ca 100644\n> --- a/hw/vfio/iommufd.c\n> +++ b/hw/vfio/iommufd.c\n> @@ -364,6 +364,7 @@ static bool\n> iommufd_cdev_autodomains_get(VFIODevice *vbasedev,\n>      VendorCaps caps;\n>      VFIOIOASHwpt *hwpt;\n>      uint32_t hwpt_id;\n> +    uint8_t max_pasid_log2 = 0;\n>      int ret;\n> \n>      /* Try to find a domain */\n> @@ -409,7 +410,7 @@ static bool\n> iommufd_cdev_autodomains_get(VFIODevice *vbasedev,\n>       */\n>      if (!iommufd_backend_get_device_info(vbasedev->iommufd, vbasedev-\n> >devid,\n>                                           &type, &caps, sizeof(caps), &hw_caps,\n> -                                         NULL, errp)) {\n> +                                         &max_pasid_log2, errp)) {\n>          return false;\n>      }\n> \n> @@ -437,6 +438,11 @@ static bool\n> iommufd_cdev_autodomains_get(VFIODevice *vbasedev,\n>          }\n>      }\n> \n> +    if (max_pasid_log2 &&\n> +        vfio_device_get_viommu_flags_want_pasid_attach(vbasedev)) {\n> +        flags |= IOMMU_HWPT_ALLOC_PASID;\n> +    }\n\nHere, suppose a container already has an hwpt without IOMMU_HWPT_ALLOC_PASID\n(from a no PASID device), and a PASID capable device then tries to attach to it\nvia the FOREACH loop above, does the kernel return -EINVAL:\n\nret = iommufd_cdev_pasid_attach_ioas_hwpt(vbasedev, IOMMU_NO_PASID,\n                                                      hwpt->hwpt_id, errp);\n\nIf not, it will get attached to NO_PASID HWPT and return there, isn't it?\n\nThanks,\nShameer","headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=fW+RicjN;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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