[{"id":3684947,"web_url":"http://patchwork.ozlabs.org/comment/3684947/","msgid":"<20260430211443.GA440215@bhelgaas>","list_archive_url":null,"date":"2026-04-30T21:14:43","subject":"Re: [PATCH] pci: quirks: Advertise D3cold capability for UPD720201","submitter":{"id":67298,"url":"http://patchwork.ozlabs.org/api/people/67298/","name":"Bjorn Helgaas","email":"helgaas@kernel.org"},"content":"On Thu, Apr 30, 2026 at 10:12:18AM +0530, Sushrut Shree Trivedi wrote:\n> PCIe-to-USB bridge UPD720201 does not advertise D3cold\n> support until firmware is loaded post pci enumeration.\n> This results in upd blocking D3cold entry during system\n> suspend and causing overall failure to enter XO\n> shutdown.\n\nI think you're saying that the PM Capability in config space changes\nwhen the firmware is loaded.  That makes me worry about what *other*\nconfig space changes might happen when the firmware is loaded.\nThere's all sorts of stuff we do during enumeration that depends on\nwhat's in config space.\n\n> Hence, add a quirk to advertise D3cold PME capability\n> since the HW actually supports and advertises it post\n> firmware loading.\n> \n> Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>\n> ---\n>  drivers/pci/quirks.c | 10 ++++++++++\n>  1 file changed, 10 insertions(+)\n> \n> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c\n> index caaed1a01dc0..c32617ed33aa 100644\n> --- a/drivers/pci/quirks.c\n> +++ b/drivers/pci/quirks.c\n> @@ -6381,3 +6381,13 @@ static void pci_mask_replay_timer_timeout(struct pci_dev *pdev)\n>  DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9750, pci_mask_replay_timer_timeout);\n>  DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9755, pci_mask_replay_timer_timeout);\n>  #endif\n> +\n> +/*\n> + * Renesas PCIe-to-USB bridge UPD720201 does not advertise D3cold\n> + * capability by default until firmware is loaded post-enumeration.\n\nThere are several mentions of \"Renesas UPD720201/UPD720202 USB 3.0\nxHCI Host Controller\" in the tree.  I assume this is the same device?\nIf so, I think it'd be worth using similar terminology, i.e., \"USB\nxHCI host controller\" instead of \"PCIe-to-USB bridge\"\n\n> +static void quirk_enable_d3cold(struct pci_dev *dev)\n> +{\n> +\tdev->pme_support = dev->pme_support | (1 << PCI_D3cold);\n> +}\n> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_RENESAS, 0x0014, quirk_enable_d3cold);\n\nHow do we know that FINAL fixups happen after firmware loading?","headers":{"Return-Path":"\n <linux-pci+bounces-53549-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=QB6UvPiv;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-53549-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"QB6UvPiv\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g66VX4bBVz1yHZ\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 01 May 2026 07:19:00 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 3CC2F304C94E\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 30 Apr 2026 21:15:07 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id C987B3B7B6E;\n\tThu, 30 Apr 2026 21:14:45 +0000 (UTC)","from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id A527D3B776A;\n\tThu, 30 Apr 2026 21:14:45 +0000 (UTC)","by smtp.kernel.org (Postfix) with ESMTPSA id 1E437C2BCB3;\n\tThu, 30 Apr 2026 21:14:45 +0000 (UTC)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777583685; cv=none;\n b=jvAEz+Gou2rZ93IJH1IBvRTIeDDvXnfAc9RuERdfhO001vcO7M32jeKEyNYdhO2H0b0vKke377rTgLLED7be9pDkJKg+OCOAjX5GNcgUZWdLlsZofHfszdRD6zzaP6WTF/jbLqWZUWD+ZSeEEWiWh7OcGjJwWC3DELJiOcU1B2w=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777583685; c=relaxed/simple;\n\tbh=jExc9ThFJh5G6uRoarH4ZYtA+yWxsZXYal1m+NQwiSg=;\n\th=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type:\n\t Content-Disposition:In-Reply-To;\n b=hn7O74kbQUk4ev2ODSp0BTeyRjVnJkeN09hukWt7rabYSRyHcJ76iNTwjCXIRTomV1LRs0t7v/R3YL8Af8OOcGBVeFGy1JKS2nysU+yf88Q1F5H08exvthdeNAV7YLGN1+1Q2rXdtbgpelfbmdXGc/iuVq4so6p/X1tL2pRTRSE=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=QB6UvPiv; arc=none smtp.client-ip=10.30.226.201","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1777583685;\n\tbh=jExc9ThFJh5G6uRoarH4ZYtA+yWxsZXYal1m+NQwiSg=;\n\th=Date:From:To:Cc:Subject:In-Reply-To:From;\n\tb=QB6UvPivTiYRt+vDiYJx/8sd6EhpdJ2trnqgU+5o6tvhrZ8N9uRATlIeKOcY7HpDa\n\t VQvviXfNIM1lW7NKurpjJKDO0jdXvpLopueUvz15uYa5HIM6j40TXXJummc/mo2see\n\t CkTcrmQ5xrv/Ot/u0uTtJ3PnYcLWiuqGF6L4vmT8UX7wADE87nzSSUx6Ps9Lpd8/OE\n\t k7pn6uGckkjnWFHcb2Q+wu5PcqpDWoakBOXxfXR0KSysGTTuc7vkGopEZSW3ltVkp5\n\t f/ecEjFnJty6BzmBDMKeIgK7zGz2rcfyg8JXarzpdZjYik2J/UPOqIMyy7lbNvWl2d\n\t VFCF1JQwGMUAQ==","Date":"Thu, 30 Apr 2026 16:14:43 -0500","From":"Bjorn Helgaas <helgaas@kernel.org>","To":"Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>","Cc":"Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"Re: [PATCH] pci: quirks: Advertise D3cold capability for UPD720201","Message-ID":"<20260430211443.GA440215@bhelgaas>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"<linux-pci.vger.kernel.org>","List-Subscribe":"<mailto:linux-pci+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-pci+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20260430-d3cold_support-v1-1-6734f280c481@oss.qualcomm.com>"}}]