[{"id":3684514,"web_url":"http://patchwork.ozlabs.org/comment/3684514/","msgid":"","list_archive_url":null,"date":"2026-04-30T08:03:57","subject":"Re: [PATCH v2 1/7] target-info: extract target_info() definition in\n target-info-init.h","submitter":{"id":66774,"url":"http://patchwork.ozlabs.org/api/people/66774/","name":"Marc-André Lureau","email":"marcandre.lureau@redhat.com"},"content":"Hi\n\nOn Thu, Apr 30, 2026 at 7:56 AM Pierrick Bouvier\n wrote:\n>\n> This allows us to prepare next commits, which will introduce qom\n> registration for system mode.\n>\n> Reviewed-by: Marc-André Lureau \n> Signed-off-by: Pierrick Bouvier \n> ---\n> configs/targets/aarch64-softmmu.c | 6 ++----\n> configs/targets/arm-softmmu.c | 6 ++----\n> include/qemu/target-info-init.h | 20 ++++++++++++++++++++\n> target-info-stub.c | 6 ++----\n> 4 files changed, 26 insertions(+), 12 deletions(-)\n> create mode 100644 include/qemu/target-info-init.h\n>\n> diff --git a/configs/targets/aarch64-softmmu.c b/configs/targets/aarch64-softmmu.c\n> index 82ccb575759..75d95b0e743 100644\n> --- a/configs/targets/aarch64-softmmu.c\n> +++ b/configs/targets/aarch64-softmmu.c\n> @@ -8,6 +8,7 @@\n>\n> #include \"qemu/osdep.h\"\n> #include \"qemu/target-info-impl.h\"\n> +#include \"qemu/target-info-init.h\"\n> #include \"hw/arm/machines-qom.h\"\n> #include \"target/arm/cpu-qom.h\"\n> #include \"target/arm/cpu-param.h\"\n> @@ -23,7 +24,4 @@ static const TargetInfo target_info_aarch64_system = {\n> .page_bits_init = TARGET_PAGE_BITS_LEGACY,\n> };\n>\n> -const TargetInfo *target_info(void)\n> -{\n> - return &target_info_aarch64_system;\n> -}\n> +target_info_init(target_info_aarch64_system)\n> diff --git a/configs/targets/arm-softmmu.c b/configs/targets/arm-softmmu.c\n> index 18940e51e55..73546fa5737 100644\n> --- a/configs/targets/arm-softmmu.c\n> +++ b/configs/targets/arm-softmmu.c\n> @@ -8,6 +8,7 @@\n>\n> #include \"qemu/osdep.h\"\n> #include \"qemu/target-info-impl.h\"\n> +#include \"qemu/target-info-init.h\"\n> #include \"hw/arm/machines-qom.h\"\n> #include \"target/arm/cpu-qom.h\"\n> #include \"target/arm/cpu-param.h\"\n> @@ -23,7 +24,4 @@ static const TargetInfo target_info_arm_system = {\n> .page_bits_init = TARGET_PAGE_BITS_LEGACY,\n> };\n>\n> -const TargetInfo *target_info(void)\n> -{\n> - return &target_info_arm_system;\n> -}\n> +target_info_init(target_info_arm_system)\n> diff --git a/include/qemu/target-info-init.h b/include/qemu/target-info-init.h\n> new file mode 100644\n> index 00000000000..9be06d8523a\n> --- /dev/null\n> +++ b/include/qemu/target-info-init.h\n> @@ -0,0 +1,20 @@\n> +/*\n> + * QEMU target info initialization\n> + *\n> + * Copyright (c) Qualcomm\n> + *\n> + * SPDX-License-Identifier: GPL-2.0-or-later\n> + *\n> + * This file is included by each file defining a TargetInfo structure and is\n> + * responsible for registering it.\n> + */\n> +\n> +#ifndef TARGET_INFO_DEF_H\n> +\n\nmissing #define TARGET_INFO_DEF_H\n\n> +#define target_info_init(ti_var) \\\n> +const TargetInfo *target_info(void) \\\n> +{ \\\n> + return &ti_var; \\\n> +}\n> +\n> +#endif /* TARGET_INFO_DEF_H */\n> diff --git a/target-info-stub.c b/target-info-stub.c\n> index f5896a72621..af7cdc5e67a 100644\n> --- a/target-info-stub.c\n> +++ b/target-info-stub.c\n> @@ -9,6 +9,7 @@\n> #include \"qemu/osdep.h\"\n> #include \"qemu/target-info.h\"\n> #include \"qemu/target-info-impl.h\"\n> +#include \"qemu/target-info-init.h\"\n> #include \"hw/core/boards.h\"\n> #include \"cpu.h\"\n> #include \"exec/page-vary.h\"\n> @@ -40,7 +41,4 @@ static const TargetInfo target_info_stub = {\n> #endif\n> };\n>\n> -const TargetInfo *target_info(void)\n> -{\n> - return &target_info_stub;\n> -}\n> +target_info_init(target_info_stub)\n> --\n> 2.43.0\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=a5VUanNS;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=google header.b=t9OpnmQI;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Thu, 30 Apr 2026\n 01:04:08 -0700 (PDT)"],"MIME-Version":"1.0","References":"<20260430035626.3511676-1-pierrick.bouvier@oss.qualcomm.com>\n <20260430035626.3511676-2-pierrick.bouvier@oss.qualcomm.com>","In-Reply-To":"<20260430035626.3511676-2-pierrick.bouvier@oss.qualcomm.com>","From":"=?utf-8?q?Marc-Andr=C3=A9_Lureau?= ","Date":"Thu, 30 Apr 2026 12:03:57 +0400","X-Gm-Features":"AVHnY4I4lRQAhaBuhPVZO1G17pf_IoGVLqjY-spjP6SyjWIIaW11C_Le9gehz_w","Message-ID":"\n ","Subject":"Re: [PATCH v2 1/7] target-info: extract target_info() definition in\n target-info-init.h","To":"Pierrick Bouvier ","Cc":"qemu-devel@nongnu.org,\n =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ,\n Richard Henderson ,\n Markus Armbruster , Anton Johansson ,\n Paolo Bonzini , Max Filippov ,\n\t=?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= ","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","Received-SPF":"pass client-ip=170.10.129.124; envelope-from=mlureau@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3684827,"web_url":"http://patchwork.ozlabs.org/comment/3684827/","msgid":"<4915e243-839e-405f-969d-3393efcd6e95@oss.qualcomm.com>","list_archive_url":null,"date":"2026-04-30T16:23:08","subject":"Re: [PATCH v2 1/7] target-info: extract target_info() definition in\n target-info-init.h","submitter":{"id":93152,"url":"http://patchwork.ozlabs.org/api/people/93152/","name":"Pierrick Bouvier","email":"pierrick.bouvier@oss.qualcomm.com"},"content":"On 4/30/2026 1:03 AM, Marc-André Lureau wrote:\n> Hi\n> \n> On Thu, Apr 30, 2026 at 7:56 AM Pierrick Bouvier\n> wrote:\n>>\n>> This allows us to prepare next commits, which will introduce qom\n>> registration for system mode.\n>>\n>> Reviewed-by: Marc-André Lureau \n>> Signed-off-by: Pierrick Bouvier \n>> ---\n>> configs/targets/aarch64-softmmu.c | 6 ++----\n>> configs/targets/arm-softmmu.c | 6 ++----\n>> include/qemu/target-info-init.h | 20 ++++++++++++++++++++\n>> target-info-stub.c | 6 ++----\n>> 4 files changed, 26 insertions(+), 12 deletions(-)\n>> create mode 100644 include/qemu/target-info-init.h\n>>\n>> diff --git a/configs/targets/aarch64-softmmu.c b/configs/targets/aarch64-softmmu.c\n>> index 82ccb575759..75d95b0e743 100644\n>> --- a/configs/targets/aarch64-softmmu.c\n>> +++ b/configs/targets/aarch64-softmmu.c\n>> @@ -8,6 +8,7 @@\n>>\n>> #include \"qemu/osdep.h\"\n>> #include \"qemu/target-info-impl.h\"\n>> +#include \"qemu/target-info-init.h\"\n>> #include \"hw/arm/machines-qom.h\"\n>> #include \"target/arm/cpu-qom.h\"\n>> #include \"target/arm/cpu-param.h\"\n>> @@ -23,7 +24,4 @@ static const TargetInfo target_info_aarch64_system = {\n>> .page_bits_init = TARGET_PAGE_BITS_LEGACY,\n>> };\n>>\n>> -const TargetInfo *target_info(void)\n>> -{\n>> - return &target_info_aarch64_system;\n>> -}\n>> +target_info_init(target_info_aarch64_system)\n>> diff --git a/configs/targets/arm-softmmu.c b/configs/targets/arm-softmmu.c\n>> index 18940e51e55..73546fa5737 100644\n>> --- a/configs/targets/arm-softmmu.c\n>> +++ b/configs/targets/arm-softmmu.c\n>> @@ -8,6 +8,7 @@\n>>\n>> #include \"qemu/osdep.h\"\n>> #include \"qemu/target-info-impl.h\"\n>> +#include \"qemu/target-info-init.h\"\n>> #include \"hw/arm/machines-qom.h\"\n>> #include \"target/arm/cpu-qom.h\"\n>> #include \"target/arm/cpu-param.h\"\n>> @@ -23,7 +24,4 @@ static const TargetInfo target_info_arm_system = {\n>> .page_bits_init = TARGET_PAGE_BITS_LEGACY,\n>> };\n>>\n>> -const TargetInfo *target_info(void)\n>> -{\n>> - return &target_info_arm_system;\n>> -}\n>> +target_info_init(target_info_arm_system)\n>> diff --git a/include/qemu/target-info-init.h b/include/qemu/target-info-init.h\n>> new file mode 100644\n>> index 00000000000..9be06d8523a\n>> --- /dev/null\n>> +++ b/include/qemu/target-info-init.h\n>> @@ -0,0 +1,20 @@\n>> +/*\n>> + * QEMU target info initialization\n>> + *\n>> + * Copyright (c) Qualcomm\n>> + *\n>> + * SPDX-License-Identifier: GPL-2.0-or-later\n>> + *\n>> + * This file is included by each file defining a TargetInfo structure and is\n>> + * responsible for registering it.\n>> + */\n>> +\n>> +#ifndef TARGET_INFO_DEF_H\n>> +\n> \n> missing #define TARGET_INFO_DEF_H\n>\n\nWrong rebase, this was fixed in patch 2. I'll move it here for v3.\n\nThanks,\nPierrick","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=NDknboNX;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=YMxW4umg;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5zxr6Zm3z1yJr\n\tfor ; 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