[{"id":3684437,"web_url":"http://patchwork.ozlabs.org/comment/3684437/","msgid":"<9796771d-4d8f-44f9-ba8c-49f0c39a5a51@linaro.org>","list_archive_url":null,"date":"2026-04-30T05:17:16","subject":"Re: [PATCH v2 26/40] fpu: Return struct from parts{64,128}_muladd","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"content":"Hi Richard,\n\nOn 30/4/26 02:05, Richard Henderson wrote:\n> At the same time, export.\n> \n> Signed-off-by: Richard Henderson \n> ---\n> include/fpu/softfloat-parts.h | 9 ++++\n> fpu/softfloat.c | 83 +++++++++++++++++------------------\n> fpu/softfloat-parts.c.inc | 38 ++++++++--------\n> 3 files changed, 69 insertions(+), 61 deletions(-)\n\n\n> diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\n> index 77465cce6e..09b79f8d44 100644\n> --- a/fpu/softfloat-parts.c.inc\n> +++ b/fpu/softfloat-parts.c.inc\n> @@ -679,9 +679,8 @@ static FloatPartsN *partsN(mul)(FloatPartsN *a, FloatPartsN *b,\n> * Requires A and C extracted into a double-sized structure to provide the\n> * extra space for the widening multiply.\n> */\n> -static FloatPartsN *partsN(muladd)(FloatPartsN *a, FloatPartsN *b,\n> - FloatPartsN *c,\n> - int flags, float_status *s)\n> +FloatPartsN partsN(muladd)(const FloatPartsN *a, const FloatPartsN *b,\n> + const FloatPartsN *c, int flags, float_status *s)\n> {\n> int ab_mask = float_cmask(a->cls) | float_cmask(b->cls);\n> int c_mask = float_cmask(c->cls);\n> @@ -719,10 +718,13 @@ static FloatPartsN *partsN(muladd)(FloatPartsN *a, FloatPartsN *b,\n> }\n> \n> /* Narrow with sticky bit, for proper rounding later. */\n> - fracN(truncjam)(a, &p_widen);\n> - a->sign = p_widen.sign;\n> - a->exp = p_widen.exp;\n> - return a;\n> + FloatPartsN r = {\n> + .sign = p_widen.sign,\n> + .exp = p_widen.exp,\n> + .cls = float_class_normal,\n\nIt would be clearer if the float_class_normal change start appearing\nduring previous reorganizative patch:\n\n a->cls = float_class_normal;\n\n> + };\n> + fracN(truncjam)(&r, &p_widen);\n> + return r;\n> }","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=Mw/99TmH;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8; format=flowed","Content-Transfer-Encoding":"7bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::431;\n envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3684771,"web_url":"http://patchwork.ozlabs.org/comment/3684771/","msgid":"","list_archive_url":null,"date":"2026-04-30T15:06:23","subject":"Re: [PATCH v2 26/40] fpu: Return struct from parts{64,128}_muladd","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"content":"On 30/4/26 07:17, Philippe Mathieu-Daudé wrote:\n> Hi Richard,\n> \n> On 30/4/26 02:05, Richard Henderson wrote:\n>> At the same time, export.\n>>\n>> Signed-off-by: Richard Henderson \n>> ---\n>>   include/fpu/softfloat-parts.h |  9 ++++\n>>   fpu/softfloat.c               | 83 +++++++++++++++++------------------\n>>   fpu/softfloat-parts.c.inc     | 38 ++++++++--------\n>>   3 files changed, 69 insertions(+), 61 deletions(-)\n> \n> \n>> diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\n>> index 77465cce6e..09b79f8d44 100644\n>> --- a/fpu/softfloat-parts.c.inc\n>> +++ b/fpu/softfloat-parts.c.inc\n>> @@ -679,9 +679,8 @@ static FloatPartsN *partsN(mul)(FloatPartsN *a, \n>> FloatPartsN *b,\n>>    * Requires A and C extracted into a double-sized structure to \n>> provide the\n>>    * extra space for the widening multiply.\n>>    */\n>> -static FloatPartsN *partsN(muladd)(FloatPartsN *a, FloatPartsN *b,\n>> -                                   FloatPartsN *c,\n>> -                                   int flags, float_status *s)\n>> +FloatPartsN partsN(muladd)(const FloatPartsN *a, const FloatPartsN *b,\n>> +                           const FloatPartsN *c, int flags, \n>> float_status *s)\n>>   {\n>>       int ab_mask = float_cmask(a->cls) | float_cmask(b->cls);\n>>       int c_mask = float_cmask(c->cls);\n>> @@ -719,10 +718,13 @@ static FloatPartsN *partsN(muladd)(FloatPartsN \n>> *a, FloatPartsN *b,\n>>           }\n>>           /* Narrow with sticky bit, for proper rounding later. */\n>> -        fracN(truncjam)(a, &p_widen);\n>> -        a->sign = p_widen.sign;\n>> -        a->exp = p_widen.exp;\n>> -        return a;\n>> +        FloatPartsN r = {\n>> +            .sign = p_widen.sign,\n>> +            .exp = p_widen.exp,\n>> +            .cls = float_class_normal,\n> \n> It would be clearer if the float_class_normal change start appearing\n> during previous reorganizative patch:\n> \n>            a->cls = float_class_normal;\n\nOtherwise:\n\nReviewed-by: Philippe Mathieu-Daudé \n\n> \n>> +        };\n>> +        fracN(truncjam)(&r, &p_widen);\n>> +        return r;\n>>       }","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=OZ2LqkRg;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8; format=flowed","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::329;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3684951,"web_url":"http://patchwork.ozlabs.org/comment/3684951/","msgid":"<13b0fb09-c634-4cd6-8566-4142508cbd67@linaro.org>","list_archive_url":null,"date":"2026-04-30T21:30:30","subject":"Re: [PATCH v2 26/40] fpu: Return struct from parts{64,128}_muladd","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"content":"On 4/30/26 15:17, Philippe Mathieu-Daudé wrote:\n> Hi Richard,\n> \n> On 30/4/26 02:05, Richard Henderson wrote:\n>> At the same time, export.\n>>\n>> Signed-off-by: Richard Henderson \n>> ---\n>>   include/fpu/softfloat-parts.h |  9 ++++\n>>   fpu/softfloat.c               | 83 +++++++++++++++++------------------\n>>   fpu/softfloat-parts.c.inc     | 38 ++++++++--------\n>>   3 files changed, 69 insertions(+), 61 deletions(-)\n> \n> \n>> diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\n>> index 77465cce6e..09b79f8d44 100644\n>> --- a/fpu/softfloat-parts.c.inc\n>> +++ b/fpu/softfloat-parts.c.inc\n>> @@ -679,9 +679,8 @@ static FloatPartsN *partsN(mul)(FloatPartsN *a, FloatPartsN *b,\n>>    * Requires A and C extracted into a double-sized structure to provide the\n>>    * extra space for the widening multiply.\n>>    */\n>> -static FloatPartsN *partsN(muladd)(FloatPartsN *a, FloatPartsN *b,\n>> -                                   FloatPartsN *c,\n>> -                                   int flags, float_status *s)\n>> +FloatPartsN partsN(muladd)(const FloatPartsN *a, const FloatPartsN *b,\n>> +                           const FloatPartsN *c, int flags, float_status *s)\n>>   {\n>>       int ab_mask = float_cmask(a->cls) | float_cmask(b->cls);\n>>       int c_mask = float_cmask(c->cls);\n>> @@ -719,10 +718,13 @@ static FloatPartsN *partsN(muladd)(FloatPartsN *a, FloatPartsN *b,\n>>           }\n>>           /* Narrow with sticky bit, for proper rounding later. */\n>> -        fracN(truncjam)(a, &p_widen);\n>> -        a->sign = p_widen.sign;\n>> -        a->exp = p_widen.exp;\n>> -        return a;\n>> +        FloatPartsN r = {\n>> +            .sign = p_widen.sign,\n>> +            .exp = p_widen.exp,\n>> +            .cls = float_class_normal,\n> \n> It would be clearer if the float_class_normal change start appearing\n> during previous reorganizative patch:\n> \n>            a->cls = float_class_normal;\n\nBefore, we proved that a->cls was anynorm, aka in { normal, denormal }, and we simply \nre-used that. Here, we're initializing a new structure, so we have to put something, and \nI choose normal. I really don't think it's clearer in the previous patch.\n\n\nr~","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=tmQeupCg;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g66mx0sLpz1yHZ\n\tfor ; Fri, 01 May 2026 07:31:27 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wIYy0-00047n-CE; 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