[{"id":3684410,"web_url":"http://patchwork.ozlabs.org/comment/3684410/","msgid":"<38bb1b79-67da-4a23-a0e8-3c3da77933d7@oss.qualcomm.com>","list_archive_url":null,"date":"2026-04-30T04:06:14","subject":"Re: [PATCH 2/2] pinctrl: qcom: Add Shikra pinctrl driver","submitter":{"id":90731,"url":"http://patchwork.ozlabs.org/api/people/90731/","name":"Maulik Shah (mkshah)","email":"maulik.shah@oss.qualcomm.com"},"content":"On 4/29/2026 6:41 PM, Komal Bajaj wrote:\n> Add pinctrl driver for TLMM block found in Shikra SoC.\n\n\n[...]\n\n> +#define UFS_RESET(pg_name, ctl, io)\t\t\t\\\n> +\t{\t\t\t\t\t\t\\\n> +\t\t.grp = PINCTRL_PINGROUP(#pg_name,\t\\\n> +\t\t\tpg_name##_pins,\t\t\t\\\n> +\t\t\tARRAY_SIZE(pg_name##_pins)),\t\\\n> +\t\t.ctl_reg = ctl,\t\t\t\t\\\n> +\t\t.io_reg = io,\t\t\t\t\\\n> +\t\t.intr_cfg_reg = 0,\t\t\t\\\n> +\t\t.intr_status_reg = 0,\t\t\t\\\n> +\t\t.mux_bit = -1,\t\t\t\t\\\n> +\t\t.pull_bit = 3,\t\t\t\t\\\n> +\t\t.drv_bit = 0,\t\t\t\t\\\n> +\t\t.oe_bit = -1,\t\t\t\t\\\n> +\t\t.in_bit = -1,\t\t\t\t\\\n> +\t\t.out_bit = 0,\t\t\t\t\\\n> +\t\t.intr_enable_bit = -1,\t\t\t\\\n> +\t\t.intr_status_bit = -1,\t\t\t\\\n> +\t\t.intr_target_bit = -1,\t\t\t\\\n> +\t\t.intr_raw_status_bit = -1,\t\t\\\n> +\t\t.intr_polarity_bit = -1,\t\t\\\n> +\t\t.intr_detection_bit = -1,\t\t\\\n> +\t\t.intr_detection_width = -1,\t\t\\\n> +\t}\n\nUFS_RESET macro is not used anywhere in the file, please remove it.\n\nI assume the macro keeps getting added since the file pinctrl- is\nfully/partially auto generated. Would be good to fix auto generation to\navoid getting this added as default in future.\n\nThe unused ones were removed via [1].\n\n[1] https://lore.kernel.org/all/4429f44e-f7e5-449c-824c-83daa339b383@oss.qualcomm.com/\n\n[...]\n\n\n> +static const struct msm_gpio_wakeirq_map shikra_mpm_map[] = {\n> +\t{1, 9}, {2, 31}, {5, 49}, {6, 53}, {9, 72}, {10, 10},\n\nIt would be better to have spacing before/after brackets inline with other pinctrl drivers.\n{1, 9}, should be { 1, 9 }.\n\n> +\t{12, 22}, {14, 26}, {17, 29}, {18, 24}, {20, 32}, {22, 33},\n> +\t{25, 34}, {27, 35}, {28, 36}, {29, 37}, {30, 38}, {31, 39},\n> +\t{32, 40}, {33, 41}, {38, 42}, {40, 43}, {43, 44}, {44, 45},\n> +\t{45, 46}, {46, 47}, {47, 48}, {48, 60}, {50, 50}, {51, 51},\n> +\t{52, 61}, {53, 62}, {57, 52}, {58, 63}, {60, 54}, {63, 64},\n> +\t{73, 55}, {74, 56}, {75, 57}, {77, 3}, {80, 4}, {84, 5},\n> +\t{85, 67}, {86, 69}, {88, 70}, {89, 71}, {90, 73}, {91, 74},\n> +\t{92, 75}, {93, 76}, {94, 77}, {95, 78}, {97, 79}, {99, 80},\n> +\t{100, 11}, {101, 13}, {102, 14}, {103, 15}, {106, 16}, {108, 17},\n> +\t{112, 18}, {116, 19}, {117, 20}, {119, 21}, {120, 23}, {136, 25},\n> +\t{159, 27}, {161, 28},\n> +};\n> +\n\nThanks,\nMaulik","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=CsbmxPZo;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=F2hauQ/E;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=104.64.211.4; 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