[{"id":3684045,"web_url":"http://patchwork.ozlabs.org/comment/3684045/","msgid":"","list_archive_url":null,"date":"2026-04-29T13:08:30","subject":"Re: [PATCH v2 3/3] sunxi: configs: enable power LEDs on 64-bit boards","submitter":{"id":88999,"url":"http://patchwork.ozlabs.org/api/people/88999/","name":"Paul Kocialkowski","email":"paulk@sys-base.io"},"content":"Hi Andre,\n\nOn Wed 29 Apr 26, 11:28, Andre Przywara wrote:\n> We recently gained a simple way to enable a power LED very early in the\n> SPL boot, through simple Kconfig variables.\n> \n> Add those symbols to those boards' defconfigs where the DT indicates a\n> default-on power LED. The number used is * 32 + ,\n> an active low setup means CONFIG_SPL_SUNXI_LED_STATUS_ACTIVE_HIGH must be\n> undefined.\n> \n> This will light up the power LED very early in the (SPL) boot phase on\n> those 64-bit boards.\n> \n> Signed-off-by: Andre Przywara \n\nReviewed-by: Paul Kocialkowski \n\nAll the best,\n\nPaul\n\n> ---\n> configs/anbernic_rg35xx_h700_defconfig | 2 ++\n> configs/bananapi_m64_defconfig | 2 ++\n> configs/beelink_gs1_defconfig | 2 ++\n> configs/liontron-h-a133l_defconfig | 3 +++\n> configs/nanopi_neo2_defconfig | 2 ++\n> configs/nanopi_neo_plus2_defconfig | 2 ++\n> configs/orangepi_3_defconfig | 2 ++\n> configs/orangepi_lite2_defconfig | 2 ++\n> configs/orangepi_pc2_defconfig | 2 ++\n> configs/orangepi_prime_defconfig | 2 ++\n> configs/orangepi_zero2_defconfig | 2 ++\n> configs/orangepi_zero_plus2_defconfig | 2 ++\n> configs/orangepi_zero_plus_defconfig | 2 ++\n> configs/radxa-cubie-a5e_defconfig | 3 +++\n> configs/tanix_tx1_defconfig | 2 ++\n> 15 files changed, 32 insertions(+)\n> \n> diff --git a/configs/anbernic_rg35xx_h700_defconfig b/configs/anbernic_rg35xx_h700_defconfig\n> index 2fa57cbecce..2abea94e979 100644\n> --- a/configs/anbernic_rg35xx_h700_defconfig\n> +++ b/configs/anbernic_rg35xx_h700_defconfig\n> @@ -16,6 +16,8 @@ CONFIG_DRAM_SUNXI_PHY_ADDR_MAP_1=y\n> CONFIG_MACH_SUN50I_H616=y\n> CONFIG_SUNXI_DRAM_H616_LPDDR4=y\n> CONFIG_R_I2C_ENABLE=y\n> +CONFIG_SPL_SUNXI_LED_STATUS=y\n> +CONFIG_SPL_SUNXI_LED_STATUS_GPIO=268\n> CONFIG_SPL_I2C=y\n> CONFIG_SPL_SYS_I2C_LEGACY=y\n> CONFIG_SYS_I2C_MVTWSI=y\n> diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig\n> index d957071cb13..3d1f5d27e5d 100644\n> --- a/configs/bananapi_m64_defconfig\n> +++ b/configs/bananapi_m64_defconfig\n> @@ -4,6 +4,8 @@ CONFIG_DEFAULT_DEVICE_TREE=\"sun50i-a64-bananapi-m64\"\n> CONFIG_SPL=y\n> CONFIG_MACH_SUN50I=y\n> CONFIG_MMC_SUNXI_SLOT_EXTRA=2\n> +CONFIG_SPL_SUNXI_LED_STATUS=y\n> +CONFIG_SPL_SUNXI_LED_STATUS_GPIO=120\n> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n> CONFIG_SUPPORT_EMMC_BOOT=y\n> CONFIG_SUN8I_EMAC=y\n> diff --git a/configs/beelink_gs1_defconfig b/configs/beelink_gs1_defconfig\n> index de46d205453..ebac032915f 100644\n> --- a/configs/beelink_gs1_defconfig\n> +++ b/configs/beelink_gs1_defconfig\n> @@ -5,6 +5,8 @@ CONFIG_SPL=y\n> CONFIG_MACH_SUN50I_H6=y\n> CONFIG_SUNXI_DRAM_H6_LPDDR3=y\n> CONFIG_MMC_SUNXI_SLOT_EXTRA=2\n> +CONFIG_SPL_SUNXI_LED_STATUS=y\n> +CONFIG_SPL_SUNXI_LED_STATUS_GPIO=356\n> # CONFIG_PSCI_RESET is not set\n> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n> CONFIG_LED=y\n> diff --git a/configs/liontron-h-a133l_defconfig b/configs/liontron-h-a133l_defconfig\n> index 831d5b56e3a..836e8d12ff0 100644\n> --- a/configs/liontron-h-a133l_defconfig\n> +++ b/configs/liontron-h-a133l_defconfig\n> @@ -23,6 +23,9 @@ CONFIG_MACH_SUN50I_A133=y\n> CONFIG_SUNXI_DRAM_A133_LPDDR4=y\n> CONFIG_MMC_SUNXI_SLOT_EXTRA=2\n> CONFIG_R_I2C_ENABLE=y\n> +CONFIG_SPL_SUNXI_LED_STATUS=y\n> +CONFIG_SPL_SUNXI_LED_STATUS_GPIO=240\n> +# CONFIG_SPL_SUNXI_LED_STATUS_ACTIVE_HIGH is not set\n> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n> CONFIG_SPL_I2C=y\n> CONFIG_SPL_SYS_I2C_LEGACY=y\n> diff --git a/configs/nanopi_neo2_defconfig b/configs/nanopi_neo2_defconfig\n> index 6704a24a880..63fa6bac9ba 100644\n> --- a/configs/nanopi_neo2_defconfig\n> +++ b/configs/nanopi_neo2_defconfig\n> @@ -6,6 +6,8 @@ CONFIG_SPL=y\n> CONFIG_MACH_SUN50I_H5=y\n> CONFIG_DRAM_ZQ=3881977\n> # CONFIG_DRAM_ODT_EN is not set\n> +CONFIG_SPL_SUNXI_LED_STATUS=y\n> +CONFIG_SPL_SUNXI_LED_STATUS_GPIO=362\n> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n> CONFIG_SUN8I_EMAC=y\n> CONFIG_USB_EHCI_HCD=y\n> diff --git a/configs/nanopi_neo_plus2_defconfig b/configs/nanopi_neo_plus2_defconfig\n> index e80e32a63d4..9d1b783476d 100644\n> --- a/configs/nanopi_neo_plus2_defconfig\n> +++ b/configs/nanopi_neo_plus2_defconfig\n> @@ -7,6 +7,8 @@ CONFIG_MACH_SUN50I_H5=y\n> CONFIG_DRAM_ZQ=3881977\n> # CONFIG_DRAM_ODT_EN is not set\n> CONFIG_MMC_SUNXI_SLOT_EXTRA=2\n> +CONFIG_SPL_SUNXI_LED_STATUS=y\n> +CONFIG_SPL_SUNXI_LED_STATUS_GPIO=362\n> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n> CONFIG_SUN8I_EMAC=y\n> CONFIG_USB_EHCI_HCD=y\n> diff --git a/configs/orangepi_3_defconfig b/configs/orangepi_3_defconfig\n> index 125137bc321..409fa705a06 100644\n> --- a/configs/orangepi_3_defconfig\n> +++ b/configs/orangepi_3_defconfig\n> @@ -6,6 +6,8 @@ CONFIG_MACH_SUN50I_H6=y\n> CONFIG_SUNXI_DRAM_H6_LPDDR3=y\n> CONFIG_MMC_SUNXI_SLOT_EXTRA=2\n> CONFIG_BLUETOOTH_DT_DEVICE_FIXUP=\"brcm,bcm4345c5\"\n> +CONFIG_SPL_SUNXI_LED_STATUS=y\n> +CONFIG_SPL_SUNXI_LED_STATUS_GPIO=356\n> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n> CONFIG_PHY_SUN50I_USB3=y\n> CONFIG_USB_XHCI_HCD=y\n> diff --git a/configs/orangepi_lite2_defconfig b/configs/orangepi_lite2_defconfig\n> index 577f7436c15..5d72d34eb9d 100644\n> --- a/configs/orangepi_lite2_defconfig\n> +++ b/configs/orangepi_lite2_defconfig\n> @@ -4,6 +4,8 @@ CONFIG_DEFAULT_DEVICE_TREE=\"sun50i-h6-orangepi-lite2\"\n> CONFIG_SPL=y\n> CONFIG_MACH_SUN50I_H6=y\n> CONFIG_SUNXI_DRAM_H6_LPDDR3=y\n> +CONFIG_SPL_SUNXI_LED_STATUS=y\n> +CONFIG_SPL_SUNXI_LED_STATUS_GPIO=356\n> # CONFIG_PSCI_RESET is not set\n> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n> CONFIG_USB_EHCI_HCD=y\n> diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig\n> index d856a25814b..464b34f4ec0 100644\n> --- a/configs/orangepi_pc2_defconfig\n> +++ b/configs/orangepi_pc2_defconfig\n> @@ -6,6 +6,8 @@ CONFIG_SPL=y\n> CONFIG_MACH_SUN50I_H5=y\n> CONFIG_DRAM_ZQ=3881977\n> CONFIG_SPL_SPI_SUNXI=y\n> +CONFIG_SPL_SUNXI_LED_STATUS=y\n> +CONFIG_SPL_SUNXI_LED_STATUS_GPIO=362\n> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n> CONFIG_SPL_I2C=y\n> CONFIG_SPL_SYS_I2C_LEGACY=y\n> diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig\n> index e93154cc0e9..e5e9009378c 100644\n> --- a/configs/orangepi_prime_defconfig\n> +++ b/configs/orangepi_prime_defconfig\n> @@ -6,6 +6,8 @@ CONFIG_SPL=y\n> CONFIG_MACH_SUN50I_H5=y\n> CONFIG_DRAM_ZQ=3881977\n> # CONFIG_DRAM_ODT_EN is not set\n> +CONFIG_SPL_SUNXI_LED_STATUS=y\n> +CONFIG_SPL_SUNXI_LED_STATUS_GPIO=362\n> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n> CONFIG_SUN8I_EMAC=y\n> CONFIG_USB_EHCI_HCD=y\n> diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig\n> index 831bfe66e25..b387b4795ad 100644\n> --- a/configs/orangepi_zero2_defconfig\n> +++ b/configs/orangepi_zero2_defconfig\n> @@ -10,6 +10,8 @@ CONFIG_MACH_SUN50I_H616=y\n> CONFIG_SUNXI_DRAM_H616_DDR3_1333=y\n> CONFIG_R_I2C_ENABLE=y\n> CONFIG_SPL_SPI_SUNXI=y\n> +CONFIG_SPL_SUNXI_LED_STATUS=y\n> +CONFIG_SPL_SUNXI_LED_STATUS_GPIO=76\n> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n> CONFIG_SPL_I2C=y\n> CONFIG_SPL_SYS_I2C_LEGACY=y\n> diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig\n> index c4d9800975c..9758ffd385e 100644\n> --- a/configs/orangepi_zero_plus2_defconfig\n> +++ b/configs/orangepi_zero_plus2_defconfig\n> @@ -7,6 +7,8 @@ CONFIG_MACH_SUN50I_H5=y\n> CONFIG_DRAM_ZQ=3881977\n> # CONFIG_DRAM_ODT_EN is not set\n> CONFIG_MMC_SUNXI_SLOT_EXTRA=2\n> +CONFIG_SPL_SUNXI_LED_STATUS=y\n> +CONFIG_SPL_SUNXI_LED_STATUS_GPIO=362\n> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n> CONFIG_SUN8I_EMAC=y\n> CONFIG_USB_EHCI_HCD=y\n> diff --git a/configs/orangepi_zero_plus_defconfig b/configs/orangepi_zero_plus_defconfig\n> index 4b6491dc846..bb159428a14 100644\n> --- a/configs/orangepi_zero_plus_defconfig\n> +++ b/configs/orangepi_zero_plus_defconfig\n> @@ -6,6 +6,8 @@ CONFIG_SPL=y\n> CONFIG_MACH_SUN50I_H5=y\n> CONFIG_DRAM_ZQ=3881977\n> # CONFIG_DRAM_ODT_EN is not set\n> +CONFIG_SPL_SUNXI_LED_STATUS=y\n> +CONFIG_SPL_SUNXI_LED_STATUS_GPIO=362\n> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n> CONFIG_SUN8I_EMAC=y\n> CONFIG_USB_EHCI_HCD=y\n> diff --git a/configs/radxa-cubie-a5e_defconfig b/configs/radxa-cubie-a5e_defconfig\n> index 9d204ef5548..84bc4e3d4a9 100644\n> --- a/configs/radxa-cubie-a5e_defconfig\n> +++ b/configs/radxa-cubie-a5e_defconfig\n> @@ -15,6 +15,9 @@ CONFIG_DRAM_SUNXI_TPR12=0x3533302f\n> CONFIG_MACH_SUN55I_A523=y\n> CONFIG_MMC_SUNXI_SLOT_EXTRA=2\n> CONFIG_R_I2C_ENABLE=y\n> +CONFIG_SPL_SUNXI_LED_STATUS=y\n> +CONFIG_SPL_SUNXI_LED_STATUS_GPIO=356\n> +# CONFIG_SPL_SUNXI_LED_STATUS_ACTIVE_HIGH is not set\n> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n> CONFIG_SPL_I2C=y\n> CONFIG_SPL_SYS_I2C_LEGACY=y\n> diff --git a/configs/tanix_tx1_defconfig b/configs/tanix_tx1_defconfig\n> index 1bd167ce0f6..03b18701859 100644\n> --- a/configs/tanix_tx1_defconfig\n> +++ b/configs/tanix_tx1_defconfig\n> @@ -14,6 +14,8 @@ CONFIG_MACH_SUN50I_H616=y\n> CONFIG_SUNXI_DRAM_H616_LPDDR3=y\n> CONFIG_MMC_SUNXI_SLOT_EXTRA=2\n> CONFIG_R_I2C_ENABLE=y\n> +CONFIG_SPL_SUNXI_LED_STATUS=y\n> +CONFIG_SPL_SUNXI_LED_STATUS_GPIO=231\n> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n> CONFIG_SPL_I2C=y\n> CONFIG_SPL_SYS_I2C_LEGACY=y\n> -- \n> 2.43.0\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)","phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=sys-base.io","phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de","phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=sys-base.io","phobos.denx.de;\n spf=pass smtp.mailfrom=paulk@sys-base.io"],"Received":["from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5HgF73R7z1xqf\n\tfor ; Wed, 29 Apr 2026 23:08:41 +1000 (AEST)","from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id E2DB284862;\n\tWed, 29 Apr 2026 15:08:39 +0200 (CEST)","by phobos.denx.de (Postfix, from userid 109)\n id 9C6D2846FD; Wed, 29 Apr 2026 15:08:38 +0200 (CEST)","from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id DBC9584862\n for ; Wed, 29 Apr 2026 15:08:35 +0200 (CEST)","from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12])\n by leonov.paulk.fr (Postfix) with ESMTPS id 102A91F8004D\n for ; Wed, 29 Apr 2026 13:08:34 +0000 (UTC)","by laika.paulk.fr (Postfix, from userid 65534)\n id 6787FB404A0; Wed, 29 Apr 2026 13:08:33 +0000 (UTC)","from shepard (unknown [192.168.1.1])\n by laika.paulk.fr (Postfix) with ESMTPSA id D8235B4049B;\n Wed, 29 Apr 2026 13:08:32 +0000 (UTC)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-1.9 required=5.0 tests=BAYES_00,\n RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham\n autolearn_force=no version=3.4.2","Date":"Wed, 29 Apr 2026 15:08:30 +0200","From":"Paul Kocialkowski ","To":"Andre Przywara ","Cc":"u-boot@lists.denx.de, Tom Rini ,\n Quentin Schulz ,\n Jernej Skrabec , linux-sunxi@lists.linux.dev","Subject":"Re: [PATCH v2 3/3] sunxi: configs: enable power LEDs on 64-bit boards","Message-ID":"","References":"<20260429092828.3076719-1-andre.przywara@arm.com>\n <20260429092828.3076719-4-andre.przywara@arm.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha512;\n protocol=\"application/pgp-signature\"; boundary=\"4iRbv5l7W4bqZFhs\"","Content-Disposition":"inline","In-Reply-To":"<20260429092828.3076719-4-andre.przywara@arm.com>","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"}}]