[{"id":3683967,"web_url":"http://patchwork.ozlabs.org/comment/3683967/","msgid":"<7b8dde16-83e4-4a66-9ea7-6427b37ced78@nvidia.com>","list_archive_url":null,"date":"2026-04-29T09:53:40","subject":"Re: [PATCH] memory: tegra: Wire up system sleep PM ops","submitter":{"id":66273,"url":"http://patchwork.ozlabs.org/api/people/66273/","name":"Jon Hunter","email":"jonathanh@nvidia.com"},"content":"On 29/04/2026 07:11, Ashish Mhetre wrote:\n> The tegra-mc platform driver does not register any dev_pm_ops, so the\n> the SoC-specific ->resume() is never invoked (e.g. tegra186_mc_resume)\n> on system wake. On Tegra186 and later this means MC client Stream-ID\n> override registers are not reprogrammed.\n> \n> Register a dev_pm_ops on the tegra-mc driver and route the system\n> resume callback into mc->soc->ops->resume() so the existing SID\n> restore path runs again on wake.\n> \n> The MC interrupt mask registers also lose state across SC7, so\n> re-apply them on resume. Factor the existing intmask programming\n> out of tegra_mc_probe() into tegra_mc_setup_intmask() and reuse it\n> from both probe and resume to avoid duplicating the loop.\n> \n> No suspend callback is needed as the resume path reprograms all MC\n> state from the static SoC tables, so there is nothing to save.\n\nTechnically, this appears to be two fixes ...\n\n1. Register the PM ops so that the existing SoC specific resume is\n    called.\n2. Reprogram the MC interrupt masks for all SoCs on resume.\n\nSo ideally this should be split. The first part appears to be a fix for \nfe3b082a6eb8 (\"memory: tegra: Add SID override programming for MC \nclients\"). Although the 2nd part is a fix too, it is only applicable \nafter 9f2614510960 (\"memory: tegra: Prepare for supporting multiple \nintmask registers\") so may be a fixes tag is not appropriate here.\n\n\n> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>\n> ---\n>   drivers/memory/tegra/mc.c | 46 +++++++++++++++++++++++++++++++++------\n>   1 file changed, 39 insertions(+), 7 deletions(-)\n> \n> diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c\n> index d620660da331..cddcefdd16c5 100644\n> --- a/drivers/memory/tegra/mc.c\n> +++ b/drivers/memory/tegra/mc.c\n> @@ -13,6 +13,7 @@\n>   #include <linux/of.h>\n>   #include <linux/of_platform.h>\n>   #include <linux/platform_device.h>\n> +#include <linux/pm.h>\n>   #include <linux/slab.h>\n>   #include <linux/sort.h>\n>   #include <linux/tegra-icc.h>\n> @@ -910,6 +911,19 @@ static void tegra_mc_num_channel_enabled(struct tegra_mc *mc)\n>   \t}\n>   }\n>   \n> +static void tegra_mc_setup_intmask(struct tegra_mc *mc)\n> +{\n> +\tunsigned int i;\n> +\n> +\tfor (i = 0; i < mc->soc->num_intmasks; i++) {\n> +\t\tif (mc->soc->num_channels)\n> +\t\t\tmc_ch_writel(mc, MC_BROADCAST_CHANNEL, mc->soc->intmasks[i].mask,\n> +\t\t\t\t     mc->soc->intmasks[i].reg);\n> +\t\telse\n> +\t\t\tmc_writel(mc, mc->soc->intmasks[i].mask, mc->soc->intmasks[i].reg);\n> +\t}\n> +}\n> +\n>   static int tegra_mc_probe(struct platform_device *pdev)\n>   {\n>   \tstruct tegra_mc *mc;\n> @@ -970,13 +984,7 @@ static int tegra_mc_probe(struct platform_device *pdev)\n>   \t\t\t}\n>   \t\t}\n>   \n> -\t\tfor (i = 0; i < mc->soc->num_intmasks; i++) {\n> -\t\t\tif (mc->soc->num_channels)\n> -\t\t\t\tmc_ch_writel(mc, MC_BROADCAST_CHANNEL, mc->soc->intmasks[i].mask,\n> -\t\t\t\t\t     mc->soc->intmasks[i].reg);\n> -\t\t\telse\n> -\t\t\t\tmc_writel(mc, mc->soc->intmasks[i].mask, mc->soc->intmasks[i].reg);\n> -\t\t}\n> +\t\ttegra_mc_setup_intmask(mc);\n>   \t}\n>   \n>   \tif (mc->soc->reset_ops) {\n> @@ -1010,10 +1018,34 @@ static void tegra_mc_sync_state(struct device *dev)\n>   \t\ticc_sync_state(dev);\n>   }\n>   \n> +static int tegra_mc_resume(struct device *dev)\n> +{\n> +\tstruct tegra_mc *mc = dev_get_drvdata(dev);\n> +\tint err;\n> +\n> +\tif (mc->soc->ops && mc->soc->ops->resume) {\n> +\t\terr = mc->soc->ops->resume(mc);\n> +\t\tif (err)\n> +\t\t\treturn err;\n> +\t}\n> +\n> +\ttegra_mc_setup_intmask(mc);\n> +\n> +\treturn 0;\n> +}\n> +\n> +/*\n> + * No suspend callback is needed because the resume path reinitializes all\n> + * necessary MC register state (SID overrides, interrupt masks) from static\n> + * SoC data tables rather than from saved runtime state.\n> + */\n> +static DEFINE_SIMPLE_DEV_PM_OPS(tegra_mc_pm_ops, NULL, tegra_mc_resume);\n> +\n>   static struct platform_driver tegra_mc_driver = {\n>   \t.driver = {\n>   \t\t.name = \"tegra-mc\",\n>   \t\t.of_match_table = tegra_mc_of_match,\n> +\t\t.pm = pm_sleep_ptr(&tegra_mc_pm_ops),\n>   \t\t.suppress_bind_attrs = true,\n>   \t\t.sync_state = tegra_mc_sync_state,\n>   \t},\n\nOtherwise, the change looks fine.\n\nJon","headers":{"Return-Path":"\n <linux-tegra+bounces-14056-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=rZLFFydU;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-tegra+bounces-14056-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com\n header.b=\"rZLFFydU\"","smtp.subspace.kernel.org;\n arc=fail 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Thunderbird","Subject":"Re: [PATCH] memory: tegra: Wire up system sleep PM ops","To":"Ashish Mhetre <amhetre@nvidia.com>, krzk@kernel.org,\n thierry.reding@kernel.org","Cc":"ketanp@nvidia.com, linux-kernel@vger.kernel.org,\n linux-tegra@vger.kernel.org","References":"<20260429061122.807346-1-amhetre@nvidia.com>","Content-Language":"en-US","From":"Jon Hunter <jonathanh@nvidia.com>","In-Reply-To":"<20260429061122.807346-1-amhetre@nvidia.com>","Content-Type":"text/plain; charset=UTF-8; format=flowed","Content-Transfer-Encoding":"7bit","X-ClientProxiedBy":"SJ0PR05CA0051.namprd05.prod.outlook.com\n (2603:10b6:a03:33f::26) To LV5PR12MB9754.namprd12.prod.outlook.com\n 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Mhetre","email":"amhetre@nvidia.com"},"content":"On 4/29/2026 3:23 PM, Jon Hunter wrote:\n>\n> On 29/04/2026 07:11, Ashish Mhetre wrote:\n>> The tegra-mc platform driver does not register any dev_pm_ops, so the\n>> the SoC-specific ->resume() is never invoked (e.g. tegra186_mc_resume)\n>> on system wake. On Tegra186 and later this means MC client Stream-ID\n>> override registers are not reprogrammed.\n>>\n>> Register a dev_pm_ops on the tegra-mc driver and route the system\n>> resume callback into mc->soc->ops->resume() so the existing SID\n>> restore path runs again on wake.\n>>\n>> The MC interrupt mask registers also lose state across SC7, so\n>> re-apply them on resume. Factor the existing intmask programming\n>> out of tegra_mc_probe() into tegra_mc_setup_intmask() and reuse it\n>> from both probe and resume to avoid duplicating the loop.\n>>\n>> No suspend callback is needed as the resume path reprograms all MC\n>> state from the static SoC tables, so there is nothing to save.\n>\n> Technically, this appears to be two fixes ...\n>\n> 1. Register the PM ops so that the existing SoC specific resume is\n>    called.\n> 2. Reprogram the MC interrupt masks for all SoCs on resume.\n>\n> So ideally this should be split. The first part appears to be a fix \n> for fe3b082a6eb8 (\"memory: tegra: Add SID override programming for MC \n> clients\"). Although the 2nd part is a fix too, it is only applicable \n> after 9f2614510960 (\"memory: tegra: Prepare for supporting multiple \n> intmask registers\") so may be a fixes tag is not appropriate here.\n>\n>\n\nSure Jon, I'll split the patch in two and resend.\n\n>> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>\n>> ---\n>>   drivers/memory/tegra/mc.c | 46 +++++++++++++++++++++++++++++++++------\n>>   1 file changed, 39 insertions(+), 7 deletions(-)\n>>\n>> diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c\n>> index d620660da331..cddcefdd16c5 100644\n>> --- a/drivers/memory/tegra/mc.c\n>> +++ b/drivers/memory/tegra/mc.c\n>> @@ -13,6 +13,7 @@\n>>   #include <linux/of.h>\n>>   #include <linux/of_platform.h>\n>>   #include <linux/platform_device.h>\n>> +#include <linux/pm.h>\n>>   #include <linux/slab.h>\n>>   #include <linux/sort.h>\n>>   #include <linux/tegra-icc.h>\n>> @@ -910,6 +911,19 @@ static void tegra_mc_num_channel_enabled(struct \n>> tegra_mc *mc)\n>>       }\n>>   }\n>>   +static void tegra_mc_setup_intmask(struct tegra_mc *mc)\n>> +{\n>> +    unsigned int i;\n>> +\n>> +    for (i = 0; i < mc->soc->num_intmasks; i++) {\n>> +        if (mc->soc->num_channels)\n>> +            mc_ch_writel(mc, MC_BROADCAST_CHANNEL, \n>> mc->soc->intmasks[i].mask,\n>> +                     mc->soc->intmasks[i].reg);\n>> +        else\n>> +            mc_writel(mc, mc->soc->intmasks[i].mask, \n>> mc->soc->intmasks[i].reg);\n>> +    }\n>> +}\n>> +\n>>   static int tegra_mc_probe(struct platform_device *pdev)\n>>   {\n>>       struct tegra_mc *mc;\n>> @@ -970,13 +984,7 @@ static int tegra_mc_probe(struct platform_device \n>> *pdev)\n>>               }\n>>           }\n>>   -        for (i = 0; i < mc->soc->num_intmasks; i++) {\n>> -            if (mc->soc->num_channels)\n>> -                mc_ch_writel(mc, MC_BROADCAST_CHANNEL, \n>> mc->soc->intmasks[i].mask,\n>> -                         mc->soc->intmasks[i].reg);\n>> -            else\n>> -                mc_writel(mc, mc->soc->intmasks[i].mask, \n>> mc->soc->intmasks[i].reg);\n>> -        }\n>> +        tegra_mc_setup_intmask(mc);\n>>       }\n>>         if (mc->soc->reset_ops) {\n>> @@ -1010,10 +1018,34 @@ static void tegra_mc_sync_state(struct device \n>> *dev)\n>>           icc_sync_state(dev);\n>>   }\n>>   +static int tegra_mc_resume(struct device *dev)\n>> +{\n>> +    struct tegra_mc *mc = dev_get_drvdata(dev);\n>> +    int err;\n>> +\n>> +    if (mc->soc->ops && mc->soc->ops->resume) {\n>> +        err = mc->soc->ops->resume(mc);\n>> +        if (err)\n>> +            return err;\n>> +    }\n>> +\n>> +    tegra_mc_setup_intmask(mc);\n>> +\n>> +    return 0;\n>> +}\n>> +\n>> +/*\n>> + * No suspend callback is needed because the resume path \n>> reinitializes all\n>> + * necessary MC register state (SID overrides, interrupt masks) from \n>> static\n>> + * SoC data tables rather than from saved runtime state.\n>> + */\n>> +static DEFINE_SIMPLE_DEV_PM_OPS(tegra_mc_pm_ops, NULL, \n>> tegra_mc_resume);\n>> +\n>>   static struct platform_driver tegra_mc_driver = {\n>>       .driver = {\n>>           .name = \"tegra-mc\",\n>>           .of_match_table = tegra_mc_of_match,\n>> +        .pm = pm_sleep_ptr(&tegra_mc_pm_ops),\n>>           .suppress_bind_attrs = true,\n>>           .sync_state = tegra_mc_sync_state,\n>>       },\n>\n> Otherwise, the change looks fine.\n>\n> Jon","headers":{"Return-Path":"\n <linux-tegra+bounces-14065-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=i+Qi69a5;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; 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