[{"id":3684650,"web_url":"http://patchwork.ozlabs.org/comment/3684650/","msgid":"","list_archive_url":null,"date":"2026-04-30T12:09:32","subject":"Re: [PATCH v2 2/2] gpio: 74x164: support lines-initial-states for\n boot-time output state","submitter":{"id":92050,"url":"http://patchwork.ozlabs.org/api/people/92050/","name":"Linus Walleij","email":"linusw@kernel.org"},"content":"On Wed, Apr 29, 2026 at 5:51 AM Chanhong Jung wrote:\n\n> 74HC595 and 74LVC594 chains retain their output state from the first\n> serial write onwards. Today the driver always kicks that first write\n> from a zero-initialised buffer, so every output comes up low until user\n> space issues a write. Boards that rely on the chain to drive signals\n> whose power-on state matters (active-low indicators, reset lines, etc.)\n> have no way to express the desired initial pattern via DT.\n>\n> Read the optional lines-initial-states bitmask, recently documented for\n> this binding, into chip->buffer before the first\n> __gen_74x164_write_config() so the chain comes up in a known state on\n> the very first SPI transaction. Bit N maps to GPIO line N (matching the\n> nxp,pcf8575 convention); on this output-only device, bit=0 drives the\n> line low and bit=1 drives it high. Property absence keeps the existing\n> zeroing behaviour intact.\n>\n> Suggested-by: Linus Walleij \n> Signed-off-by: Chanhong Jung \n\nReviewed-by: Linus Walleij \n\nIf more users of this appears we can start thinking about brining\nthe support code into the core gpiolib but for now this works\nfine I think.\n\nYours,\nLinus Walleij","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=Zo3ISrqX;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35912-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"Zo3ISrqX\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5tNd0p1Lz1xqf\n\tfor ; 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Today the driver always kicks that first write\n> > from a zero-initialised buffer, so every output comes up low until user\n> > space issues a write. Boards that rely on the chain to drive signals\n> > whose power-on state matters (active-low indicators, reset lines, etc.)\n> > have no way to express the desired initial pattern via DT.\n> >\n> > Read the optional lines-initial-states bitmask, recently documented for\n> > this binding, into chip->buffer before the first\n> > __gen_74x164_write_config() so the chain comes up in a known state on\n> > the very first SPI transaction. Bit N maps to GPIO line N (matching the\n> > nxp,pcf8575 convention); on this output-only device, bit=0 drives the\n> > line low and bit=1 drives it high. Property absence keeps the existing\n> > zeroing behaviour intact.\n> >\n> > Suggested-by: Linus Walleij \n> > Signed-off-by: Chanhong Jung \n>\n> Reviewed-by: Linus Walleij \n>\n> If more users of this appears we can start thinking about brining\n> the support code into the core gpiolib but for now this works\n> fine I think.\n>\n> Yours,\n> Linus Walleij","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=f+OQ2IUB;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35949-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"f+OQ2IUB\"","smtp.subspace.kernel.org;\n arc=pass smtp.client-ip=209.85.217.49","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g67kS6kXvz1y1d\n\tfor ; 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