[{"id":3683809,"web_url":"http://patchwork.ozlabs.org/comment/3683809/","msgid":"<20260429053211.GA557136@black.igk.intel.com>","list_archive_url":null,"date":"2026-04-29T05:32:11","subject":"Re: [PATCH] gpiolib: acpi: Only trigger ActiveBoth interrupts on boot","submitter":{"id":14534,"url":"http://patchwork.ozlabs.org/api/people/14534/","name":"Mika Westerberg","email":"mika.westerberg@linux.intel.com"},"content":"On Tue, Apr 28, 2026 at 09:52:39PM -0500, Mario Limonciello wrote:\n> Commit ca876c7483b6 (\"gpiolib-acpi: make sure we trigger edge events at\n> least once on boot\") introduced logic to trigger edge-based GPIO\n> interrupts during initialization to ensure proper initial state setup\n> when firmware doesn't initialize it.\n> \n> However, according to the Microsoft GPIO documentation, triggering GPIO\n> interrupts during initialization should only happen for interrupts\n> marked as ActiveBoth (both IRQF_TRIGGER_RISING and IRQF_TRIGGER_FALLING)\n> and only when the associated GPIO line is already asserted (logic level\n> low).\n> \n> The current implementation incorrectly triggers:\n> 1. Any edge-triggered interrupt (RISING-only or FALLING-only)\n> 2. RISING interrupts when value is high and FALLING when value is low\n> \n> This causes problems at bootup for single-edge interrupts that\n> don't follow the ActiveBoth pattern.\n> \n> Fix this by:\n> - Only triggering when BOTH rising and falling edges are configured\n> - Only triggering when the GPIO line is asserted (value == 0)\n> \n> Reported-by: Francesco Lauritano \n> Closes: https://lore.kernel.org/all/6iFCwGH2vssb7NRUTWGpkubGMNbgIlBHSz40z8ZsezjxngXpoiiRiJaijviNvhiDAGIr43bfUmdxLmxYoHDjyft4DgwFc3Pnu5hzPguTa0s=@protonmail.com/\n> Tested-by: Marco Scardovi \n> Fixes: ca876c7483b69 (\"gpiolib-acpi: make sure we trigger edge events at least once on boot\")\n> Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/general-purpose-i-o--gpio-\n> Suggested-by: Armin Wolf \n> Signed-off-by: Mario Limonciello \n\nReviewed-by: Mika Westerberg ","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=Ubthj37M;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35747-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=\"Ubthj37M\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=192.198.163.19","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=linux.intel.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g55YN03MZz1yHv\n\tfor ; Wed, 29 Apr 2026 15:32:55 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id 32055303429D\n\tfor ; Wed, 29 Apr 2026 05:32:52 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 506CD38B7D4;\n\tWed, 29 Apr 2026 05:32:51 +0000 (UTC)","from mgamail.intel.com (mgamail.intel.com [192.198.163.19])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 825F1154425;\n\tWed, 29 Apr 2026 05:32:49 +0000 (UTC)","from fmviesa002.fm.intel.com ([10.60.135.142])\n by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 28 Apr 2026 22:32:49 -0700","from black.igk.intel.com ([10.91.253.5])\n by fmviesa002.fm.intel.com with ESMTP; 28 Apr 2026 22:32:12 -0700","by black.igk.intel.com (Postfix, from userid 1001)\n\tid 7142895; Wed, 29 Apr 2026 07:32:11 +0200 (CEST)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777440771; cv=none;\n b=HiTsuO7bj9f4BwWsC32GsHKM+MvxfjBXugxZFNGvl9zK5rdXwMN6sYSMsl2Bh1JXhIlNSCFS2YLzgFFHAPBW4479pUTsFMtS/jinoKToEfcWRfpG3kDCgoSohNIAQzuqT95BwUCIZsgK13qtIR7Np2pnk6+YB2z24FavfNr63QY=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777440771; c=relaxed/simple;\n\tbh=imCpF8OHGJq9FBotlmnXuxwdACVRuU6SJcf5BFUg3EU=;\n\th=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version:\n\t Content-Type:Content-Disposition:In-Reply-To;\n b=Of8p9bc809vxVY9i6WH/NPFWodwkaPdZvopW76w2fFQU4v063Q+nTgy/JvpUeONZKyN+EYSpu2knMPo3GzHVb7cTJ1EeWl5wU5Pnn1NNUvhfWjKon2X6Cc42K2+znIrW6vq2Yt4o8t0smcJMZZoj2xBv9A9yovnubNkPdwWWNmQ=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com;\n spf=pass smtp.mailfrom=linux.intel.com;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=Ubthj37M; arc=none smtp.client-ip=192.198.163.19","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777440769; x=1808976769;\n h=date:from:to:cc:subject:message-id:references:\n mime-version:in-reply-to;\n bh=imCpF8OHGJq9FBotlmnXuxwdACVRuU6SJcf5BFUg3EU=;\n b=Ubthj37MaQeyqNJfLrHv/mBSXFj0aIHiTLGvSvAvlKScStNkc0pOyz/1\n QHw8oDPhOp3bnF2PUIqBc4ZA+cFwQ1HaR/rkwbH8g0mLgVOHCCT8ipN1j\n dVi6HvauGvyuMh3PHtPW3Wgc03RIWEKJnr+/oENqcSxsZ26xxwVuo3S8c\n AHWOEqX+EIjPo2dmZ/MVJito5YReO0Sr50vt5Mqr9adOcHsgHCzvgmW2u\n vIJCF2gVi5+XK+dq0Ufx2A6Jw55fQVK3GEqv3Ctd1YoGDb4StK2HWcQ2z\n zkH6GO0cIHIZ4NeZDvmmOBKRwtiWTp6YrOm7YGW9gjR4MJnn1/xWDrMhW\n g==;","X-CSE-ConnectionGUID":["Vh2oKDQuQzCLRBQ5Wqeclg==","0RIj5XjQR6ub5LAWUwa3gA=="],"X-CSE-MsgGUID":["W60KA3K5RTK6eKwMjX/vDw==","QD7Xf7pDQcmxrwfQiRL98g=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11770\"; a=\"77391560\"","E=Sophos;i=\"6.23,205,1770624000\";\n d=\"scan'208\";a=\"77391560\"","E=Sophos;i=\"6.23,205,1770624000\";\n d=\"scan'208\";a=\"257479037\""],"X-ExtLoop1":"1","Date":"Wed, 29 Apr 2026 07:32:11 +0200","From":"Mika Westerberg ","To":"Mario Limonciello ","Cc":"westeri@kernel.org, andriy.shevchenko@linux.intel.com,\n\tlinusw@kernel.org, brgl@kernel.org, bentiss@kernel.org,\n\thansg@kernel.org,\n\tFrancesco Lauritano ,\n\tMarco Scardovi , Armin Wolf ,\n\tlinux-gpio@vger.kernel.org, linux-acpi@vger.kernel.org","Subject":"Re: [PATCH] gpiolib: acpi: Only trigger ActiveBoth interrupts on boot","Message-ID":"<20260429053211.GA557136@black.igk.intel.com>","References":"<20260429025247.1372984-1-mario.limonciello@amd.com>","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Disposition":"inline","In-Reply-To":"<20260429025247.1372984-1-mario.limonciello@amd.com>"}},{"id":3683844,"web_url":"http://patchwork.ozlabs.org/comment/3683844/","msgid":"","list_archive_url":null,"date":"2026-04-29T07:09:55","subject":"Re: [PATCH] gpiolib: acpi: Only trigger ActiveBoth interrupts on boot","submitter":{"id":8583,"url":"http://patchwork.ozlabs.org/api/people/8583/","name":"Andy Shevchenko","email":"andriy.shevchenko@linux.intel.com"},"content":"On Tue, Apr 28, 2026 at 09:52:39PM -0500, Mario Limonciello wrote:\n> Commit ca876c7483b6 (\"gpiolib-acpi: make sure we trigger edge events at\n> least once on boot\") introduced logic to trigger edge-based GPIO\n> interrupts during initialization to ensure proper initial state setup\n> when firmware doesn't initialize it.\n> \n> However, according to the Microsoft GPIO documentation, triggering GPIO\n> interrupts during initialization should only happen for interrupts\n> marked as ActiveBoth (both IRQF_TRIGGER_RISING and IRQF_TRIGGER_FALLING)\n> and only when the associated GPIO line is already asserted (logic level\n> low).\n> \n> The current implementation incorrectly triggers:\n> 1. Any edge-triggered interrupt (RISING-only or FALLING-only)\n> 2. RISING interrupts when value is high and FALLING when value is low\n> \n> This causes problems at bootup for single-edge interrupts that\n> don't follow the ActiveBoth pattern.\n> \n> Fix this by:\n> - Only triggering when BOTH rising and falling edges are configured\n> - Only triggering when the GPIO line is asserted (value == 0)\n\nGood catch!\n\n...\n\n> \tif (acpi_gpio_need_run_edge_events_on_boot() &&\n> -\t (event->irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING))) {\n> +\t ((event->irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) ==\n> +\t (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING))) {\n\nUse _MASK in both cases.\n\n\t ((event->irqflags & IRQF_TRIGGER_MASK) == IRQF_TRIGGER_MASK)) {\n\n> \t\tvalue = gpiod_get_raw_value_cansleep(event->desc);\n> -\t\tif (((event->irqflags & IRQF_TRIGGER_RISING) && value == 1) ||\n> -\t\t ((event->irqflags & IRQF_TRIGGER_FALLING) && value == 0))\n> +\t\tif (value == 0)\n> \t\t\tevent->handler(event->irq, event);\n> \t}","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=kISnpD83;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35754-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=\"kISnpD83\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=198.175.65.9","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=linux.intel.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g57qz5Ff7z1yHv\n\tfor ; Wed, 29 Apr 2026 17:15:43 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id E470B304DE92\n\tfor ; Wed, 29 Apr 2026 07:10:11 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 0DC753A380F;\n\tWed, 29 Apr 2026 07:10:03 +0000 (UTC)","from mgamail.intel.com (mgamail.intel.com [198.175.65.9])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 4959139D6DB;\n\tWed, 29 Apr 2026 07:10:01 +0000 (UTC)","from fmviesa001.fm.intel.com ([10.60.135.141])\n by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 29 Apr 2026 00:10:00 -0700","from ettammin-mobl2.ger.corp.intel.com (HELO localhost)\n ([10.245.245.141])\n by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 29 Apr 2026 00:09:57 -0700"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777446602; cv=none;\n b=C6x26nWunZ3Ej2jbHwiZmiejWnSUmAbaP6lY8qqUm3hYgzaHkjvErkb7i98IW5JXEgPbXyG36T6LGGGPujnnPOnH4BUWDBQ3bDQphGVkjT6By6qQM2+FKNIEw07DUczP00y3dBzbh+gYFGtUsiy6mKzdIBmHnuy8QjmwIlR/SQA=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777446602; c=relaxed/simple;\n\tbh=4Zy0uAMx48BrgJFZV9aSEkf8HlXY7+fqMe6l8NPxS0c=;\n\th=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version:\n\t Content-Type:Content-Disposition:In-Reply-To;\n b=DIemqhATRQapu/q5WWvjbXsUN/TOKkTgpWBCpSXf0Zx8MvZoDeUrlcstqpR3NrcllLzdJaADVv6Gy9ADsgNMqvleKz9mZYIk2uFYl+jW720aGJqnqrnZiezvKhwJ+bGm4VPthn4I+98/2qssbx4BWCZBgMictMCcX4j0nAyEjrQ=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com;\n spf=pass smtp.mailfrom=linux.intel.com;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=kISnpD83; arc=none smtp.client-ip=198.175.65.9","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777446601; x=1808982601;\n h=date:from:to:cc:subject:message-id:references:\n mime-version:in-reply-to;\n bh=4Zy0uAMx48BrgJFZV9aSEkf8HlXY7+fqMe6l8NPxS0c=;\n b=kISnpD83JAnq6qIGq3LCIUZiEWHgfMHxcRVXPTI8QKLSiY43Rd9w55Yv\n ntCP+oI6NZmBZnI3HiC+am4TLXFGjG0j9M9CGB3KUH8vSocDURyf50rz6\n YvgluPM6Wfj2U78UbynAaAPaF5mScg/EmOrFlAXZ9v61+n4IpnnL7wQQ4\n nOIJXQbaNMujbLBhFs5lLIUv/+ho/lq4l7xr41UsUZfFpCpg6EhhiCFzm\n vK4IAI0DENsw6DoXZIksk5xj57VKoTI3jRqe0KBUG6HMDr/ON9QzXXJFV\n YxKUQYLvt61usapTuzVDlQi5ATPSzb22fbPPtS5SSEPx33onO+8gVkbU7\n g==;","X-CSE-ConnectionGUID":["Jgwxn9fWRk+mz2EgPKvMIg==","DQYx6t+QR3SDFVd1q3NErQ=="],"X-CSE-MsgGUID":["GsxxrYFcTTakRPLXlJn8lg==","G/VvZE3LTr+stC8gBLUahg=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11770\"; a=\"101030814\"","E=Sophos;i=\"6.23,205,1770624000\";\n d=\"scan'208\";a=\"101030814\"","E=Sophos;i=\"6.23,205,1770624000\";\n d=\"scan'208\";a=\"257739654\""],"X-ExtLoop1":"1","Date":"Wed, 29 Apr 2026 10:09:55 +0300","From":"Andy Shevchenko ","To":"Mario Limonciello ","Cc":"westeri@kernel.org, linusw@kernel.org, brgl@kernel.org,\n\tbentiss@kernel.org, hansg@kernel.org,\n\tFrancesco Lauritano ,\n\tMarco Scardovi , Armin Wolf ,\n\tmika.westerberg@linux.intel.com, linux-gpio@vger.kernel.org,\n\tlinux-acpi@vger.kernel.org","Subject":"Re: [PATCH] gpiolib: acpi: Only trigger ActiveBoth interrupts on boot","Message-ID":"","References":"<20260429025247.1372984-1-mario.limonciello@amd.com>","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20260429025247.1372984-1-mario.limonciello@amd.com>","Organization":"Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6\n krs, Bertel Jungin Aukio 5, 02600 Espoo"}},{"id":3683850,"web_url":"http://patchwork.ozlabs.org/comment/3683850/","msgid":"","list_archive_url":null,"date":"2026-04-29T07:19:09","subject":"Re: [PATCH] gpiolib: acpi: Only trigger ActiveBoth interrupts on boot","submitter":{"id":8583,"url":"http://patchwork.ozlabs.org/api/people/8583/","name":"Andy Shevchenko","email":"andriy.shevchenko@linux.intel.com"},"content":"On Wed, Apr 29, 2026 at 10:10:00AM +0300, Andy Shevchenko wrote:\n> On Tue, Apr 28, 2026 at 09:52:39PM -0500, Mario Limonciello wrote:\n\n...\n\n> > -\t (event->irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING))) {\n> > +\t ((event->irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) ==\n> > +\t (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING))) {\n> \n> Use _MASK in both cases.\n> \n> \t ((event->irqflags & IRQF_TRIGGER_MASK) == IRQF_TRIGGER_MASK)) {\n\nAh, I thought it was only for edge ones, seems we can't use it in the second part.\n\nThe other definitions are for TYPE, there we have IRQ_TYPE_EDGE_BOTH.","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=HW3Nz36e;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; helo=tor.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35755-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=\"HW3Nz36e\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=198.175.65.20","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=linux.intel.com"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g580Y50CNz1xqf\n\tfor ; Wed, 29 Apr 2026 17:23:09 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 5F0EF300E16C\n\tfor ; Wed, 29 Apr 2026 07:19:17 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 843B93A3E84;\n\tWed, 29 Apr 2026 07:19:16 +0000 (UTC)","from mgamail.intel.com (mgamail.intel.com [198.175.65.20])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 1185F3A257F;\n\tWed, 29 Apr 2026 07:19:14 +0000 (UTC)","from orviesa004.jf.intel.com ([10.64.159.144])\n by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 29 Apr 2026 00:19:14 -0700","from ettammin-mobl2.ger.corp.intel.com (HELO localhost)\n ([10.245.245.141])\n by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 29 Apr 2026 00:19:11 -0700"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777447156; cv=none;\n b=cYgeS5IzzqRBPbuKSMZO/ldkyQqfvIarUtiTx4jR+FwTzrjpVYDrsyyIJyoe8EJ2ZHRJN5ckblI0C2Ocf1pvYXVdHglhw91HSVrVpOTPPj/x5kyAFcKxToDQAbKPOzAj/XA7Ribq7qplyAXI0K+xHt2+hJ/1zgd4OduiOMFo2ZA=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777447156; c=relaxed/simple;\n\tbh=/dyBE2LzobrYrQWPogsatP6ANqkMRMG+/NBhCIlk8jw=;\n\th=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version:\n\t Content-Type:Content-Disposition:In-Reply-To;\n b=Y7tCBDbx0SJ9kU3TwQ7yeagjk0peCarfHxK3SoAMrwwTciJY4tGeylThcfM7gB74LCGyfC8cqI3ms1JJFpYkYoaXF0vMUUTtNdHxV+jUc0Ji6sgJR3bO53xTXcnWq+zWleoKAgwaPIfl3sM9/p+QNa5UsrlFNA17x0fh/Yoal/8=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com;\n spf=pass smtp.mailfrom=linux.intel.com;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=HW3Nz36e; arc=none smtp.client-ip=198.175.65.20","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777447155; x=1808983155;\n h=date:from:to:cc:subject:message-id:references:\n mime-version:in-reply-to;\n bh=/dyBE2LzobrYrQWPogsatP6ANqkMRMG+/NBhCIlk8jw=;\n b=HW3Nz36e4f3qAghDpgcNEenPJeZVJg3nb2GeACf1WJOXqOQBkoHti6ii\n dRGEf6Ikw3kT/nNQo+pSeZx5rhPUfRw+PsOmlxOOxI6BirA5bnENvNG0F\n Cjjf/qvhwjnpZj+dIOUzVZGm056/YMk738WIi5oCDV8P6CsaBCfo1T2aG\n HI9H3vqJprAtRKbMd3kkefDWpVuEYr+IjgiPAHwMoszOymw0mR+QVe6WW\n AU/EW3BhkAIy4UdOXn4oL/2EViMQ32W7um/zvdEksRnQjILq8tZmvay2f\n dfthSV8fKrnI2U0au8N8QrS9ike2WsDKqHHOBXD0wxp5gvbPij1yW5u09\n w==;","X-CSE-ConnectionGUID":["4U9+MJX2SCG2gUCT5e/oSw==","8LDl7vqpSnqLVbfyQ9XNbw=="],"X-CSE-MsgGUID":["R4E6jzZiTHubfI04/XOb8A==","FEZ4flpjQKy+HZiDCNBnig=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11770\"; a=\"78079143\"","E=Sophos;i=\"6.23,205,1770624000\";\n d=\"scan'208\";a=\"78079143\"","E=Sophos;i=\"6.23,205,1770624000\";\n d=\"scan'208\";a=\"238517923\""],"X-ExtLoop1":"1","Date":"Wed, 29 Apr 2026 10:19:09 +0300","From":"Andy Shevchenko ","To":"Mario Limonciello ","Cc":"westeri@kernel.org, linusw@kernel.org, brgl@kernel.org,\n\tbentiss@kernel.org, hansg@kernel.org,\n\tFrancesco Lauritano ,\n\tMarco Scardovi , Armin Wolf ,\n\tmika.westerberg@linux.intel.com, linux-gpio@vger.kernel.org,\n\tlinux-acpi@vger.kernel.org","Subject":"Re: [PATCH] gpiolib: acpi: Only trigger ActiveBoth interrupts on boot","Message-ID":"","References":"<20260429025247.1372984-1-mario.limonciello@amd.com>\n ","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"","Organization":"Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6\n krs, Bertel Jungin Aukio 5, 02600 Espoo"}},{"id":3683851,"web_url":"http://patchwork.ozlabs.org/comment/3683851/","msgid":"","list_archive_url":null,"date":"2026-04-29T07:19:47","subject":"Re: [PATCH] gpiolib: acpi: Only trigger ActiveBoth interrupts on boot","submitter":{"id":8583,"url":"http://patchwork.ozlabs.org/api/people/8583/","name":"Andy Shevchenko","email":"andriy.shevchenko@linux.intel.com"},"content":"On Wed, Apr 29, 2026 at 07:32:11AM +0200, Mika Westerberg wrote:\n> On Tue, Apr 28, 2026 at 09:52:39PM -0500, Mario Limonciello wrote:\n> > Commit ca876c7483b6 (\"gpiolib-acpi: make sure we trigger edge events at\n> > least once on boot\") introduced logic to trigger edge-based GPIO\n> > interrupts during initialization to ensure proper initial state setup\n> > when firmware doesn't initialize it.\n> > \n> > However, according to the Microsoft GPIO documentation, triggering GPIO\n> > interrupts during initialization should only happen for interrupts\n> > marked as ActiveBoth (both IRQF_TRIGGER_RISING and IRQF_TRIGGER_FALLING)\n> > and only when the associated GPIO line is already asserted (logic level\n> > low).\n> > \n> > The current implementation incorrectly triggers:\n> > 1. Any edge-triggered interrupt (RISING-only or FALLING-only)\n> > 2. RISING interrupts when value is high and FALLING when value is low\n> > \n> > This causes problems at bootup for single-edge interrupts that\n> > don't follow the ActiveBoth pattern.\n> > \n> > Fix this by:\n> > - Only triggering when BOTH rising and falling edges are configured\n> > - Only triggering when the GPIO line is asserted (value == 0)\n> > \n> > Reported-by: Francesco Lauritano \n> > Closes: https://lore.kernel.org/all/6iFCwGH2vssb7NRUTWGpkubGMNbgIlBHSz40z8ZsezjxngXpoiiRiJaijviNvhiDAGIr43bfUmdxLmxYoHDjyft4DgwFc3Pnu5hzPguTa0s=@protonmail.com/\n> > Tested-by: Marco Scardovi \n> > Fixes: ca876c7483b69 (\"gpiolib-acpi: make sure we trigger edge events at least once on boot\")\n> > Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/general-purpose-i-o--gpio-\n> > Suggested-by: Armin Wolf \n> > Signed-off-by: Mario Limonciello \n> \n> Reviewed-by: Mika Westerberg \n\nPushed to my review and testing queue, thanks!","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=Klnvo1KJ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35756-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=\"Klnvo1KJ\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=192.198.163.19","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=linux.intel.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g581N71Wsz1xqf\n\tfor ; Wed, 29 Apr 2026 17:23:52 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id CD1153037470\n\tfor ; Wed, 29 Apr 2026 07:19:55 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id E6BEC3A453A;\n\tWed, 29 Apr 2026 07:19:54 +0000 (UTC)","from mgamail.intel.com (mgamail.intel.com [192.198.163.19])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 64F25191F91;\n\tWed, 29 Apr 2026 07:19:53 +0000 (UTC)","from fmviesa003.fm.intel.com ([10.60.135.143])\n by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 29 Apr 2026 00:19:53 -0700","from ettammin-mobl2.ger.corp.intel.com (HELO localhost)\n ([10.245.245.141])\n by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 29 Apr 2026 00:19:50 -0700"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777447194; cv=none;\n b=NzilS1IPgf27k/4/1KbfnWuBdjzsohHde7HqthM1+U47kqNSxkPEnUZjlk0HUveJYJUtLQq+jycPyXfeOI+qJ0HLIupLuRc/gRWKPpOf6GvwQHdXk5VEYVINPbDTngUGykWzleWDHn22Wr6oJNMofsQYFO1WC1d9nVPj6P6MvS4=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777447194; c=relaxed/simple;\n\tbh=MGGuJ836ozO0L7P2t7NyxjOwrd4vHvDWNMWMYI7mNn4=;\n\th=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version:\n\t Content-Type:Content-Disposition:In-Reply-To;\n b=RxEmBaUt+pB5atnX/zc8Rysoh0Zf9msTQm1L8JjmNSuz7PBJgPof1HQ0QykRxz0EklaFcBws8HRI94MbEdNidL74DiaIqAFZ2TWS2ypo6vRQTiITmeZFyPqsLWod8C/r5FrqmJCnBitC0XFgaeJ3akG8EvY8jIECq+5rw/PXqZI=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com;\n spf=pass smtp.mailfrom=linux.intel.com;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=Klnvo1KJ; arc=none smtp.client-ip=192.198.163.19","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777447194; x=1808983194;\n h=date:from:to:cc:subject:message-id:references:\n mime-version:in-reply-to;\n bh=MGGuJ836ozO0L7P2t7NyxjOwrd4vHvDWNMWMYI7mNn4=;\n b=Klnvo1KJs1WrP1kUaDeox57P13ByQX4iIlqioma3bMeMbH4u1e7+Suf6\n WZ4+zzBtit8OLKEk45Jv1dduGPyEiL2abB67SYVbyOtXK5PhnXWeRLv82\n ifUAn4W6aPSWlrSDFSQalVOTA4uFFZP0EtJWCxLo9DHBkhXK87pw9IZ/T\n CHhNjDYFzUDMykU74QQEQRKHuBU/IC9tD6oY22j8zmAt9tY+3Djtd3LkY\n C0mhmnyKcqEXg4uF6G4TgbXfKFGjNhiawNG0aoahJTJh+E8EKkf26fVFi\n dKtmssH0mnx20x9G/Bbx3uXQIuCf8B7P3CTMiCZgFU8v6SYCAXCi53D9m\n g==;","X-CSE-ConnectionGUID":["py37BOL2Qvqh0eytfwd3yA==","gfRDYfPuRA+YiYCFgCjWDw=="],"X-CSE-MsgGUID":["iQysPTiPQj2qa6GPpD1Ytg==","36r9hPD8QT2KgkuMIxdnCg=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11770\"; a=\"77399789\"","E=Sophos;i=\"6.23,205,1770624000\";\n d=\"scan'208\";a=\"77399789\""],"X-ExtLoop1":"1","Date":"Wed, 29 Apr 2026 10:19:47 +0300","From":"Andy Shevchenko ","To":"Mika Westerberg ","Cc":"Mario Limonciello , westeri@kernel.org,\n\tlinusw@kernel.org, brgl@kernel.org, bentiss@kernel.org,\n\thansg@kernel.org,\n\tFrancesco Lauritano ,\n\tMarco Scardovi , Armin Wolf ,\n\tlinux-gpio@vger.kernel.org, linux-acpi@vger.kernel.org","Subject":"Re: [PATCH] gpiolib: acpi: Only trigger ActiveBoth interrupts on boot","Message-ID":"","References":"<20260429025247.1372984-1-mario.limonciello@amd.com>\n <20260429053211.GA557136@black.igk.intel.com>","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20260429053211.GA557136@black.igk.intel.com>","Organization":"Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6\n krs, Bertel Jungin Aukio 5, 02600 Espoo"}},{"id":3683970,"web_url":"http://patchwork.ozlabs.org/comment/3683970/","msgid":"<6f359bec-2525-40e9-9994-15b16fb82f12@kernel.org>","list_archive_url":null,"date":"2026-04-29T09:48:13","subject":"Re: [PATCH] gpiolib: acpi: Only trigger ActiveBoth interrupts on boot","submitter":{"id":91026,"url":"http://patchwork.ozlabs.org/api/people/91026/","name":"Hans de Goede","email":"hansg@kernel.org"},"content":"Hi Mario,\n\nThank you for fixing this.\n\nOn 29-Apr-26 04:52, Mario Limonciello wrote:\n> Commit ca876c7483b6 (\"gpiolib-acpi: make sure we trigger edge events at\n> least once on boot\") introduced logic to trigger edge-based GPIO\n> interrupts during initialization to ensure proper initial state setup\n> when firmware doesn't initialize it.\n> \n> However, according to the Microsoft GPIO documentation, triggering GPIO\n> interrupts during initialization should only happen for interrupts\n> marked as ActiveBoth (both IRQF_TRIGGER_RISING and IRQF_TRIGGER_FALLING)\n> and only when the associated GPIO line is already asserted (logic level\n> low).\n> \n> The current implementation incorrectly triggers:\n> 1. Any edge-triggered interrupt (RISING-only or FALLING-only)\n> 2. RISING interrupts when value is high and FALLING when value is low\n> \n> This causes problems at bootup for single-edge interrupts that\n> don't follow the ActiveBoth pattern.\n> \n> Fix this by:\n> - Only triggering when BOTH rising and falling edges are configured\n> - Only triggering when the GPIO line is asserted (value == 0)\n> \n> Reported-by: Francesco Lauritano \n> Closes: https://lore.kernel.org/all/6iFCwGH2vssb7NRUTWGpkubGMNbgIlBHSz40z8ZsezjxngXpoiiRiJaijviNvhiDAGIr43bfUmdxLmxYoHDjyft4DgwFc3Pnu5hzPguTa0s=@protonmail.com/\n> Tested-by: Marco Scardovi \n> Fixes: ca876c7483b69 (\"gpiolib-acpi: make sure we trigger edge events at least once on boot\")\n> Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/general-purpose-i-o--gpio-\n> Suggested-by: Armin Wolf \n> Signed-off-by: Mario Limonciello \n> ---\n> drivers/gpio/gpiolib-acpi-core.c | 19 +++++++++++++++----\n> 1 file changed, 15 insertions(+), 4 deletions(-)\n> \n> diff --git a/drivers/gpio/gpiolib-acpi-core.c b/drivers/gpio/gpiolib-acpi-core.c\n> index 09f860200a059..eb8a40cfb7a98 100644\n> --- a/drivers/gpio/gpiolib-acpi-core.c\n> +++ b/drivers/gpio/gpiolib-acpi-core.c\n> @@ -233,12 +233,23 @@ static void acpi_gpiochip_request_irq(struct acpi_gpio_chip *acpi_gpio,\n> \n> \tevent->irq_requested = true;\n> \n> -\t/* Make sure we trigger the initial state of edge-triggered IRQs */\n> +\t/*\n> +\t * Make sure we trigger the initial state of ActiveBoth IRQs.\n> +\t *\n> +\t * According to the Microsoft GPIO documentation, triggering GPIO\n> +\t * interrupts marked as ActiveBoth during initialization is correct\n> +\t * as long as the associated GPIO line is already \"asserted\"\n> +\t * (logic level low). We should not trigger edge-based GPIO\n> +\t * interrupts not marked as ActiveBoth.\n> +\t *\n> +\t * See: https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/general-purpose-i-o--gpio-\n> +\t * Section: \"GPIO controllers and ActiveBoth interrupts\"\n> +\t */\n> \tif (acpi_gpio_need_run_edge_events_on_boot() &&\n> -\t (event->irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING))) {\n> +\t ((event->irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) ==\n> +\t (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING))) {\n> \t\tvalue = gpiod_get_raw_value_cansleep(event->desc);\n> -\t\tif (((event->irqflags & IRQF_TRIGGER_RISING) && value == 1) ||\n> -\t\t ((event->irqflags & IRQF_TRIGGER_FALLING) && value == 0))\n> +\t\tif (value == 0)\n> \t\t\tevent->handler(event->irq, event);\n> \t}\n> }\n\nOne nitpick, which can be a follow-up patch since Andy has already picked this\none up.\n\nI think that now that the second if condition has been simplified to just\nvalue == 0, it can be added to the first if as \" && value == 0\" dropping\nthe nested if.\n\nRegards,\n\nHans","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=GO175WCS;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; helo=sin.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35788-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"GO175WCS\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"],"Received":["from sin.lore.kernel.org (sin.lore.kernel.org\n [IPv6:2600:3c15:e001:75::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5CXp5XNpz1yHX\n\tfor ; Wed, 29 Apr 2026 20:02:50 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sin.lore.kernel.org (Postfix) with ESMTP id 9762E3030F7A\n\tfor ; Wed, 29 Apr 2026 09:48:19 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 8462B3B27CA;\n\tWed, 29 Apr 2026 09:48:17 +0000 (UTC)","from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 44D16242D97;\n\tWed, 29 Apr 2026 09:48:17 +0000 (UTC)","by smtp.kernel.org (Postfix) with ESMTPSA id EC5FAC2BCC4;\n\tWed, 29 Apr 2026 09:48:14 +0000 (UTC)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777456097; cv=none;\n b=sooS6RxLtVueIO0y6w4FUV2DA5HoPge89gUvgsddsQpWh9tSIB4YAou55kQqK2BTCVRKbFnlRIvAGkxLoKkSWVwbF/vr/wW84xd1GExJXq89aTgl7WYUgE7+hKlUISn6BaNqqo4prLrmkczrXxpvFimt/yeTJMXGftbokvLTV44=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777456097; c=relaxed/simple;\n\tbh=NZip6VplqLrFDbZluFF3TcPmivzaEsW7gm7zctD3Geo=;\n\th=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From:\n\t In-Reply-To:Content-Type;\n b=YqN9rovBzaA9g4DvZYi8JaK1Omc79nUfS3+36RuvCy7HR388/gvtkOYlFlXyGMr2yTgQ6jq75MWa5zZf3UKc/vv8QEhOE4TidoIOo0RB4pplLA24xPjWlWObMDvmckhjDUqX7EBmNkdP6YYKGKaqz1ytc0bYH5TWEU45MUn5a7c=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=GO175WCS; arc=none smtp.client-ip=10.30.226.201","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1777456097;\n\tbh=NZip6VplqLrFDbZluFF3TcPmivzaEsW7gm7zctD3Geo=;\n\th=Date:Subject:To:Cc:References:From:In-Reply-To:From;\n\tb=GO175WCSiWIEiActNXB09kJxIsm0h8yR2/gpRWTZo4jQKTJG73IzjEP2Q6r2iZzIW\n\t B3XEt0GRyln4ItYpGnakkikqFjK7L2I1s9p8u0733p7StBxKt0EuJ0fHLnKbToupwp\n\t XCnYAkd0JpfAsf7MiDlxrPQ4MKJLN3Q7vVz9T1OzWWdfTfkswWtKLyjNqkJPkRr2EN\n\t VvUMhw/mDi4Fh+tqzS9HPrF37umTpWnP1PrFlolf7DXjiWsCE6exkoRCXkTFcoYwDf\n\t QcXAN/kAyOc+z730FmQAsS6E3yAOfe7Z5DX2tTFCo1+TSXSfJ8MM5a9Q84tqiviOBb\n\t ePO0fyjD+D+og==","Message-ID":"<6f359bec-2525-40e9-9994-15b16fb82f12@kernel.org>","Date":"Wed, 29 Apr 2026 11:48:13 +0200","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","User-Agent":"Mozilla Thunderbird","Subject":"Re: [PATCH] gpiolib: acpi: Only trigger ActiveBoth interrupts on boot","To":"Mario Limonciello , westeri@kernel.org,\n andriy.shevchenko@linux.intel.com, linusw@kernel.org, brgl@kernel.org,\n bentiss@kernel.org","Cc":"Francesco Lauritano ,\n Marco Scardovi , Armin Wolf ,\n mika.westerberg@linux.intel.com, linux-gpio@vger.kernel.org,\n linux-acpi@vger.kernel.org","References":"<20260429025247.1372984-1-mario.limonciello@amd.com>","From":"Hans de Goede ","Content-Language":"en-US, nl","In-Reply-To":"<20260429025247.1372984-1-mario.limonciello@amd.com>","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"7bit"}},{"id":3683974,"web_url":"http://patchwork.ozlabs.org/comment/3683974/","msgid":"","list_archive_url":null,"date":"2026-04-29T10:24:17","subject":"Re: [PATCH] gpiolib: acpi: Only trigger ActiveBoth interrupts on boot","submitter":{"id":8583,"url":"http://patchwork.ozlabs.org/api/people/8583/","name":"Andy Shevchenko","email":"andriy.shevchenko@linux.intel.com"},"content":"On Wed, Apr 29, 2026 at 11:48:13AM +0200, Hans de Goede wrote:\n> On 29-Apr-26 04:52, Mario Limonciello wrote:\n\n...\n\n> > +\t/*\n> > +\t * Make sure we trigger the initial state of ActiveBoth IRQs.\n> > +\t *\n> > +\t * According to the Microsoft GPIO documentation, triggering GPIO\n> > +\t * interrupts marked as ActiveBoth during initialization is correct\n> > +\t * as long as the associated GPIO line is already \"asserted\"\n> > +\t * (logic level low). We should not trigger edge-based GPIO\n> > +\t * interrupts not marked as ActiveBoth.\n> > +\t *\n> > +\t * See: https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/general-purpose-i-o--gpio-\n> > +\t * Section: \"GPIO controllers and ActiveBoth interrupts\"\n> > +\t */\n> > \tif (acpi_gpio_need_run_edge_events_on_boot() &&\n> > -\t (event->irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING))) {\n> > +\t ((event->irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) ==\n> > +\t (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING))) {\n> > \t\tvalue = gpiod_get_raw_value_cansleep(event->desc);\n> > -\t\tif (((event->irqflags & IRQF_TRIGGER_RISING) && value == 1) ||\n> > -\t\t ((event->irqflags & IRQF_TRIGGER_FALLING) && value == 0))\n> > +\t\tif (value == 0)\n> > \t\t\tevent->handler(event->irq, event);\n> > \t}\n> > }\n> \n> One nitpick, which can be a follow-up patch since Andy has already picked this\n> one up.\n> \n> I think that now that the second if condition has been simplified to just\n> value == 0, it can be added to the first if as \" && value == 0\" dropping\n> the nested if.\n\nBut we need to get that value first (unconditionally!). I think it wouldn't\nbe desirable change.","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=fWkLSdF3;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35789-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=\"fWkLSdF3\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=198.175.65.21","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=linux.intel.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5D1n2d3gz1xqf\n\tfor ; Wed, 29 Apr 2026 20:24:29 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id 1CBD5301E228\n\tfor ; Wed, 29 Apr 2026 10:24:26 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 6DC563D1701;\n\tWed, 29 Apr 2026 10:24:25 +0000 (UTC)","from mgamail.intel.com (mgamail.intel.com [198.175.65.21])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id E4BB93191D6;\n\tWed, 29 Apr 2026 10:24:22 +0000 (UTC)","from fmviesa003.fm.intel.com ([10.60.135.143])\n by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 29 Apr 2026 03:24:23 -0700","from ettammin-mobl2.ger.corp.intel.com (HELO localhost)\n ([10.245.245.141])\n by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 29 Apr 2026 03:24:19 -0700"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777458265; cv=none;\n b=UHc8CK6IHIEEq76WufI8kFcpmv8K/JAOZbVDnwvswDOqsyqvaqeHM+Zp6We3Lhda2H4+hTwdJeGybEdAmW+8A9/QQqH0j8wEroGTiUWMPOPsRKZBXyLJG+EFgQ1vC8+P540Bu5QvK8TOxE28GfrE44EapUYRycEFzOmQlSCrwYU=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777458265; c=relaxed/simple;\n\tbh=GKz3n4s8VFuROmva3+L75e+p2YEJ1U526UcrD9zV3Zo=;\n\th=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version:\n\t Content-Type:Content-Disposition:In-Reply-To;\n b=DJpLVCC5Jg3kgSt8nuw6T/HpOkH/e9QPBVHD6fIsrzug4D3ogW4XzuJiD32B1CJZ5b6OWl5LzWmb67MlI2JLdhAUMJhZcbDkWYiQbZjJCoOownena9WeCbbIhWlNLWuKeLLPnjR5FTh7ZPUdFop4qy+CfyI2TBwF9kjvb27M/jc=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com;\n spf=pass smtp.mailfrom=linux.intel.com;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=fWkLSdF3; arc=none smtp.client-ip=198.175.65.21","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777458263; x=1808994263;\n h=date:from:to:cc:subject:message-id:references:\n mime-version:in-reply-to;\n bh=GKz3n4s8VFuROmva3+L75e+p2YEJ1U526UcrD9zV3Zo=;\n b=fWkLSdF3r80ZISSATou5dXHVphJ8cMaxIIRzya0q2pZn+KZShrKIgcXU\n 37hDRK62uzqIBSAj20oguy1fkS2eRnCo3cecbtKynaTGHIzhmuxpa/vM4\n yaKnFwsXrj0ZedbGnCGF6QHiE861gpWaWYNlv3Kdgq/uejCSdmOe2kn68\n ip3b5v+ON4rIJlhtfBV3mAAiqh6vaXcFsI8290Y9+n7ZD6Y6l8DpM8AWX\n sshRD5fnKsGvKuyKrh6h7MEu0GqZD9S6WlMmd5lIgz19E+Z/nV69b5g0Y\n O0Twn0yEulYvZ4rWp1TgqrCW257RgIar3qQJ0ZQa0FkIPiZcLJQrouTiN\n A==;","X-CSE-ConnectionGUID":["AKPMj5L2QwGpGpdHvXOQEw==","tDG63m3wTAKVLU3f0aKzHQ=="],"X-CSE-MsgGUID":["00KKREfJSIOOFtBnjElWCQ==","On1erOD2QoWLll+V0LQRWw=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11770\"; a=\"78277791\"","E=Sophos;i=\"6.23,205,1770624000\";\n d=\"scan'208\";a=\"78277791\""],"X-ExtLoop1":"1","Date":"Wed, 29 Apr 2026 13:24:17 +0300","From":"Andy Shevchenko ","To":"Hans de Goede ","Cc":"Mario Limonciello , westeri@kernel.org,\n\tlinusw@kernel.org, brgl@kernel.org, bentiss@kernel.org,\n\tFrancesco Lauritano ,\n\tMarco Scardovi , Armin Wolf ,\n\tmika.westerberg@linux.intel.com, linux-gpio@vger.kernel.org,\n\tlinux-acpi@vger.kernel.org","Subject":"Re: [PATCH] gpiolib: acpi: Only trigger ActiveBoth interrupts on boot","Message-ID":"","References":"<20260429025247.1372984-1-mario.limonciello@amd.com>\n <6f359bec-2525-40e9-9994-15b16fb82f12@kernel.org>","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<6f359bec-2525-40e9-9994-15b16fb82f12@kernel.org>","Organization":"Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6\n krs, Bertel Jungin Aukio 5, 02600 Espoo"}},{"id":3683992,"web_url":"http://patchwork.ozlabs.org/comment/3683992/","msgid":"","list_archive_url":null,"date":"2026-04-29T11:01:05","subject":"Re: [PATCH] gpiolib: acpi: Only trigger ActiveBoth interrupts on boot","submitter":{"id":91026,"url":"http://patchwork.ozlabs.org/api/people/91026/","name":"Hans de Goede","email":"hansg@kernel.org"},"content":"Hi,\n\nOn 29-Apr-26 12:24, Andy Shevchenko wrote:\n> On Wed, Apr 29, 2026 at 11:48:13AM +0200, Hans de Goede wrote:\n>> On 29-Apr-26 04:52, Mario Limonciello wrote:\n> \n> ...\n> \n>>> +\t/*\n>>> +\t * Make sure we trigger the initial state of ActiveBoth IRQs.\n>>> +\t *\n>>> +\t * According to the Microsoft GPIO documentation, triggering GPIO\n>>> +\t * interrupts marked as ActiveBoth during initialization is correct\n>>> +\t * as long as the associated GPIO line is already \"asserted\"\n>>> +\t * (logic level low). We should not trigger edge-based GPIO\n>>> +\t * interrupts not marked as ActiveBoth.\n>>> +\t *\n>>> +\t * See: https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/general-purpose-i-o--gpio-\n>>> +\t * Section: \"GPIO controllers and ActiveBoth interrupts\"\n>>> +\t */\n>>> \tif (acpi_gpio_need_run_edge_events_on_boot() &&\n>>> -\t (event->irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING))) {\n>>> +\t ((event->irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) ==\n>>> +\t (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING))) {\n>>> \t\tvalue = gpiod_get_raw_value_cansleep(event->desc);\n>>> -\t\tif (((event->irqflags & IRQF_TRIGGER_RISING) && value == 1) ||\n>>> -\t\t ((event->irqflags & IRQF_TRIGGER_FALLING) && value == 0))\n>>> +\t\tif (value == 0)\n>>> \t\t\tevent->handler(event->irq, event);\n>>> \t}\n>>> }\n>>\n>> One nitpick, which can be a follow-up patch since Andy has already picked this\n>> one up.\n>>\n>> I think that now that the second if condition has been simplified to just\n>> value == 0, it can be added to the first if as \" && value == 0\" dropping\n>> the nested if.\n> \n> But we need to get that value first (unconditionally!). I think it wouldn't\n> be desirable change.\n\nAh right, I read over the line getting the value I thought this was already\ndone, never mind:\n\nFWIW:\n\nReviewed-by: Hans de Goede \n\nRegards,\n\nHans","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=PR/Qh3xN;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35790-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"PR/Qh3xN\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5Dv13lYYz1yHZ\n\tfor ; Wed, 29 Apr 2026 21:03:41 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id 2DFAE3036775\n\tfor ; Wed, 29 Apr 2026 11:01:11 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 304903264DD;\n\tWed, 29 Apr 2026 11:01:10 +0000 (UTC)","from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id E7949169AD2;\n\tWed, 29 Apr 2026 11:01:09 +0000 (UTC)","by smtp.kernel.org (Postfix) with ESMTPSA id 58A75C2BCB3;\n\tWed, 29 Apr 2026 11:01:07 +0000 (UTC)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777460470; cv=none;\n b=PFZcVIf4bZg1BkEBzwec+cbuyCyqOFXGajOuwPcUSUHP3NUclHj+fVcpwvCS2tslTjpD9jRbFUiNKsGjAKgipT/dg3H1/25BriHPCyDUqF0MRU0dzj3l2oyCZ9IAN0r9CnyM+3eQu29LGIksALGiVlFniAeOUHTHzyiA+Dl/krU=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777460470; c=relaxed/simple;\n\tbh=sYigKbe3Uchrembf2DdmifESkPcthSKXKUcqY+xs+1s=;\n\th=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From:\n\t In-Reply-To:Content-Type;\n b=hCW1yuvhFMAIKavJKsqPPMqGn4vAWLq+ulQWP6p8BNISZXEeXfU++Tb5dderfeRZbVfOwPTR1j3GQ//3KVobuRfNmCM9pkF8IvW0rwUnxZUxVk5d+0QHqFinPO8gkoGU2M1HhQRIeX1XciTBY//Phuf/SyRWiQL97XjYkwlIyAY=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=PR/Qh3xN; arc=none smtp.client-ip=10.30.226.201","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1777460469;\n\tbh=sYigKbe3Uchrembf2DdmifESkPcthSKXKUcqY+xs+1s=;\n\th=Date:Subject:To:Cc:References:From:In-Reply-To:From;\n\tb=PR/Qh3xNrZFiItrbP5/odyeNmp0rBJidDSkpr3Y8TgoOrvOgN7IAfegqlSOkpy++/\n\t oh8v86jcrNO57XCujfvv3r26dk+Cqe4ly8y9O4UjAgemfCQOZ4NAcvK467RhsJRlQx\n\t R+/7hwh8O2vyZF/8zZU5ihD7rEFTZunno9UwkMYVYkM6kbhpHxF/Feof4eICokqD4N\n\t 4NAnhJcX8ZK8lqW3VFrrbD0Kc6ahyGGLGNztTbNDnWYqxKs5T1m8p1jSMWDrVcDxPw\n\t h5hzzAMfOgSOa3wVELAbFo7nsAnEudh66jHIPi7BEUApPzuL9Q7LzbyaMeCYbhsViE\n\t Wr9DH4o6mn6xA==","Message-ID":"","Date":"Wed, 29 Apr 2026 13:01:05 +0200","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","User-Agent":"Mozilla Thunderbird","Subject":"Re: [PATCH] gpiolib: acpi: Only trigger ActiveBoth interrupts on boot","To":"Andy Shevchenko ","Cc":"Mario Limonciello , westeri@kernel.org,\n linusw@kernel.org, brgl@kernel.org, bentiss@kernel.org,\n Francesco Lauritano ,\n Marco Scardovi , Armin Wolf ,\n mika.westerberg@linux.intel.com, linux-gpio@vger.kernel.org,\n linux-acpi@vger.kernel.org","References":"<20260429025247.1372984-1-mario.limonciello@amd.com>\n <6f359bec-2525-40e9-9994-15b16fb82f12@kernel.org>\n ","From":"Hans de Goede ","Content-Language":"en-US, nl","In-Reply-To":"","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"7bit"}}]