[{"id":3684053,"web_url":"http://patchwork.ozlabs.org/comment/3684053/","msgid":"<21ed8a45-f19f-4a14-9aed-dbe0f545ae27@amd.com>","list_archive_url":null,"date":"2026-04-29T13:25:37","subject":"Re: [PATCH v3] PCI: release empty sibling bridge windows during\n window resize","submitter":{"id":63999,"url":"http://patchwork.ozlabs.org/api/people/63999/","name":"Christian König","email":"christian.koenig@amd.com"},"content":"On 4/29/26 00:51, Geramy Loveless wrote:\n> pbus_reassign_bridge_resources() refuses to release bridge windows that\n> have child resources. On multi-port PCIe switches (e.g. Thunderbolt\n> docks), empty sibling downstream ports hold small reservations that\n> prevent the parent window from being freed and re-sized for rebar.\n> \n> Walk descendants of the target window depth-first, saving and freeing\n> each empty bridge window so the parent can then be released and grown.\n> \n> Without this change, attempts to grow a window deep below a switch\n> fabric leave nested empty windows pinning the ancestor:\n> \n> pcieport 0000:65:00.0: bridge window [mem 0x8880000000-0x98800fffff\n> 64bit pref]: not released, active children present\n> pcieport 0000:00:03.2: bridge window [mem 0x8880000000-0x98800fffff\n> 64bit pref]: not released, active children present\n> \n> With the bottom-up walk and upstream ancestry check, the chain unwinds\n> and the rebar succeeds:\n> \n> pcieport 0000:96:00.0: bridge window [...]: releasing\n> pcieport 0000:95:00.0: bridge window [...]: releasing\n> pcieport 0000:94:00.0: bridge window [...]: releasing\n> pcieport 0000:65:00.0: bridge window [...]: releasing\n> amdgpu 0000:97:00.0: BAR 0 [mem 0x9000000000-0x97ffffffff 64bit pref]:\n> assigned\n\nThat sounds reasonable and I can see the rollback store \n\nBut do we make sure that we can allocate all released child resources additional to the resized resource?\n\nE.g. in the above example how is the new size of the bridge window determined? Does it include the released child resources so that they can be eventually be re-allocated when drivers start needing them?\n\nRegards,\nChristian.\n\n> \n> Suggested-by: Ilpo Järvinen \n> Signed-off-by: Geramy Loveless \n> ---\n> v3:\n> - Restructure helper: outer loop only recurses; inner iterates bus\n> resources via pci_bus_for_each_resource(). The release path is now\n> unified, so the caller-side block in pbus_reassign_bridge_resources()\n> is gone.\n> - Walk the resource tree upstream when checking ancestry of @b_win,\n> so descendants in nested topologies are also released (Ilpo).\n> - Drop pci_resource_is_bridge_win() filter; bus resources are\n> inherently bridge windows.\n> - Rename pci_bus_release_empty_bridge_resources() to\n> pbus_release_empty_bridge_resources().\n> - Drop misleading \"Uses PCI bus/device iterators...\" paragraph from\n> commit message.\n> - Kerneldoc tweaks per Ilpo's review.\n> \n> v2:\n> - Use PCI bus/device iterators instead of walking raw resource tree.\n> - Save released resources to rollback list.\n> - Filter via pci_resource_is_bridge_win() (now removed in v3).\n> - Call release before the !res->child check.\n> - Check bridge->subordinate before recursion.\n> ---\n> drivers/pci/setup-bus.c | 63 +++++++++++++++++++++++++++++++++++++++--\n> 1 file changed, 61 insertions(+), 2 deletions(-)\n> \n> diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c\n> index 4cf120ebe5a..0c1fb654c9c 100644\n> --- a/drivers/pci/setup-bus.c\n> +++ b/drivers/pci/setup-bus.c\n> @@ -2292,6 +2292,60 @@ void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)\n> }\n> EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources);\n> \n> +/*\n> + * pci_bus_release_empty_bridge_resources - Bottom-up release of bridge\n> + * window resources in empty subtrees.\n> + * @bus: PCI bus whose child bridges to process\n> + * @b_win: Ancestor bridge window; only children of this resource are released\n> + * @saved: List to save released resources for rollback\n> + *\n> + * Recurses depth-first into subordinate buses, then releases bridge windows\n> + * on the way back up. Each resource is individually saved before release so\n> + * the entire operation can be rolled back.\n> + */\n> +static void pci_bus_release_empty_bridge_resources(struct pci_bus *bus,\n> +\t\t\t\t\t\t struct resource *b_win,\n> +\t\t\t\t\t\t struct list_head *saved)\n> +{\n> +\tstruct pci_dev *dev;\n> +\n> +\tlist_for_each_entry(dev, &bus->devices, bus_list) {\n> +\t\tstruct resource *r;\n> +\t\tunsigned int i;\n> +\n> +\t\tif (!dev->subordinate)\n> +\t\t\tcontinue;\n> +\n> +\t\t/* Recurse first — release deepest resources before parents */\n> +\t\tpci_bus_release_empty_bridge_resources(dev->subordinate,\n> +\t\t\t\t\t\t b_win, saved);\n> +\n> +\t\tpci_dev_for_each_resource(dev, r, i) {\n> +\t\t\tif (!pci_resource_is_bridge_win(i))\n> +\t\t\t\tcontinue;\n> +\n> +\t\t\tif (!resource_assigned(r))\n> +\t\t\t\tcontinue;\n> +\n> +\t\t\tif (r->parent != b_win)\n> +\t\t\t\tcontinue;\n> +\n> +\t\t\tif (r->child) {\n> +\t\t\t\tconst char *res_name = pci_resource_name(dev, i);\n> +\n> +\t\t\t\tpci_info(dev, \"%s %pR: not released, children still present\\n\",\n> +\t\t\t\t\t res_name, r);\n> +\t\t\t\tcontinue;\n> +\t\t\t}\n> +\n> +\t\t\tif (pci_dev_res_add_to_list(saved, dev, r, 0, 0))\n> +\t\t\t\tcontinue;\n> +\n> +\t\t\tpci_release_resource(dev, i);\n> +\t\t}\n> +\t}\n> +}\n> +\n> /*\n> * Walk to the root bus, find the bridge window relevant for @res and\n> * release it when possible. If the bridge window contains assigned\n> @@ -2316,7 +2370,12 @@ static int pbus_reassign_bridge_resources(struct pci_bus *bus, struct resource *\n> \n> \t\ti = pci_resource_num(bridge, res);\n> \n> -\t\t/* Ignore BARs which are still in use */\n> +\t\t/* Release empty sibling bridge windows bottom-up */\n> +\t\tif (bridge->subordinate)\n> +\t\t\tpci_bus_release_empty_bridge_resources(\n> +\t\t\t\tbridge->subordinate, res, saved);\n> +\n> +\t\t/* Ignore bridge windows which are still in use */\n> \t\tif (!res->child) {\n> \t\t\tret = pci_dev_res_add_to_list(saved, bridge, res, 0, 0);\n> \t\t\tif (ret)\n> @@ -2327,7 +2386,7 @@ static int pbus_reassign_bridge_resources(struct pci_bus *bus, struct resource *\n> \t\t\tconst char *res_name = pci_resource_name(bridge, i);\n> \n> \t\t\tpci_warn(bridge,\n> -\t\t\t\t \"%s %pR: was not released (still contains assigned resources)\\n\",\n> +\t\t\t\t \"%s %pR: not released, active children present\\n\",\n> \t\t\t\t res_name, res);\n> \t\t}\n>","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256\n header.s=selector1 header.b=QTWvboCK;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=104.64.211.4; helo=sin.lore.kernel.org;\n envelope-from=linux-pci+bounces-53397-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com\n header.b=\"QTWvboCK\"","smtp.subspace.kernel.org;\n arc=fail smtp.client-ip=52.101.85.9","smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=amd.com","smtp.subspace.kernel.org;\n spf=fail smtp.mailfrom=amd.com","dkim=none (message not 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Geramy Loveless wrote:\n> > pbus_reassign_bridge_resources() refuses to release bridge windows that\n> > have child resources. On multi-port PCIe switches (e.g. Thunderbolt\n> > docks), empty sibling downstream ports hold small reservations that\n> > prevent the parent window from being freed and re-sized for rebar.\n> >\n> > Walk descendants of the target window depth-first, saving and freeing\n> > each empty bridge window so the parent can then be released and grown.\n> >\n> > Without this change, attempts to grow a window deep below a switch\n> > fabric leave nested empty windows pinning the ancestor:\n> >\n> > pcieport 0000:65:00.0: bridge window [mem 0x8880000000-0x98800fffff\n> > 64bit pref]: not released, active children present\n> > pcieport 0000:00:03.2: bridge window [mem 0x8880000000-0x98800fffff\n> > 64bit pref]: not released, active children present\n> >\n> > With the bottom-up walk and upstream ancestry check, the chain unwinds\n> > and the rebar succeeds:\n> >\n> > pcieport 0000:96:00.0: bridge window [...]: releasing\n> > pcieport 0000:95:00.0: bridge window [...]: releasing\n> > pcieport 0000:94:00.0: bridge window [...]: releasing\n> > pcieport 0000:65:00.0: bridge window [...]: releasing\n> > amdgpu 0000:97:00.0: BAR 0 [mem 0x9000000000-0x97ffffffff 64bit pref]:\n> > assigned\n>\n> That sounds reasonable and I can see the rollback store\n>\n> But do we make sure that we can allocate all released child resources additional to the resized resource?\nI am not sure I will need to investigate to see if the other code in\nthe kernel follows this path correctly, I would assume it does since\nthe parent is being released by this code if there was no children, we\nare just releasing the children too if applicable essentially.\nThats my thoughts they could be inaccurate though since i'm not\nextremely involved in linux kernel code until recently.\n\n>\n> E.g. in the above example how is the new size of the bridge window determined? Does it include the released child resources so that they can be eventually be re-allocated when drivers start needing them?\n\nThis patch basically releases the children so the system that deals\nwith allocating and changing window size can actually change it.\nSo basically the only blocker to window resizing was this patch,\nwhatever pcie already does in linux basically now can happen with the\nchildren released without further changes.\nDoes that make sense?\n\nBasically our only job is to make sure to release the children and the\nrest of the linux kernel can continue forward and resize the window,\nthe stopper was the children not getting released essentially.\n\n>\n> Regards,\n> Christian.\n>\n> >\n> > Suggested-by: Ilpo Järvinen \n> > Signed-off-by: Geramy Loveless \n> > ---\n> > v3:\n> > - Restructure helper: outer loop only recurses; inner iterates bus\n> > resources via pci_bus_for_each_resource(). The release path is now\n> > unified, so the caller-side block in pbus_reassign_bridge_resources()\n> > is gone.\n> > - Walk the resource tree upstream when checking ancestry of @b_win,\n> > so descendants in nested topologies are also released (Ilpo).\n> > - Drop pci_resource_is_bridge_win() filter; bus resources are\n> > inherently bridge windows.\n> > - Rename pci_bus_release_empty_bridge_resources() to\n> > pbus_release_empty_bridge_resources().\n> > - Drop misleading \"Uses PCI bus/device iterators...\" paragraph from\n> > commit message.\n> > - Kerneldoc tweaks per Ilpo's review.\n> >\n> > v2:\n> > - Use PCI bus/device iterators instead of walking raw resource tree.\n> > - Save released resources to rollback list.\n> > - Filter via pci_resource_is_bridge_win() (now removed in v3).\n> > - Call release before the !res->child check.\n> > - Check bridge->subordinate before recursion.\n> > ---\n> > drivers/pci/setup-bus.c | 63 +++++++++++++++++++++++++++++++++++++++--\n> > 1 file changed, 61 insertions(+), 2 deletions(-)\n> >\n> > diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c\n> > index 4cf120ebe5a..0c1fb654c9c 100644\n> > --- a/drivers/pci/setup-bus.c\n> > +++ b/drivers/pci/setup-bus.c\n> > @@ -2292,6 +2292,60 @@ void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)\n> > }\n> > EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources);\n> >\n> > +/*\n> > + * pci_bus_release_empty_bridge_resources - Bottom-up release of bridge\n> > + * window resources in empty subtrees.\n> > + * @bus: PCI bus whose child bridges to process\n> > + * @b_win: Ancestor bridge window; only children of this resource are released\n> > + * @saved: List to save released resources for rollback\n> > + *\n> > + * Recurses depth-first into subordinate buses, then releases bridge windows\n> > + * on the way back up. Each resource is individually saved before release so\n> > + * the entire operation can be rolled back.\n> > + */\n> > +static void pci_bus_release_empty_bridge_resources(struct pci_bus *bus,\n> > + struct resource *b_win,\n> > + struct list_head *saved)\n> > +{\n> > + struct pci_dev *dev;\n> > +\n> > + list_for_each_entry(dev, &bus->devices, bus_list) {\n> > + struct resource *r;\n> > + unsigned int i;\n> > +\n> > + if (!dev->subordinate)\n> > + continue;\n> > +\n> > + /* Recurse first — release deepest resources before parents */\n> > + pci_bus_release_empty_bridge_resources(dev->subordinate,\n> > + b_win, saved);\n> > +\n> > + pci_dev_for_each_resource(dev, r, i) {\n> > + if (!pci_resource_is_bridge_win(i))\n> > + continue;\n> > +\n> > + if (!resource_assigned(r))\n> > + continue;\n> > +\n> > + if (r->parent != b_win)\n> > + continue;\n> > +\n> > + if (r->child) {\n> > + const char *res_name = pci_resource_name(dev, i);\n> > +\n> > + pci_info(dev, \"%s %pR: not released, children still present\\n\",\n> > + res_name, r);\n> > + continue;\n> > + }\n> > +\n> > + if (pci_dev_res_add_to_list(saved, dev, r, 0, 0))\n> > + continue;\n> > +\n> > + pci_release_resource(dev, i);\n> > + }\n> > + }\n> > +}\n> > +\n> > /*\n> > * Walk to the root bus, find the bridge window relevant for @res and\n> > * release it when possible. If the bridge window contains assigned\n> > @@ -2316,7 +2370,12 @@ static int pbus_reassign_bridge_resources(struct pci_bus *bus, struct resource *\n> >\n> > i = pci_resource_num(bridge, res);\n> >\n> > - /* Ignore BARs which are still in use */\n> > + /* Release empty sibling bridge windows bottom-up */\n> > + if (bridge->subordinate)\n> > + pci_bus_release_empty_bridge_resources(\n> > + bridge->subordinate, res, saved);\n> > +\n> > + /* Ignore bridge windows which are still in use */\n> > if (!res->child) {\n> > ret = pci_dev_res_add_to_list(saved, bridge, res, 0, 0);\n> > if (ret)\n> > @@ -2327,7 +2386,7 @@ static int pbus_reassign_bridge_resources(struct pci_bus *bus, struct resource *\n> > const char *res_name = pci_resource_name(bridge, i);\n> >\n> > pci_warn(bridge,\n> > - \"%s %pR: was not released (still contains assigned resources)\\n\",\n> > + \"%s %pR: not released, active children present\\n\",\n> > res_name, res);\n> > }\n> >\n>","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=jqluv-com.20251104.gappssmtp.com\n header.i=@jqluv-com.20251104.gappssmtp.com header.a=rsa-sha256\n header.s=20251104 header.b=hLMlD/vp;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; 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Wed, 29 Apr 2026\n 09:21:17 -0700 (PDT)","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","References":"<20260428225146.3104063-1-gloveless@jqluv.com>\n <21ed8a45-f19f-4a14-9aed-dbe0f545ae27@amd.com>","In-Reply-To":"<21ed8a45-f19f-4a14-9aed-dbe0f545ae27@amd.com>","From":"Geramy Loveless ","Date":"Wed, 29 Apr 2026 09:21:07 -0700","X-Gm-Features":"AVHnY4L1rBkzBiYrQqjJpKoZhi9xkiCMvP-Rzsag5p0cpIY7J4jtOWb7m6L_ECc","Message-ID":"\n ","Subject":"Re: [PATCH v3] PCI: release empty sibling bridge windows during\n window resize","To":"=?utf-8?q?Christian_K=C3=B6nig?= ","Cc":"=?utf-8?q?Ilpo_J=C3=A4rvinen?= ,\n Cristian Cocos , linux-pci@vger.kernel.org,\n Mario Limonciello ","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable"}}]