[{"id":3683719,"web_url":"http://patchwork.ozlabs.org/comment/3683719/","msgid":"","list_archive_url":null,"date":"2026-04-28T21:13:46","subject":"Re: [PATCH v2] pinctrl: qcom: Make important drivers default","submitter":{"id":90483,"url":"http://patchwork.ozlabs.org/api/people/90483/","name":"Dmitry Baryshkov","email":"dmitry.baryshkov@oss.qualcomm.com"},"content":"On Tue, Apr 28, 2026 at 06:35:49PM +0200, Krzysztof Kozlowski wrote:\n> The main SoC TLMM (Top-Level Multiplexer) pin controller drivers are\n> essential for booting up SoCs and are not really optional for a given\n> platform. Kernel should not ask users choice of drivers when that\n> choice is obvious and known to the developers that answer should be\n> 'yes' or 'module'.\n> \n> Switch all Qualcomm TLMM pin controller drivers to a default 'yes' for\n> ARCH_QCOM. This has impact:\n> \n> 1. arm64 defconfig: enable PINCTRL_SM7150, PINCTRL_IPQ9650 and\n> PINCTRL_HAWI, which were not selected before but should be, because\n> these platforms need them for proper boot.\n> \n> 2. arm qcom_defconfig: no changes.\n> \n> 3. arm multi_v7 defconfig: enable drivers necessary to boot ARM 32-bit\n> platforms, which are already enabled on qcom_defconfig.\n> \n> 4. COMPILE_TEST builds: enable by default all drivers for arm or arm64\n> builds, whenever ARCH_QCOM is selected. This has impact on build\n> time and feels logical, because if one selects ARCH_QCOM then\n> probably by default wants to build test it entirely. Kernels with\n> COMPILE_TEST are not supposed to be used for booting.\n> \n> Reviewed-by: Konrad Dybcio \n> Reviewed-by: Linus Walleij \n> Signed-off-by: Krzysztof Kozlowski \n> \n> ---\n> \n> I did similar change for clocks and I will be continuing with\n> interconnect and other missing pieces.\n> \n> Changes in v2:\n> 1. Rebase on Linus W. devel branch. This should go with pinctrl, I\n> think.\n> 2. Add tags.\n> 3. Update also PINCTRL_IPQ9650.\n> ---\n> arch/arm/configs/multi_v7_defconfig | 8 ----\n> arch/arm/configs/qcom_defconfig | 15 -------\n> arch/arm64/configs/defconfig | 46 ----------------------\n> drivers/pinctrl/qcom/Kconfig | 1 +\n> drivers/pinctrl/qcom/Kconfig.msm | 61 +++++++++++++++++++++++++++++\n\nI think it would have been better split into 3 patches, but this way is\nalso fine.\n\nReviewed-by: Dmitry Baryshkov \n\n> 5 files changed, 62 insertions(+), 69 deletions(-)","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=WAjSRAHU;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=VfnY2f8J;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; 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Kernel should not ask users choice of drivers when that\n>> choice is obvious and known to the developers that answer should be\n>> 'yes' or 'module'.\n>>\n>> Switch all Qualcomm TLMM pin controller drivers to a default 'yes' for\n>> ARCH_QCOM. This has impact:\n>>\n>> 1. arm64 defconfig: enable PINCTRL_SM7150, PINCTRL_IPQ9650 and\n>> PINCTRL_HAWI, which were not selected before but should be, because\n>> these platforms need them for proper boot.\n>>\n>> 2. arm qcom_defconfig: no changes.\n>>\n>> 3. arm multi_v7 defconfig: enable drivers necessary to boot ARM 32-bit\n>> platforms, which are already enabled on qcom_defconfig.\n>>\n>> 4. COMPILE_TEST builds: enable by default all drivers for arm or arm64\n>> builds, whenever ARCH_QCOM is selected. This has impact on build\n>> time and feels logical, because if one selects ARCH_QCOM then\n>> probably by default wants to build test it entirely. Kernels with\n>> COMPILE_TEST are not supposed to be used for booting.\n>>\n>> Reviewed-by: Konrad Dybcio \n>> Reviewed-by: Linus Walleij \n>> Signed-off-by: Krzysztof Kozlowski \n>>\n>> ---\n>>\n>> I did similar change for clocks and I will be continuing with\n>> interconnect and other missing pieces.\n>>\n>> Changes in v2:\n>> 1. Rebase on Linus W. devel branch. This should go with pinctrl, I\n>> think.\n>> 2. Add tags.\n>> 3. Update also PINCTRL_IPQ9650.\n>> ---\n>> arch/arm/configs/multi_v7_defconfig | 8 ----\n>> arch/arm/configs/qcom_defconfig | 15 -------\n>> arch/arm64/configs/defconfig | 46 ----------------------\n>> drivers/pinctrl/qcom/Kconfig | 1 +\n>> drivers/pinctrl/qcom/Kconfig.msm | 61 +++++++++++++++++++++++++++++\n> \n> I think it would have been better split into 3 patches, but this way is\n> also fine.\n\nYou mean defconfigs as separate patches? I could do that and I was\nthinking about it, but many people do testing with defconfig and such\ndefconfig would be nonbisectable here.\n\nBest regards,\nKrzysztof","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=CNrT2uc7;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=bPtZpldg;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35749-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"CNrT2uc7\";\n\tdkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"bPtZpldg\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=205.220.180.131","smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=oss.qualcomm.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g56Wk35Lbz1yHv\n\tfor ; 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