[{"id":3683989,"web_url":"http://patchwork.ozlabs.org/comment/3683989/","msgid":"<DI5KWT8REASP.1XFX10F0TLQGP@bootlin.com>","list_archive_url":null,"date":"2026-04-29T10:49:55","subject":"Re: [PATCH] staging: tegra-video: replace bit shifts with BIT()\n macro","submitter":{"id":83908,"url":"http://patchwork.ozlabs.org/api/people/83908/","name":"Luca Ceresoli","email":"luca.ceresoli@bootlin.com"},"content":"On Tue Apr 28, 2026 at 6:33 PM CEST, Mhanna112-code wrote:\n> Replace manual bit shifts with the BIT() macro to follow kernel\n> coding style and improve readability.\n>\n> Fixes the following checkpatch warning:\n>\n> CHECK: Prefer using the BIT macro\n>\n> Signed-off-by: Marc Hanna <marchanna111@gmail.com>\n> ---\n>  drivers/staging/media/tegra-video/tegra20.c | 6 +++---\n>  1 file changed, 3 insertions(+), 3 deletions(-)\n>\n> diff --git a/drivers/staging/media/tegra-video/tegra20.c b/drivers/staging/media/tegra-video/tegra20.c\n> index eb1fc5b7e2cd..f3edca909684 100644\n> --- a/drivers/staging/media/tegra-video/tegra20.c\n> +++ b/drivers/staging/media/tegra-video/tegra20.c\n> @@ -177,15 +177,15 @@ enum tegra_vi_out {\n>  #define       CSI_SKIP_PACKET_THRESHOLD(n)\t\t(((n) & 0xff) << 16)\n>  #define TEGRA_CSI_PIXEL_STREAM_CONTROL0(n)\t\t(0x0018 + (n) * 0x2c)\n>  #define       CSI_PP_PAD_FRAME_PAD0S\t\t\t(0 << 28)\n> -#define       CSI_PP_PAD_FRAME_PAD1S\t\t\t(1 << 28)\n> +#define       CSI_PP_PAD_FRAME_PAD1S\t\t\tBIT(28)\n>  #define       CSI_PP_PAD_FRAME_NOPAD\t\t\t(2 << 28)\n>  #define       CSI_PP_HEADER_EC_ENABLE\t\t\tBIT(27)\n>  #define       CSI_PP_PAD_SHORT_LINE_PAD0S\t\t(0 << 24)\n> -#define       CSI_PP_PAD_SHORT_LINE_PAD1S\t\t(1 << 24)\n> +#define       CSI_PP_PAD_SHORT_LINE_PAD1S\t\tBIT(24)\n>  #define       CSI_PP_PAD_SHORT_LINE_NOPAD\t\t(2 << 24)\n>  #define       CSI_PP_EMBEDDED_DATA_EMBEDDED\t\tBIT(20)\n>  #define       CSI_PP_OUTPUT_FORMAT_ARBITRARY\t\t(0 << 16)\n> -#define       CSI_PP_OUTPUT_FORMAT_PIXEL\t\t(1 << 16)\n> +#define       CSI_PP_OUTPUT_FORMAT_PIXEL\t\tBIT(16)\n>  #define       CSI_PP_OUTPUT_FORMAT_PIXEL_REP\t\t(2 << 16)\n>  #define       CSI_PP_OUTPUT_FORMAT_STORE\t\t(3 << 16)\n>  #define       CSI_PP_VIRTUAL_CHANNEL_ID(n)\t\t(((n) - 1) << 14)\n\nI think this change would make code worse, not better. These look like\nenum-like values for 2-bit register fields, and as such should be described\nthe same way for readability.\n\nIf we want to change them they should perhaps use a GENMASK or similar, but\nit probably makes sense to just leave them as is. They are mostly unused\nanyway.\n\nLuca\n\n--\nLuca Ceresoli, Bootlin\nEmbedded Linux and Kernel engineering\nhttps://bootlin.com","headers":{"Return-Path":"\n <linux-tegra+bounces-14058-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256\n header.s=dkim header.b=bqtEgdOR;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; helo=sto.lore.kernel.org;\n envelope-from=linux-tegra+bounces-14058-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com\n header.b=\"bqtEgdOR\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=185.246.85.4","smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=bootlin.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=bootlin.com"],"Received":["from sto.lore.kernel.org (sto.lore.kernel.org\n [IPv6:2600:3c09:e001:a7::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5DbL4Wg9z1yHX\n\tfor <incoming@patchwork.ozlabs.org>; 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