[{"id":3683740,"web_url":"http://patchwork.ozlabs.org/comment/3683740/","msgid":"<38365eb6-00e3-4cfd-88f3-edb4f36fc420@baylibre.com>","list_archive_url":null,"date":"2026-04-28T19:30:19","subject":"Re: [PATCH v2 6/9] net: phy: Add airoha AN8801 ethernet phy driver","submitter":{"id":87228,"url":"http://patchwork.ozlabs.org/api/people/87228/","name":"David Lechner","email":"dlechner@baylibre.com"},"content":"On 4/28/26 8:17 AM, Julien Stephan wrote:\n> Add Airoha AN8801 Ethernet PHY driver (air_an8801.c).\n> Implement CL22/CL45 MDIO access, LED control, and RGMII delay\n> configuration. Provide probe, initialization, LED setup, and status\n> handling. Expose DTS properties for clock delays. Register driver with\n> PHY framework and trigger on startup.\n> \n\n...\n\n> +struct air_led_cfg {\n> +\tu16 en;\t\t/* LED Enable */\n> +\tu16 gpio;\t/* GPIO */\n> +\tu16 pol;\t/* LED Polarity */\n> +\tu16 on_cfg;\t/* LED On */\n> +\tu16 blk_cfg;\t/* LED Blink */\n> +};\n> +\n\nnit: make the variable names longer so that we don't need\ncomments to explain them\n\n> +static int an8801r_rgmii_delay_config(struct phy_device *phydev)\n> +{\n> +\tstruct an8801r_priv *priv = phydev_cfg(phydev);\n> +\tint ret;\n> +\n> +\tswitch (phydev->interface) {\n> +\tcase PHY_INTERFACE_MODE_RGMII_TXID:\n> +\t\treturn an8801r_rgmii_txdelay(phydev, AIR_RGMII_DELAY_STEP_4);\n> +\tcase PHY_INTERFACE_MODE_RGMII_RXID:\n> +\t\treturn an8801r_rgmii_rxdelay(phydev, AIR_RGMII_DELAY_NOSTEP, true);\n> +\tcase PHY_INTERFACE_MODE_RGMII_ID:\n> +\t\tret = an8801r_rgmii_txdelay(phydev, AIR_RGMII_DELAY_STEP_4);\n> +\t\tif (ret)\n> +\t\t\treturn ret;\n> +\t\treturn an8801r_rgmii_rxdelay(phydev, AIR_RGMII_DELAY_NOSTEP, true);\n> +\tcase PHY_INTERFACE_MODE_RGMII:\n> +\tdefault:\n> +\t\tif (priv->rxdelay_force) {\n> +\t\t\tret = an8801r_rgmii_rxdelay(phydev, priv->rxdelay_step,\n> +\t\t\t\t\t\t priv->rxdelay_align);\n> +\t\t\tif (ret)\n> +\t\t\t\treturn ret;\n> +\t\t}\n> +\t\tif (priv->txdelay_force)\n> +\t\t\treturn an8801r_rgmii_txdelay(phydev, priv->txdelay_step);\n> +\t\tbreak;\n\nnit: Could just return 0; here.\n\n> +\t}\n> +\treturn 0;\n> +}\n> +\n\n...\n\n> +static int an8801r_phy_probe(struct phy_device *phydev)\n> +{\n> +\tstruct an8801r_priv *priv;\n> +\tu32 phy_id;\n> +\tint ret;\n> +\n> +\tret = get_phy_id(phydev->bus, phydev->addr, MDIO_DEVAD_NONE, &phy_id);\n> +\tif (ret)\n> +\t\treturn ret;\n> +\n> +\tif (phy_id != AN8801R_PHY_ID) {\n> +\t\tdev_err(phydev->dev,\n> +\t\t\t\"AN8801R can't be detected (id=0x%08x).\\n\", phy_id);\n> +\t\treturn -ENODEV;\n> +\t}\n> +\n> +\tpriv = calloc(1, sizeof(struct an8801r_priv));\n\nWhy calloc() for 1 item?\n\nI think usual would be:\n\n\tpriv = malloc(sizeof(*priv));\n\n> +\tif (!priv)\n> +\t\treturn -ENOMEM;\n> +\n> +\t*priv = an8801r_priv_defaults;\n> +\n> +\tphydev->priv = priv;\n> +\n> +\treturn 0;\n> +}\n> +","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=baylibre-com.20251104.gappssmtp.com\n header.i=@baylibre-com.20251104.gappssmtp.com header.a=rsa-sha256\n header.s=20251104 header.b=KcIsjDWO;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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