[{"id":3683466,"web_url":"http://patchwork.ozlabs.org/comment/3683466/","msgid":"<20260428133800.GG849557@ziepe.ca>","list_archive_url":null,"date":"2026-04-28T13:38:00","subject":"Re: [RFC PATCH 08/11] iommu/riscv: Add dirty tracking support for\n second-stage domains","submitter":{"id":73018,"url":"http://patchwork.ozlabs.org/api/people/73018/","name":"Jason Gunthorpe","email":"jgg@ziepe.ca"},"content":"On Tue, Apr 28, 2026 at 09:13:56PM +0800, fangyu.yu@linux.alibaba.com wrote:\n\n> @@ -1247,6 +1247,84 @@ static int riscv_iommu_attach_paging_domain(struct iommu_domain *iommu_domain,\n> \treturn 0;\n> }\n> \n> +/*\n> + * Enable or disable hardware A/D bit updates (GADE) in the device context for\n> + * all devices attached to a second-stage domain. When dirty tracking is\n> + * enabled the IOMMU hardware will set the dirty bit in PTEs on write access,\n> + * making them visible to read_and_clear_dirty().\n> + */\n> +static int riscv_iommu_set_dirty_tracking(struct iommu_domain *iommu_domain,\n> +\t\t\t\t\t bool enable)\n> +{\n> +\tstruct riscv_iommu_domain *domain = iommu_domain_to_riscv(iommu_domain);\n> +\tstruct riscv_iommu_bond *bond;\n> +\tstruct riscv_iommu_device *iommu, *prev;\n> +\tstruct riscv_iommu_dc *dc;\n> +\tstruct iommu_fwspec *fwspec;\n> +\tstruct riscv_iommu_command cmd;\n> +\tu64 tc;\n> +\tint i;\n> +\n> +\trcu_read_lock();\n> +\n> +\tlist_for_each_entry_rcu(bond, &domain->bonds, list) {\n> +\t\tiommu = dev_to_iommu(bond->dev);\n> +\t\tfwspec = dev_iommu_fwspec_get(bond->dev);\n> +\n> +\t\tfor (i = 0; i < fwspec->num_ids; i++) {\n> +\t\t\tdc = riscv_iommu_get_dc(iommu, fwspec->ids[i]);\n> +\t\t\ttc = READ_ONCE(dc->tc);\n> +\t\t\tif (!(tc & RISCV_IOMMU_DC_TC_V))\n> +\t\t\t\tcontinue;\n> +\n> +\t\t\tif (enable)\n> +\t\t\t\ttc |= RISCV_IOMMU_DC_TC_GADE;\n> +\t\t\telse\n> +\t\t\t\ttc &= ~RISCV_IOMMU_DC_TC_GADE;\n> +\t\t\tWRITE_ONCE(dc->tc, tc);\n\nI'm pretty sure you don't need to do this. Just preset GADE when ever\na S2 domain is attached, rely on the pre-set D to avoid any HW cost\nand you are fine. No need to change it dynamically unless something is\nreall weird about riscv.\n\nJason","headers":{"Return-Path":"\n ","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=JjGs5O3Z;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n secure) header.d=ziepe.ca header.i=@ziepe.ca header.a=rsa-sha256\n header.s=google header.b=c67/nAhJ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org;\n envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n [IPv6:2607:7c80:54:3::133])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g4hMg5vc2z1xrS\n\tfor ; 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The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: On Tue, Apr 28, 2026 at 09:13:56PM +0800,\n fangyu.yu@linux.alibaba.com\n wrote: > @@ -1247,6 +1247,84 @@ static int\n riscv_iommu_attach_paging_domain(struct\n iommu_domain *iommu_domain, > return 0;\n > } > > +/* > + * Enable or disable\n hardware A/D bit updates (GADE) in the device co [...]\n Content analysis details: (-2.1 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no\n trust\n [2607:f8b0:4864:20:0:0:0:733 listed in]\n [list.dnswl.org]\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n -0.0 SPF_PASS SPF: sender matches SPF record\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n author's\n domain\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]","X-BeenThere":"kvm-riscv@lists.infradead.org","X-Mailman-Version":"2.1.34","Precedence":"list","List-Id":"","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"kvm-riscv\" ","Errors-To":"kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"}},{"id":3683770,"web_url":"http://patchwork.ozlabs.org/comment/3683770/","msgid":"<20260429014600.67055-1-fangyu.yu@linux.alibaba.com>","list_archive_url":null,"date":"2026-04-29T01:46:00","subject":"Re: Re: [RFC PATCH 08/11] iommu/riscv: Add dirty tracking support for\n second-stage domains ","submitter":{"id":91416,"url":"http://patchwork.ozlabs.org/api/people/91416/","name":null,"email":"fangyu.yu@linux.alibaba.com"},"content":">> @@ -1247,6 +1247,84 @@ static int riscv_iommu_attach_paging_domain(struct iommu_domain *iommu_domain,\n>> \treturn 0;\n>> }\n>> \n>> +/*\n>> + * Enable or disable hardware A/D bit updates (GADE) in the device context for\n>> + * all devices attached to a second-stage domain. When dirty tracking is\n>> + * enabled the IOMMU hardware will set the dirty bit in PTEs on write access,\n>> + * making them visible to read_and_clear_dirty().\n>> + */\n>> +static int riscv_iommu_set_dirty_tracking(struct iommu_domain *iommu_domain,\n>> +\t\t\t\t\t bool enable)\n>> +{\n>> +\tstruct riscv_iommu_domain *domain = iommu_domain_to_riscv(iommu_domain);\n>> +\tstruct riscv_iommu_bond *bond;\n>> +\tstruct riscv_iommu_device *iommu, *prev;\n>> +\tstruct riscv_iommu_dc *dc;\n>> +\tstruct iommu_fwspec *fwspec;\n>> +\tstruct riscv_iommu_command cmd;\n>> +\tu64 tc;\n>> +\tint i;\n>> +\n>> +\trcu_read_lock();\n>> +\n>> +\tlist_for_each_entry_rcu(bond, &domain->bonds, list) {\n>> +\t\tiommu = dev_to_iommu(bond->dev);\n>> +\t\tfwspec = dev_iommu_fwspec_get(bond->dev);\n>> +\n>> +\t\tfor (i = 0; i < fwspec->num_ids; i++) {\n>> +\t\t\tdc = riscv_iommu_get_dc(iommu, fwspec->ids[i]);\n>> +\t\t\ttc = READ_ONCE(dc->tc);\n>> +\t\t\tif (!(tc & RISCV_IOMMU_DC_TC_V))\n>> +\t\t\t\tcontinue;\n>> +\n>> +\t\t\tif (enable)\n>> +\t\t\t\ttc |= RISCV_IOMMU_DC_TC_GADE;\n>> +\t\t\telse\n>> +\t\t\t\ttc &= ~RISCV_IOMMU_DC_TC_GADE;\n>> +\t\t\tWRITE_ONCE(dc->tc, tc);\n>\n>I'm pretty sure you don't need to do this. Just preset GADE when ever\n>a S2 domain is attached, rely on the pre-set D to avoid any HW cost\n>and you are fine. No need to change it dynamically unless something is\n>reall weird about riscv.\n>\n\nThanks, that’s a good suggestion. I will follow that approach: preset GADE\non second-stage domain attach and rely on the core-managed D-bit behavior.\n\nFangyu\n\n>Jason","headers":{"Return-Path":"\n ","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=AtyZdApY;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n unprotected) header.d=linux.alibaba.com header.i=@linux.alibaba.com\n header.a=rsa-sha256 header.s=default header.b=O5i8o42+;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org;\n envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n [IPv6:2607:7c80:54:3::133])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g50Wp2mp4z1yHX\n\tfor ; Wed, 29 Apr 2026 11:46:14 +1000 (AEST)","from localhost ([::1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux))\n\tid 1wHu0C-00000002kDc-3ET1;\n\tWed, 29 Apr 2026 01:46:12 +0000","from out30-119.freemail.mail.aliyun.com ([115.124.30.119])\n\tby bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux))\n\tid 1wHu09-00000002kD8-3F2J;\n\tWed, 29 Apr 2026 01:46:11 +0000","from localhost.localdomain(mailfrom:fangyu.yu@linux.alibaba.com\n fp:SMTPD_---0X1vuOY6_1777427161 cluster:ay36)\n by smtp.aliyun-inc.com;\n Wed, 29 Apr 2026 09:46:02 +0800"],"DKIM-Signature":["v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20210309; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=WDyJoUgsxhhDPUWzNsvxIA+U5jbm4zkaDGTfyrsdY8I=; b=AtyZdApYDQyJw2\n\thhvUcKymJGY5Zii2K7V7w7P9YJSNInRrf6ul6EeuWvYOlxSXNYBdq10DOLw26pdG2gl3J1yXSWzLB\n\tmfG2WZDpHSWlfXw4ggjXKk9nzhRvJp1UWtFG40mp3Q9mzC1MniYtf9f7HaTJjbfeDL6eMbb2AM1RT\n\tBEx3ZPppj8iEt8t5Z2W/Lk0EPSOS1NUb45xo2CTNFxsVfraiTPKV2nkMu/JX23XHF0zcTDq5YVNZT\n\tZH7ALT+K9dRZd3RHO54TPdYd0rICzH+3zsyjda/e0yuixMdr43XnxnCrf8ZT96YqwAB+6yr70F9Sl\n\tcB4043OpLl+ipuxE3I+g==;","v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=linux.alibaba.com; s=default;\n\tt=1777427166; h=From:To:Subject:Date:Message-Id:MIME-Version:Content-Type;\n\tbh=0ABfuJZF6yh/Y+/JJ98VtxHR90cMCDZPqGB01IOmkmo=;\n\tb=O5i8o42+diFzGhMvpB64PKujCuoXOEaVYENPLKmW3H+VKdJ3FJbV2U1TuinbdhM/YzJWtNQwTCo5yrWm5XvUA7k+3fC+JTYmL8+Z6DD8fRY/1NFXoT44BI6tMBau2bTwRUi1R2sRu2OXHPqoHp/7gg4GO0/AY5RRoD1y8y/N2kk="],"X-Alimail-AntiSpam":"\n AC=PASS;BC=-1|-1;BR=01201311R481e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=maildocker-contentspam033037026112;MF=fangyu.yu@linux.alibaba.com;NM=1;PH=DS;RN=22;SR=0;TI=SMTPD_---0X1vuOY6_1777427161;","From":"fangyu.yu@linux.alibaba.com","To":"jgg@ziepe.ca","Cc":"alex@ghiti.fr,\n\tanup@brainfault.org,\n\taou@eecs.berkeley.edu,\n\tatish.patra@linux.dev,\n\tbaolu.lu@linux.intel.com,\n\tfangyu.yu@linux.alibaba.com,\n\tguoren@kernel.org,\n\tiommu@lists.linux.dev,\n\tjoro@8bytes.org,\n\tkevin.tian@intel.com,\n\tkvm-riscv@lists.infradead.org,\n\tkvm@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tlinux-riscv@lists.infradead.org,\n\tpalmer@dabbelt.com,\n\tpjw@kernel.org,\n\trobin.murphy@arm.com,\n\tskhawaja@google.com,\n\ttjeznach@rivosinc.com,\n\tvasant.hegde@amd.com,\n\twill@kernel.org","Subject":"Re: Re: [RFC PATCH 08/11] iommu/riscv: Add dirty tracking support for\n second-stage domains ","Date":"Wed, 29 Apr 2026 09:46:00 +0800","Message-Id":"<20260429014600.67055-1-fangyu.yu@linux.alibaba.com>","X-Mailer":"git-send-email 2.39.3 (Apple Git-146)","In-Reply-To":"<20260428133800.GG849557@ziepe.ca>","References":"<20260428133800.GG849557@ziepe.ca>","MIME-Version":"1.0","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20260428_184610_010366_B2ED4A14 ","X-CRM114-Status":"GOOD ( 11.58 )","X-Spam-Score":"-17.6 (-----------------)","X-Spam-Report":"Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam. The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: >> @@ -1247,6 +1247,84 @@ static int\n riscv_iommu_attach_paging_domain(struct\n iommu_domain *iommu_domain, >> return 0; >> } >> >> +/* >> + * Enable or\n disable hardware A/D bit updates (GADE) in the dev [...]\n Content analysis details: (-17.6 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no\n trust\n [115.124.30.119 listed in list.dnswl.org]\n -7.5 USER_IN_DEF_SPF_WL From: address is in the default SPF welcome-list\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n -0.0 SPF_PASS SPF: sender matches SPF record\n -7.5 USER_IN_DEF_DKIM_WL From: address is in the default DKIM welcome-list\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n author's\n domain\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]\n 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay\n lines\n -0.5 ENV_AND_HDR_SPF_MATCH Env and Hdr From used in default SPF WL Match","X-BeenThere":"kvm-riscv@lists.infradead.org","X-Mailman-Version":"2.1.34","Precedence":"list","List-Id":"","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"kvm-riscv\" ","Errors-To":"kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"}}]