[{"id":3683113,"web_url":"http://patchwork.ozlabs.org/comment/3683113/","msgid":"","list_archive_url":null,"date":"2026-04-28T05:15:52","subject":"Re: [PATCH v2 2/3] ddr: altera: gen5: Add DRAM size checking","submitter":{"id":91590,"url":"http://patchwork.ozlabs.org/api/people/91590/","name":"Sune Brian","email":"briansune@gmail.com"},"content":"On Tue, Apr 28, 2026 at 11:32 AM wrote:\n>\n> From: Alif Zakuan Yuslaimi \n>\n> Add DRAM size checking compare between size from device tree and actual\n> hardware.\n>\n> Trigger hang if DRAM size from device tree is greater than actual hardware.\n> Display warning message if DRAM size mismatch between device tree and\n> actual hardware.\n>\n> get_ram_size() uses size from device tree. So, it has consistency with\n> other device families.\n>\n> New Kconfig is introduced to enable this implementation only on the default\n> CycloneV board as this will increase the SPL size which will exceed some\n> Gen5 devices' SPL size limit.\n>\n> Signed-off-by: Alif Zakuan Yuslaimi \n> ---\n> arch/arm/mach-socfpga/Kconfig | 9 +++++++++\n> drivers/ddr/altera/sdram_gen5.c | 27 +++++++++++++++++++++++++++\n> 2 files changed, 36 insertions(+)\n\nFor GEN5 cyclone V:\nCustom board\n512x16 DDR3 die x 3\nECC supported to max Cyclone V allowed\nNo boot issue on soft / hard reset\n\nlog:\nU-Boot SPL 2026.07-rc1-dirty (Apr 28 2026 - 13:09:08 +0800)\nDDRCAL: Scrubbing ECC RAM (2048 MiB).\nDDRCAL: SDRAM-ECC initialized success with 1057 ms\nTrying to boot from MMC1\n\n\nU-Boot 2026.07-rc1-dirty (Apr 28 2026 - 13:09:08 +0800)\n\nTested-by: Brian Sune ","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=pAjR3PGT;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Mon, 27 Apr 2026\n 22:16:03 -0700 (PDT)","MIME-Version":"1.0","References":"<20260428033230.7777-1-alif.zakuan.yuslaimi@altera.com>\n <20260428033230.7777-3-alif.zakuan.yuslaimi@altera.com>","In-Reply-To":"<20260428033230.7777-3-alif.zakuan.yuslaimi@altera.com>","From":"Sune Brian ","Date":"Tue, 28 Apr 2026 13:15:52 +0800","X-Gm-Features":"AVHnY4LkBR7It9pKgpOjOK0yibMW8QD7s8q6VcwMBO1EIYHOYERGKXqXPvXNowc","Message-ID":"\n ","Subject":"Re: [PATCH v2 2/3] ddr: altera: gen5: Add DRAM size checking","To":"alif.zakuan.yuslaimi@altera.com","Cc":"u-boot@lists.denx.de, Marek Vasut ,\n Simon Goldschmidt ,\n Tien Fong Chee , Tom Rini ,\n Yao Zi ,\n Patrice Chotard , Peng Fan ,\n Simon Glass ","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"}}]