[{"id":3683831,"web_url":"http://patchwork.ozlabs.org/comment/3683831/","msgid":"<20260429-slick-intelligent-myna-8cba6c@quoll>","list_archive_url":null,"date":"2026-04-29T06:41:30","subject":"Re: [PATCH v3 4/6] dt-bindings: pinctrl: Document Tegra264 pin\n controllers","submitter":{"id":68952,"url":"http://patchwork.ozlabs.org/api/people/68952/","name":"Krzysztof Kozlowski","email":"krzk@kernel.org"},"content":"On Mon, Apr 27, 2026 at 01:42:29PM +0000, pshete@nvidia.com wrote:\n> From: Prathamesh Shete <pshete@nvidia.com>\n> \n> Tegra264 contains three pin controllers. Document their compatible strings\n> and describe the list of pins and functions that they provide.\n> \n> Signed-off-by: Prathamesh Shete <pshete@nvidia.com>\n> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>\n> ---\n> Changes in v3:\n>   - Wrap commit message to 75 chars per line (v2 was too short).\n> Changes in v2:\n>   - Add a 'required:' block listing 'compatible' and 'reg'.\n>   - Switch top-level 'unevaluatedProperties: false' to\n>     'additionalProperties: false'.\n\nReviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>\n\nBest regards,\nKrzysztof","headers":{"Return-Path":"\n <linux-tegra+bounces-14050-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=DU+ksaYf;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; 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charset=utf-8","Content-Disposition":"inline","In-Reply-To":"<20260427134231.531222-5-pshete@nvidia.com>"}}]