[{"id":3683464,"web_url":"http://patchwork.ozlabs.org/comment/3683464/","msgid":"<20260428132657.GA591628@e124191.cambridge.arm.com>","list_archive_url":null,"date":"2026-04-28T13:26:57","subject":"Re: [kvm-unit-tests PATCH] arm: add wfx test case","submitter":{"id":81056,"url":"http://patchwork.ozlabs.org/api/people/81056/","name":"Joey Gouly","email":"joey.gouly@arm.com"},"content":"Hi,\n\nFew small comments.\n\nOn Mon, Apr 27, 2026 at 02:00:45PM +0100, Alex Bennée wrote:\n> This is based on a similar test case I wrote for QEMU's tcg tests although\n> obviously able to take advantage of kvm-unit-tests additional plumbing for\n> dealing with the GIC and IRQs.\n> \n> Signed-off-by: Alex Bennée \n> ---\n> arm/Makefile.arm64 | 1 +\n> lib/arm64/asm/processor.h | 7 ++\n> lib/arm64/asm/sysreg.h | 3 +\n> arm/wfx.c | 137 ++++++++++++++++++++++++++++++++++++++\n> arm/unittests.cfg | 5 ++\n> 5 files changed, 153 insertions(+)\n> create mode 100644 arm/wfx.c\n> \n> diff --git a/arm/Makefile.arm64 b/arm/Makefile.arm64\n> index a40c830d..52b3f35d 100644\n> --- a/arm/Makefile.arm64\n> +++ b/arm/Makefile.arm64\n> @@ -64,6 +64,7 @@ tests += $(TEST_DIR)/cache.$(exe)\n> tests += $(TEST_DIR)/debug.$(exe)\n> tests += $(TEST_DIR)/fpu.$(exe)\n> tests += $(TEST_DIR)/mte.$(exe)\n> +tests += $(TEST_DIR)/wfx.$(exe)\n> \n> include $(SRCDIR)/$(TEST_DIR)/Makefile.common\n> \n> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h\n> index 32ddc1b3..2104036d 100644\n> --- a/lib/arm64/asm/processor.h\n> +++ b/lib/arm64/asm/processor.h\n> @@ -173,5 +173,12 @@ static inline bool system_supports_rndr(void)\n> \treturn ((id_aa64isar0_el1 >> ID_AA64ISAR0_EL1_RNDR_SHIFT) & 0xf) != 0;\n> }\n> \n> +static inline bool system_supports_wfxt(void)\n> +{\n> +\tu64 id_aa64isar2_el1 = read_sysreg_s(ID_AA64ISAR2_EL1);\n> +\n> +\treturn ((id_aa64isar2_el1 >> ID_AA64ISAR2_EL1_WFxT_SHIFT) & 0xf) != 0;\n> +}\n> +\n> #endif /* !__ASSEMBLER__ */\n> #endif /* _ASMARM64_PROCESSOR_H_ */\n> diff --git a/lib/arm64/asm/sysreg.h b/lib/arm64/asm/sysreg.h\n> index f2d05018..cb96a649 100644\n> --- a/lib/arm64/asm/sysreg.h\n> +++ b/lib/arm64/asm/sysreg.h\n> @@ -77,6 +77,9 @@ asm(\n> #define ID_AA64ISAR0_EL1_RNDR_SHIFT\t60\n> #define ID_AA64PFR1_EL1_MTE_SHIFT\t8\n> \n> +#define ID_AA64ISAR2_EL1\t\tsys_reg(3, 0, 0, 6, 2)\n> +#define ID_AA64ISAR2_EL1_WFxT_SHIFT\t0\n> +\n> #define ID_AA64MMFR0_EL1_FGT_SHIFT\t56\n> #define ID_AA64MMFR0_EL1_FGT_FGT2\t0x2\n> \n> diff --git a/arm/wfx.c b/arm/wfx.c\n> new file mode 100644\n> index 00000000..912e50e6\n> --- /dev/null\n> +++ b/arm/wfx.c\n> @@ -0,0 +1,137 @@\n> +/*\n> + * WFX Instructions Test (WFI, WFE, WFIT, WFET)\n> + *\n> + * Copyright (c) 2026 Linaro Ltd\n> + *\n> + * SPDX-License-Identifier: GPL-2.0-or-later\n> + */\n> +\n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +\n> +#define TIMEOUT 200000\n\nInstead of a hardcoded TIMEOUT, what about something similar to arm/timer.c:\n\n\tu64 time_10ms = read_sysreg(cntfrq_el0) / 100;\n\n> +\n> +#define sev() asm volatile(\"sev\" : : : \"memory\")\n> +#define sevl() asm volatile(\"sevl\" : : : \"memory\")\n> +#define wfi() asm volatile(\"wfi\" : : : \"memory\")\n> +#define wfe() asm volatile(\"wfe\" : : : \"memory\")\n> +\n> +#define wfit(reg) \\\n> +\tasm volatile(\".arch armv8.7-a\\n\\twfit %0\" : : \"r\" (reg) : \"memory\")\n> +#define wfet(reg) \\\n> +\tasm volatile(\".arch armv8.7-a\\n\\twfet %0\" : : \"r\" (reg) : \"memory\")\n> +\n> +static void timer_handler(struct pt_regs *regs)\n> +{\n> +\t/* Disable timer to stop IRQ from re-firing */\n> +\twrite_sysreg(0, cntv_ctl_el0);\n> +}\n> +\n> +static bool check_elapsed(uint64_t start, uint64_t threshold, const char *test, bool more)\n> +{\n> +\tuint64_t end = read_sysreg(cntvct_el0);\n> +\tuint64_t elapsed = end - start;\n> +\tbool pass = more ? elapsed >= threshold : elapsed <= threshold;\n> +\n> +\treport(pass, \"%s (%ld ticks)\", test, elapsed);\n> +\n> +\tif (!pass) {\n> +\t\treport_info(\"%s %s\", test, more ? \"woke too early\" : \"slept despite SEV\");\n> +\t}\n> +\treturn pass;\n> +}\n> +\n> +static void test_wfi(void)\n> +{\n> +\tuint64_t start;\n> +\n> +\treport_info(\"Testing WFI...\");\n> +\n> +\tstart = read_sysreg(cntvct_el0);\n> +\twrite_sysreg(TIMEOUT, cntv_tval_el0);\n> +\twrite_sysreg(1, cntv_ctl_el0); /* Enable timer, no mask */\n> +\tisb();\n> +\n> +\tlocal_irq_enable();\n> +\twfi();\n> +\tlocal_irq_disable();\n> +\n> +\tcheck_elapsed(start, TIMEOUT, \"WFI\", true);\n> +}\n> +\n> +static void test_wfe(void)\n> +{\n> +\tuint64_t start;\n> +\n\nI think a comment here would be good, just to say it's testing that a wfe\ndoesn't sleep for a 'long' period with no pending events, or something like\nthat?\n\n> +\treport_info(\"Testing WFE/SEV...\");\n> +\tsev();\n> +\tstart = read_sysreg(cntvct_el0);\n> +\twfe();\n> +\tcheck_elapsed(start, TIMEOUT, \"WFE/SEV\", false);\n> +\n> +\treport_info(\"Testing WFE/SEVL...\");\n> +\tsevl();\n> +\tstart = read_sysreg(cntvct_el0);\n> +\twfe();\n> +\tcheck_elapsed(start, TIMEOUT, \"WFE/SEVL\", false);\n> +}\n> +\n> +static void test_wfit(void)\n> +{\n> +\tuint64_t start, timeout;\n> +\n> +\treport_info(\"Testing WFIT...\");\n> +\tstart = read_sysreg(cntvct_el0);\n> +\ttimeout = start + TIMEOUT;\n> +\twfit(timeout);\n> +\tcheck_elapsed(start, TIMEOUT, \"WFIT\", true);\n> +}\n> +\n> +static void test_wfet(void)\n> +{\n> +\tuint64_t start, timeout;\n> +\n> +\treport_info(\"Testing WFET...\");\n> +\t/* Ensure no pending events */\n> +\tsev();\n\nCould this just be sevl here? Not that it really matters.\n\n> +\twfe();\n> +\n> +\tstart = read_sysreg(cntvct_el0);\n> +\ttimeout = start + TIMEOUT;\n> +\twfet(timeout);\n> +\tcheck_elapsed(start, TIMEOUT, \"WFET\", true);\n> +}\n> +\n> +int main(void)\n> +{\n> +\n> +\tif (gic_init() < 0) {\n> +\t\treport_abort(\"GIC init failed\");\n> +\t\treturn 1;\n> +\t}\n> +\n> +\t/* Install timer handler for WFI wake-up */\n> +\tinstall_irq_handler(EL1H_IRQ, timer_handler);\n> +\tgic_enable_defaults();\n> +\n> +\t/* Enable Virtual Timer PPI */\n> +\tgic_irq_set_clr_enable(27, true);\n\nInstead of hardcoding 27 here, you can use:\n\n\tu32 irq = current_level() == CurrentEL_EL1 ? TIMER_VTIMER_IRQ : TIMER_HVTIMER_IRQ; \n\tgic_irq_set_clr_enable(irq, true);\n\nWhich also allows the test to run at EL2.\n\n> +\n> +\treport_prefix_push(\"WFx\");\n> +\ttest_wfi();\n> +\ttest_wfe();\n> +\treport_prefix_pop();\n> +\n> +\tif (system_supports_wfxt()) {\n> +\t\treport_prefix_push(\"WFxT\");\n> +\t\ttest_wfit();\n> +\t\ttest_wfet();\n> +\t} else {\n> +\t\treport_skip(\"WFxT instructions not supported\");\n> +\t}\n> +\n> +\treturn report_summary();\n> +}\n> diff --git a/arm/unittests.cfg b/arm/unittests.cfg\n> index 12fc4468..7adf96f2 100644\n> --- a/arm/unittests.cfg\n> +++ b/arm/unittests.cfg\n> @@ -339,3 +339,8 @@ groups = mte\n> test_args = asymm\n> qemu_params = -machine mte=on\n> arch = arm64\n> +\n> +[wfx]\n> +file = wfx.flat\n> +groups = wfx\n> +arch = arm64\n\nThanks,\nJoey","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=fail 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DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-Mailman-Approved-At":"Tue, 28 Apr 2026 09:36:02 -0400","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3683528,"web_url":"http://patchwork.ozlabs.org/comment/3683528/","msgid":"<87h5ovdtge.fsf@draig.linaro.org>","list_archive_url":null,"date":"2026-04-28T14:56:33","subject":"Re: [kvm-unit-tests PATCH] arm: add wfx test case","submitter":{"id":39532,"url":"http://patchwork.ozlabs.org/api/people/39532/","name":"Alex Bennée","email":"alex.bennee@linaro.org"},"content":"Joey Gouly writes:\n\n> Hi,\n>\n> Few small comments.\n>\n> On Mon, Apr 27, 2026 at 02:00:45PM +0100, Alex Bennée wrote:\n>> This is based on a similar test case I wrote for QEMU's tcg tests although\n>> obviously able to take advantage of kvm-unit-tests additional plumbing for\n>> dealing with the GIC and IRQs.\n>> \n>> Signed-off-by: Alex Bennée \n>> ---\n>> arm/Makefile.arm64 | 1 +\n>> lib/arm64/asm/processor.h | 7 ++\n>> lib/arm64/asm/sysreg.h | 3 +\n>> arm/wfx.c | 137 ++++++++++++++++++++++++++++++++++++++\n>> arm/unittests.cfg | 5 ++\n>> 5 files changed, 153 insertions(+)\n>> create mode 100644 arm/wfx.c\n>> \n>> diff --git a/arm/Makefile.arm64 b/arm/Makefile.arm64\n>> index a40c830d..52b3f35d 100644\n>> --- a/arm/Makefile.arm64\n>> +++ b/arm/Makefile.arm64\n>> @@ -64,6 +64,7 @@ tests += $(TEST_DIR)/cache.$(exe)\n>> tests += $(TEST_DIR)/debug.$(exe)\n>> tests += $(TEST_DIR)/fpu.$(exe)\n>> tests += $(TEST_DIR)/mte.$(exe)\n>> +tests += $(TEST_DIR)/wfx.$(exe)\n>> \n>> include $(SRCDIR)/$(TEST_DIR)/Makefile.common\n>> \n>> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h\n>> index 32ddc1b3..2104036d 100644\n>> --- a/lib/arm64/asm/processor.h\n>> +++ b/lib/arm64/asm/processor.h\n>> @@ -173,5 +173,12 @@ static inline bool system_supports_rndr(void)\n>> \treturn ((id_aa64isar0_el1 >> ID_AA64ISAR0_EL1_RNDR_SHIFT) & 0xf) != 0;\n>> }\n>> \n>> +static inline bool system_supports_wfxt(void)\n>> +{\n>> +\tu64 id_aa64isar2_el1 = read_sysreg_s(ID_AA64ISAR2_EL1);\n>> +\n>> +\treturn ((id_aa64isar2_el1 >> ID_AA64ISAR2_EL1_WFxT_SHIFT) & 0xf) != 0;\n>> +}\n>> +\n>> #endif /* !__ASSEMBLER__ */\n>> #endif /* _ASMARM64_PROCESSOR_H_ */\n>> diff --git a/lib/arm64/asm/sysreg.h b/lib/arm64/asm/sysreg.h\n>> index f2d05018..cb96a649 100644\n>> --- a/lib/arm64/asm/sysreg.h\n>> +++ b/lib/arm64/asm/sysreg.h\n>> @@ -77,6 +77,9 @@ asm(\n>> #define ID_AA64ISAR0_EL1_RNDR_SHIFT\t60\n>> #define ID_AA64PFR1_EL1_MTE_SHIFT\t8\n>> \n>> +#define ID_AA64ISAR2_EL1\t\tsys_reg(3, 0, 0, 6, 2)\n>> +#define ID_AA64ISAR2_EL1_WFxT_SHIFT\t0\n>> +\n>> #define ID_AA64MMFR0_EL1_FGT_SHIFT\t56\n>> #define ID_AA64MMFR0_EL1_FGT_FGT2\t0x2\n>> \n>> diff --git a/arm/wfx.c b/arm/wfx.c\n>> new file mode 100644\n>> index 00000000..912e50e6\n>> --- /dev/null\n>> +++ b/arm/wfx.c\n>> @@ -0,0 +1,137 @@\n>> +/*\n>> + * WFX Instructions Test (WFI, WFE, WFIT, WFET)\n>> + *\n>> + * Copyright (c) 2026 Linaro Ltd\n>> + *\n>> + * SPDX-License-Identifier: GPL-2.0-or-later\n>> + */\n>> +\n>> +#include \n>> +#include \n>> +#include \n>> +#include \n>> +#include \n>> +\n>> +#define TIMEOUT 200000\n>\n> Instead of a hardcoded TIMEOUT, what about something similar to arm/timer.c:\n>\n> \tu64 time_10ms = read_sysreg(cntfrq_el0) / 100;\n\nok\n\n>\n>> +\n>> +#define sev() asm volatile(\"sev\" : : : \"memory\")\n>> +#define sevl() asm volatile(\"sevl\" : : : \"memory\")\n>> +#define wfi() asm volatile(\"wfi\" : : : \"memory\")\n>> +#define wfe() asm volatile(\"wfe\" : : : \"memory\")\n>> +\n>> +#define wfit(reg) \\\n>> +\tasm volatile(\".arch armv8.7-a\\n\\twfit %0\" : : \"r\" (reg) : \"memory\")\n>> +#define wfet(reg) \\\n>> +\tasm volatile(\".arch armv8.7-a\\n\\twfet %0\" : : \"r\" (reg) : \"memory\")\n>> +\n>> +static void timer_handler(struct pt_regs *regs)\n>> +{\n>> +\t/* Disable timer to stop IRQ from re-firing */\n>> +\twrite_sysreg(0, cntv_ctl_el0);\n>> +}\n>> +\n>> +static bool check_elapsed(uint64_t start, uint64_t threshold, const char *test, bool more)\n>> +{\n>> +\tuint64_t end = read_sysreg(cntvct_el0);\n>> +\tuint64_t elapsed = end - start;\n>> +\tbool pass = more ? elapsed >= threshold : elapsed <= threshold;\n>> +\n>> +\treport(pass, \"%s (%ld ticks)\", test, elapsed);\n>> +\n>> +\tif (!pass) {\n>> +\t\treport_info(\"%s %s\", test, more ? \"woke too early\" : \"slept despite SEV\");\n>> +\t}\n>> +\treturn pass;\n>> +}\n>> +\n>> +static void test_wfi(void)\n>> +{\n>> +\tuint64_t start;\n>> +\n>> +\treport_info(\"Testing WFI...\");\n>> +\n>> +\tstart = read_sysreg(cntvct_el0);\n>> +\twrite_sysreg(TIMEOUT, cntv_tval_el0);\n>> +\twrite_sysreg(1, cntv_ctl_el0); /* Enable timer, no mask */\n>> +\tisb();\n>> +\n>> +\tlocal_irq_enable();\n>> +\twfi();\n>> +\tlocal_irq_disable();\n>> +\n>> +\tcheck_elapsed(start, TIMEOUT, \"WFI\", true);\n>> +}\n>> +\n>> +static void test_wfe(void)\n>> +{\n>> +\tuint64_t start;\n>> +\n>\n> I think a comment here would be good, just to say it's testing that a wfe\n> doesn't sleep for a 'long' period with no pending events, or something like\n> that?\n\nok\n\n>\n>> +\treport_info(\"Testing WFE/SEV...\");\n>> +\tsev();\n>> +\tstart = read_sysreg(cntvct_el0);\n>> +\twfe();\n>> +\tcheck_elapsed(start, TIMEOUT, \"WFE/SEV\", false);\n>> +\n>> +\treport_info(\"Testing WFE/SEVL...\");\n>> +\tsevl();\n>> +\tstart = read_sysreg(cntvct_el0);\n>> +\twfe();\n>> +\tcheck_elapsed(start, TIMEOUT, \"WFE/SEVL\", false);\n>> +}\n>> +\n>> +static void test_wfit(void)\n>> +{\n>> +\tuint64_t start, timeout;\n>> +\n>> +\treport_info(\"Testing WFIT...\");\n>> +\tstart = read_sysreg(cntvct_el0);\n>> +\ttimeout = start + TIMEOUT;\n>> +\twfit(timeout);\n>> +\tcheck_elapsed(start, TIMEOUT, \"WFIT\", true);\n>> +}\n>> +\n>> +static void test_wfet(void)\n>> +{\n>> +\tuint64_t start, timeout;\n>> +\n>> +\treport_info(\"Testing WFET...\");\n>> +\t/* Ensure no pending events */\n>> +\tsev();\n>\n> Could this just be sevl here? Not that it really matters.\n\nit could be - ideally I would extend the test case to work with -smp so\nwe can properly exercise that code path as well.\n\n>\n>> +\twfe();\n>> +\n>> +\tstart = read_sysreg(cntvct_el0);\n>> +\ttimeout = start + TIMEOUT;\n>> +\twfet(timeout);\n>> +\tcheck_elapsed(start, TIMEOUT, \"WFET\", true);\n>> +}\n>> +\n>> +int main(void)\n>> +{\n>> +\n>> +\tif (gic_init() < 0) {\n>> +\t\treport_abort(\"GIC init failed\");\n>> +\t\treturn 1;\n>> +\t}\n>> +\n>> +\t/* Install timer handler for WFI wake-up */\n>> +\tinstall_irq_handler(EL1H_IRQ, timer_handler);\n>> +\tgic_enable_defaults();\n>> +\n>> +\t/* Enable Virtual Timer PPI */\n>> +\tgic_irq_set_clr_enable(27, true);\n>\n> Instead of hardcoding 27 here, you can use:\n>\n> \tu32 irq = current_level() == CurrentEL_EL1 ? TIMER_VTIMER_IRQ : TIMER_HVTIMER_IRQ; \n> \tgic_irq_set_clr_enable(irq, true);\n>\n> Which also allows the test to run at EL2.\n\nsounds good.\n\n>\n>> +\n>> +\treport_prefix_push(\"WFx\");\n>> +\ttest_wfi();\n>> +\ttest_wfe();\n>> +\treport_prefix_pop();\n>> +\n>> +\tif (system_supports_wfxt()) {\n>> +\t\treport_prefix_push(\"WFxT\");\n>> +\t\ttest_wfit();\n>> +\t\ttest_wfet();\n>> +\t} else {\n>> +\t\treport_skip(\"WFxT instructions not supported\");\n>> +\t}\n>> +\n>> +\treturn report_summary();\n>> +}\n>> diff --git a/arm/unittests.cfg b/arm/unittests.cfg\n>> index 12fc4468..7adf96f2 100644\n>> --- a/arm/unittests.cfg\n>> +++ b/arm/unittests.cfg\n>> @@ -339,3 +339,8 @@ groups = mte\n>> test_args = asymm\n>> qemu_params = -machine mte=on\n>> arch = arm64\n>> +\n>> +[wfx]\n>> +file = wfx.flat\n>> +groups = wfx\n>> +arch = arm64\n>\n> Thanks,\n> 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+0100","Message-ID":"<87h5ovdtge.fsf@draig.linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Transfer-Encoding":"quoted-printable","Received-SPF":"pass client-ip=2a00:1450:4864:20::32e;\n envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32e.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3685125,"web_url":"http://patchwork.ozlabs.org/comment/3685125/","msgid":"","list_archive_url":null,"date":"2026-05-01T13:15:14","subject":"Re: [kvm-unit-tests PATCH] arm: add wfx test case","submitter":{"id":75988,"url":"http://patchwork.ozlabs.org/api/people/75988/","name":"Alexandru Elisei","email":"alexandru.elisei@arm.com"},"content":"Hi Alex,\n\nOn Mon, Apr 27, 2026 at 02:00:45PM +0100, Alex Bennée wrote:\n> This is based on a similar test case I wrote for QEMU's tcg tests although\n> obviously able to take advantage of kvm-unit-tests additional plumbing for\n> dealing with the GIC and IRQs.\n> \n> Signed-off-by: Alex Bennée \n> ---\n> arm/Makefile.arm64 | 1 +\n> lib/arm64/asm/processor.h | 7 ++\n> lib/arm64/asm/sysreg.h | 3 +\n> arm/wfx.c | 137 ++++++++++++++++++++++++++++++++++++++\n> arm/unittests.cfg | 5 ++\n> 5 files changed, 153 insertions(+)\n> create mode 100644 arm/wfx.c\n> \n> diff --git a/arm/Makefile.arm64 b/arm/Makefile.arm64\n> index a40c830d..52b3f35d 100644\n> --- a/arm/Makefile.arm64\n> +++ b/arm/Makefile.arm64\n> @@ -64,6 +64,7 @@ tests += $(TEST_DIR)/cache.$(exe)\n> tests += $(TEST_DIR)/debug.$(exe)\n> tests += $(TEST_DIR)/fpu.$(exe)\n> tests += $(TEST_DIR)/mte.$(exe)\n> +tests += $(TEST_DIR)/wfx.$(exe)\n> \n> include $(SRCDIR)/$(TEST_DIR)/Makefile.common\n> \n> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h\n> index 32ddc1b3..2104036d 100644\n> --- a/lib/arm64/asm/processor.h\n> +++ b/lib/arm64/asm/processor.h\n> @@ -173,5 +173,12 @@ static inline bool system_supports_rndr(void)\n> \treturn ((id_aa64isar0_el1 >> ID_AA64ISAR0_EL1_RNDR_SHIFT) & 0xf) != 0;\n> }\n> \n> +static inline bool system_supports_wfxt(void)\n> +{\n> +\tu64 id_aa64isar2_el1 = read_sysreg_s(ID_AA64ISAR2_EL1);\n> +\n> +\treturn ((id_aa64isar2_el1 >> ID_AA64ISAR2_EL1_WFxT_SHIFT) & 0xf) != 0;\n> +}\n> +\n> #endif /* !__ASSEMBLER__ */\n> #endif /* _ASMARM64_PROCESSOR_H_ */\n> diff --git a/lib/arm64/asm/sysreg.h b/lib/arm64/asm/sysreg.h\n> index f2d05018..cb96a649 100644\n> --- a/lib/arm64/asm/sysreg.h\n> +++ b/lib/arm64/asm/sysreg.h\n> @@ -77,6 +77,9 @@ asm(\n> #define ID_AA64ISAR0_EL1_RNDR_SHIFT\t60\n> #define ID_AA64PFR1_EL1_MTE_SHIFT\t8\n> \n> +#define ID_AA64ISAR2_EL1\t\tsys_reg(3, 0, 0, 6, 2)\n> +#define ID_AA64ISAR2_EL1_WFxT_SHIFT\t0\n> +\n> #define ID_AA64MMFR0_EL1_FGT_SHIFT\t56\n> #define ID_AA64MMFR0_EL1_FGT_FGT2\t0x2\n> \n> diff --git a/arm/wfx.c b/arm/wfx.c\n> new file mode 100644\n> index 00000000..912e50e6\n> --- /dev/null\n> +++ b/arm/wfx.c\n> @@ -0,0 +1,137 @@\n> +/*\n> + * WFX Instructions Test (WFI, WFE, WFIT, WFET)\n> + *\n> + * Copyright (c) 2026 Linaro Ltd\n> + *\n> + * SPDX-License-Identifier: GPL-2.0-or-later\n> + */\n> +\n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +\n> +#define TIMEOUT 200000\n> +\n> +#define sev() asm volatile(\"sev\" : : : \"memory\")\n> +#define sevl() asm volatile(\"sevl\" : : : \"memory\")\n> +#define wfi() asm volatile(\"wfi\" : : : \"memory\")\n> +#define wfe() asm volatile(\"wfe\" : : : \"memory\")\n> +\n> +#define wfit(reg) \\\n> +\tasm volatile(\".arch armv8.7-a\\n\\twfit %0\" : : \"r\" (reg) : \"memory\")\n> +#define wfet(reg) \\\n> +\tasm volatile(\".arch armv8.7-a\\n\\twfet %0\" : : \"r\" (reg) : \"memory\")\n> +\n> +static void timer_handler(struct pt_regs *regs)\n> +{\n> +\t/* Disable timer to stop IRQ from re-firing */\n> +\twrite_sysreg(0, cntv_ctl_el0);\n> +}\n\nIt is customary for the interrupt handler to ack the interrupt at the GIC level.\n\n> +\n> +static bool check_elapsed(uint64_t start, uint64_t threshold, const char *test, bool more)\n> +{\n> +\tuint64_t end = read_sysreg(cntvct_el0);\n> +\tuint64_t elapsed = end - start;\n> +\tbool pass = more ? elapsed >= threshold : elapsed <= threshold;\n> +\n> +\treport(pass, \"%s (%ld ticks)\", test, elapsed);\n> +\n> +\tif (!pass) {\n> +\t\treport_info(\"%s %s\", test, more ? \"woke too early\" : \"slept despite SEV\");\n> +\t}\n> +\treturn pass;\n> +}\n> +\n> +static void test_wfi(void)\n> +{\n> +\tuint64_t start;\n> +\n> +\treport_info(\"Testing WFI...\");\n> +\n> +\tstart = read_sysreg(cntvct_el0);\n> +\twrite_sysreg(TIMEOUT, cntv_tval_el0);\n> +\twrite_sysreg(1, cntv_ctl_el0); /* Enable timer, no mask */\n> +\tisb();\n> +\n> +\tlocal_irq_enable();\n> +\twfi();\n\nConsider this scenario:\n\n\tlocal_irq_enable();\n\t// CPU takes the interrupt, handles it and returns.\n\twfi(); <- CPU now waits forever for an interrupt that will never come\n\nThe proper way to do it on baremetal would be:\n\n\tlocal_irq_disable();\n\t// Program timer to fire\n\twfi();\n\t// Timer fires, GIC asserts the interrupt, WFI completes\n\tlocal_irq_enable();\n\t// CPU handles the interrupt\n\tcheck_elapsed(..)\n\nBut this is not baremetal. KVM can decide not to trap WFI (look at\narch/arm64/kvm/arm.c::kvm_arch_vcpu_load() -> kvm_vpcu_should_clear_twi()). In\nthat case, the WFI might complete due a host interrupt, and check_elapsed() will\nfail because the timer hasn't yet fired.\n\n> +\tlocal_irq_disable();\n> +\n> +\tcheck_elapsed(start, TIMEOUT, \"WFI\", true);\n> +}\n> +\n> +static void test_wfe(void)\n> +{\n> +\tuint64_t start;\n> +\n> +\treport_info(\"Testing WFE/SEV...\");\n> +\tsev();\n> +\tstart = read_sysreg(cntvct_el0);\n> +\twfe();\n> +\tcheck_elapsed(start, TIMEOUT, \"WFE/SEV\", false);\n> +\n> +\treport_info(\"Testing WFE/SEVL...\");\n> +\tsevl();\n> +\tstart = read_sysreg(cntvct_el0);\n> +\twfe();\n> +\tcheck_elapsed(start, TIMEOUT, \"WFE/SEVL\", false);\n> +}\n\nI haven't thought about this too much, but it looks to me like the same\nsituation with WFI can happen with WFE\n\nAlso, kvm-unit-tests() makes use of WFE and SEV for multithreading, and the fact\nthat multithreaded tests work at all might be taken as proof enough that the two\ninstructions are correctly implemented.\n\nThanks,\nAlex\n\n> +\n> +static void test_wfit(void)\n> +{\n> +\tuint64_t start, timeout;\n> +\n> +\treport_info(\"Testing WFIT...\");\n> +\tstart = read_sysreg(cntvct_el0);\n> +\ttimeout = start + TIMEOUT;\n> +\twfit(timeout);\n> +\tcheck_elapsed(start, TIMEOUT, \"WFIT\", true);\n> +}\n> +\n> +static void test_wfet(void)\n> +{\n> +\tuint64_t start, timeout;\n> +\n> +\treport_info(\"Testing WFET...\");\n> +\t/* Ensure no pending events */\n> +\tsev();\n> +\twfe();\n> +\n> +\tstart = read_sysreg(cntvct_el0);\n> +\ttimeout = start + TIMEOUT;\n> +\twfet(timeout);\n> +\tcheck_elapsed(start, TIMEOUT, \"WFET\", true);\n> +}\n> +\n> +int main(void)\n> +{\n> +\n> +\tif (gic_init() < 0) {\n> +\t\treport_abort(\"GIC init failed\");\n> +\t\treturn 1;\n> +\t}\n> +\n> +\t/* Install timer handler for WFI wake-up */\n> +\tinstall_irq_handler(EL1H_IRQ, timer_handler);\n> +\tgic_enable_defaults();\n> +\n> +\t/* Enable Virtual Timer PPI */\n> +\tgic_irq_set_clr_enable(27, true);\n> +\n> +\treport_prefix_push(\"WFx\");\n> +\ttest_wfi();\n> +\ttest_wfe();\n> +\treport_prefix_pop();\n> +\n> +\tif (system_supports_wfxt()) {\n> +\t\treport_prefix_push(\"WFxT\");\n> +\t\ttest_wfit();\n> +\t\ttest_wfet();\n> +\t} else {\n> +\t\treport_skip(\"WFxT instructions not supported\");\n> +\t}\n> +\n> +\treturn report_summary();\n> +}\n> diff --git a/arm/unittests.cfg b/arm/unittests.cfg\n> index 12fc4468..7adf96f2 100644\n> --- a/arm/unittests.cfg\n> +++ b/arm/unittests.cfg\n> @@ -339,3 +339,8 @@ groups = mte\n> test_args = asymm\n> qemu_params = -machine mte=on\n> arch = arm64\n> +\n> +[wfx]\n> +file = wfx.flat\n> +groups = wfx\n> +arch = arm64\n> -- \n> 2.47.3\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n unprotected) header.d=arm.com header.i=@arm.com header.a=rsa-sha256\n header.s=foss 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=?utf-8?q?Benn=C3=A9e?= ","Cc":"qemu-devel@nongnu.org, Andrew Jones ,\n Eric Auger ,\n \"open list:ARM\" ,\n \"open list:Default mailing list\" ","Subject":"Re: [kvm-unit-tests PATCH] arm: add wfx test case","Message-ID":"","References":"<20260427130045.3669851-1-alex.bennee@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<20260427130045.3669851-1-alex.bennee@linaro.org>","Received-SPF":"pass client-ip=217.140.110.172;\n envelope-from=alexandru.elisei@arm.com; helo=foss.arm.com","X-Spam_score_int":"-43","X-Spam_score":"-4.4","X-Spam_bar":"----","X-Spam_report":"(-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3685139,"web_url":"http://patchwork.ozlabs.org/comment/3685139/","msgid":"<87zf2jcisg.fsf@draig.linaro.org>","list_archive_url":null,"date":"2026-05-01T14:21:19","subject":"Re: [kvm-unit-tests PATCH] arm: add wfx test case","submitter":{"id":39532,"url":"http://patchwork.ozlabs.org/api/people/39532/","name":"Alex Bennée","email":"alex.bennee@linaro.org"},"content":"Alexandru Elisei writes:\n\n> Hi Alex,\n>\n> On Mon, Apr 27, 2026 at 02:00:45PM +0100, Alex Bennée wrote:\n>> This is based on a similar test case I wrote for QEMU's tcg tests although\n>> obviously able to take advantage of kvm-unit-tests additional plumbing for\n>> dealing with the GIC and IRQs.\n>> \n>> Signed-off-by: Alex Bennée \n>> ---\n>> arm/Makefile.arm64 | 1 +\n>> lib/arm64/asm/processor.h | 7 ++\n>> lib/arm64/asm/sysreg.h | 3 +\n>> arm/wfx.c | 137 ++++++++++++++++++++++++++++++++++++++\n>> arm/unittests.cfg | 5 ++\n>> 5 files changed, 153 insertions(+)\n>> create mode 100644 arm/wfx.c\n>> \n>> diff --git a/arm/Makefile.arm64 b/arm/Makefile.arm64\n>> index a40c830d..52b3f35d 100644\n>> --- a/arm/Makefile.arm64\n>> +++ b/arm/Makefile.arm64\n>> @@ -64,6 +64,7 @@ tests += $(TEST_DIR)/cache.$(exe)\n>> tests += $(TEST_DIR)/debug.$(exe)\n>> tests += $(TEST_DIR)/fpu.$(exe)\n>> tests += $(TEST_DIR)/mte.$(exe)\n>> +tests += $(TEST_DIR)/wfx.$(exe)\n>> \n>> include $(SRCDIR)/$(TEST_DIR)/Makefile.common\n>> \n>> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h\n>> index 32ddc1b3..2104036d 100644\n>> --- a/lib/arm64/asm/processor.h\n>> +++ b/lib/arm64/asm/processor.h\n>> @@ -173,5 +173,12 @@ static inline bool system_supports_rndr(void)\n>> \treturn ((id_aa64isar0_el1 >> ID_AA64ISAR0_EL1_RNDR_SHIFT) & 0xf) != 0;\n>> }\n>> \n>> +static inline bool system_supports_wfxt(void)\n>> +{\n>> +\tu64 id_aa64isar2_el1 = read_sysreg_s(ID_AA64ISAR2_EL1);\n>> +\n>> +\treturn ((id_aa64isar2_el1 >> ID_AA64ISAR2_EL1_WFxT_SHIFT) & 0xf) != 0;\n>> +}\n>> +\n>> #endif /* !__ASSEMBLER__ */\n>> #endif /* _ASMARM64_PROCESSOR_H_ */\n>> diff --git a/lib/arm64/asm/sysreg.h b/lib/arm64/asm/sysreg.h\n>> index f2d05018..cb96a649 100644\n>> --- a/lib/arm64/asm/sysreg.h\n>> +++ b/lib/arm64/asm/sysreg.h\n>> @@ -77,6 +77,9 @@ asm(\n>> #define ID_AA64ISAR0_EL1_RNDR_SHIFT\t60\n>> #define ID_AA64PFR1_EL1_MTE_SHIFT\t8\n>> \n>> +#define ID_AA64ISAR2_EL1\t\tsys_reg(3, 0, 0, 6, 2)\n>> +#define ID_AA64ISAR2_EL1_WFxT_SHIFT\t0\n>> +\n>> #define ID_AA64MMFR0_EL1_FGT_SHIFT\t56\n>> #define ID_AA64MMFR0_EL1_FGT_FGT2\t0x2\n>> \n>> diff --git a/arm/wfx.c b/arm/wfx.c\n>> new file mode 100644\n>> index 00000000..912e50e6\n>> --- /dev/null\n>> +++ b/arm/wfx.c\n>> @@ -0,0 +1,137 @@\n>> +/*\n>> + * WFX Instructions Test (WFI, WFE, WFIT, WFET)\n>> + *\n>> + * Copyright (c) 2026 Linaro Ltd\n>> + *\n>> + * SPDX-License-Identifier: GPL-2.0-or-later\n>> + */\n>> +\n>> +#include \n>> +#include \n>> +#include \n>> +#include \n>> +#include \n>> +\n>> +#define TIMEOUT 200000\n>> +\n>> +#define sev() asm volatile(\"sev\" : : : \"memory\")\n>> +#define sevl() asm volatile(\"sevl\" : : : \"memory\")\n>> +#define wfi() asm volatile(\"wfi\" : : : \"memory\")\n>> +#define wfe() asm volatile(\"wfe\" : : : \"memory\")\n>> +\n>> +#define wfit(reg) \\\n>> +\tasm volatile(\".arch armv8.7-a\\n\\twfit %0\" : : \"r\" (reg) : \"memory\")\n>> +#define wfet(reg) \\\n>> +\tasm volatile(\".arch armv8.7-a\\n\\twfet %0\" : : \"r\" (reg) : \"memory\")\n>> +\n>> +static void timer_handler(struct pt_regs *regs)\n>> +{\n>> +\t/* Disable timer to stop IRQ from re-firing */\n>> +\twrite_sysreg(0, cntv_ctl_el0);\n>> +}\n>\n> It is customary for the interrupt handler to ack the interrupt at the GIC level.\n>\n>> +\n>> +static bool check_elapsed(uint64_t start, uint64_t threshold, const char *test, bool more)\n>> +{\n>> +\tuint64_t end = read_sysreg(cntvct_el0);\n>> +\tuint64_t elapsed = end - start;\n>> +\tbool pass = more ? elapsed >= threshold : elapsed <= threshold;\n>> +\n>> +\treport(pass, \"%s (%ld ticks)\", test, elapsed);\n>> +\n>> +\tif (!pass) {\n>> +\t\treport_info(\"%s %s\", test, more ? \"woke too early\" : \"slept despite SEV\");\n>> +\t}\n>> +\treturn pass;\n>> +}\n>> +\n>> +static void test_wfi(void)\n>> +{\n>> +\tuint64_t start;\n>> +\n>> +\treport_info(\"Testing WFI...\");\n>> +\n>> +\tstart = read_sysreg(cntvct_el0);\n>> +\twrite_sysreg(TIMEOUT, cntv_tval_el0);\n>> +\twrite_sysreg(1, cntv_ctl_el0); /* Enable timer, no mask */\n>> +\tisb();\n>> +\n>> +\tlocal_irq_enable();\n>> +\twfi();\n>\n> Consider this scenario:\n>\n> \tlocal_irq_enable();\n> \t// CPU takes the interrupt, handles it and returns.\n> \twfi(); <- CPU now waits forever for an interrupt that will never come\n>\n> The proper way to do it on baremetal would be:\n>\n> \tlocal_irq_disable();\n> \t// Program timer to fire\n> \twfi();\n> \t// Timer fires, GIC asserts the interrupt, WFI completes\n> \tlocal_irq_enable();\n> \t// CPU handles the interrupt\n> \tcheck_elapsed(..)\n>\n> But this is not baremetal. KVM can decide not to trap WFI (look at\n> arch/arm64/kvm/arm.c::kvm_arch_vcpu_load() -> kvm_vpcu_should_clear_twi()). In\n> that case, the WFI might complete due a host interrupt, and check_elapsed() will\n> fail because the timer hasn't yet fired.\n>\n>> +\tlocal_irq_disable();\n>> +\n>> +\tcheck_elapsed(start, TIMEOUT, \"WFI\", true);\n>> +}\n>> +\n>> +static void test_wfe(void)\n>> +{\n>> +\tuint64_t start;\n>> +\n>> +\treport_info(\"Testing WFE/SEV...\");\n>> +\tsev();\n>> +\tstart = read_sysreg(cntvct_el0);\n>> +\twfe();\n>> +\tcheck_elapsed(start, TIMEOUT, \"WFE/SEV\", false);\n>> +\n>> +\treport_info(\"Testing WFE/SEVL...\");\n>> +\tsevl();\n>> +\tstart = read_sysreg(cntvct_el0);\n>> +\twfe();\n>> +\tcheck_elapsed(start, TIMEOUT, \"WFE/SEVL\", false);\n>> +}\n>\n> I haven't thought about this too much, but it looks to me like the same\n> situation with WFI can happen with WFE\n>\n> Also, kvm-unit-tests() makes use of WFE and SEV for multithreading, and the fact\n> that multithreaded tests work at all might be taken as proof enough that the two\n> instructions are correctly implemented.\n\nSo I'm using kvm-unit-test to exercise QEMU's TCG modelling of the\ninstructions, see:\n\n Message-ID: <20260430104434.1482407-1-alex.bennee@linaro.org>\n Date: Thu, 30 Apr 2026 11:44:27 +0100\n Subject: [PATCH v4 0/7] target/arm: fully model WFxT instructions for A-profile\n\nSo while I'm confident the current modelling doesn't cause issues\n(because we basically treat it as a NOP) I wanted to check the various\nmodes behave as they should with the above patches.\n\nI can limit the test to TCG only if it is likely to fail under KVM.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=tE4HVR6T;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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