[{"id":3683386,"web_url":"http://patchwork.ozlabs.org/comment/3683386/","msgid":"","list_archive_url":null,"date":"2026-04-28T10:48:44","subject":"Re: [PATCH] pinctrl: mediatek: common-v1: Directly modify registers\n to set GPIO direction","submitter":{"id":92050,"url":"http://patchwork.ozlabs.org/api/people/92050/","name":"Linus Walleij","email":"linusw@kernel.org"},"content":"On Mon, Apr 27, 2026 at 8:17 AM Chen-Yu Tsai wrote:\n\n> pinctrl_gpio_direction_input() / pinctrl_gpio_direction_output() take\n> the pinctrl mutex. This causes a gpiochip operations to need to sleep.\n> Worse yet, the .can_sleep field in the gpiochip is not set. This causes\n> the shared GPIO proxy to trip over, as it uses gpiod_cansleep() to check\n> whether it can use a spinlock or needs a mutex. In this case, it ends\n> up taking a spinlock, then calls pinctrl_gpio_direction_output(), which\n> takes a mutex. This causes a huge warning.\n>\n> Since the Mediatek hardware has separate clear/set registers, there is\n> no risk of clobbering other bits like with a read-modify-write pattern.\n> Switch to directly setting the GPIO direction register bits to avoid\n> the mutex.\n>\n> Signed-off-by: Chen-Yu Tsai \n\nHere you need to at least delete the assignment of mtk_pmx_gpio_set_direction()\nfrom:\n\nstatic const struct pinmux_ops mtk_pmx_ops = {\n .get_functions_count = mtk_pmx_get_funcs_cnt,\n .get_function_name = mtk_pmx_get_func_name,\n .get_function_groups = mtk_pmx_get_func_groups,\n .set_mux = mtk_pmx_set_mux,\n .gpio_set_direction = mtk_pmx_gpio_set_direction,\n\n^ Here, it should no longer be used, right?\n\nYours,\nLinus Walleij","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=JtnZOetv;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; 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Tue, 28 Apr 2026\n 03:48:56 -0700 (PDT)","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","References":"<20260427061720.2393355-1-wenst@chromium.org>","In-Reply-To":"<20260427061720.2393355-1-wenst@chromium.org>","From":"Linus Walleij ","Date":"Tue, 28 Apr 2026 12:48:44 +0200","X-Gmail-Original-Message-ID":"\n ","X-Gm-Features":"AVHnY4IQ9pWQR3XwMVHEmg2y70n-2Cqf_AoJsV8Bvhx3LjreKPa329xly69LAug","Message-ID":"\n ","Subject":"Re: [PATCH] pinctrl: mediatek: common-v1: Directly modify registers\n to set GPIO direction","To":"Chen-Yu Tsai ","Cc":"Sean Wang ,\n Matthias Brugger ,\n\tAngeloGioacchino Del Regno ,\n\tlinux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable"}}]